diff --git a/codeGenIntermediate/src/prog8/codegen/intermediate/IRCodeGen.kt b/codeGenIntermediate/src/prog8/codegen/intermediate/IRCodeGen.kt
index baa49976f..fb7254c47 100644
--- a/codeGenIntermediate/src/prog8/codegen/intermediate/IRCodeGen.kt
+++ b/codeGenIntermediate/src/prog8/codegen/intermediate/IRCodeGen.kt
@@ -1120,13 +1120,14 @@ class IRCodeGen(
                 var useCmp = false
                 when (condition.operator) {
                     "==" -> {
-                        opcode = Opcode.BSTEQ
                         useCmp = true
+                        opcode = Opcode.BSTEQ
                         firstReg = leftTr.resultReg
                         secondReg = rightTr.resultReg
                     }
                     "!=" -> {
-                        opcode = Opcode.BNER
+                        useCmp = true
+                        opcode = Opcode.BSTNE
                         firstReg = leftTr.resultReg
                         secondReg = rightTr.resultReg
                     }
@@ -1405,7 +1406,8 @@ class IRCodeGen(
                     addToResult(result, rightTr, rightTr.resultReg, -1)
                     when (condition.operator) {
                         "==" -> {
-                            elseBranch = Opcode.BNER
+                            useCmp = true
+                            elseBranch = Opcode.BSTNE
                             elseBranchFirstReg = leftTr.resultReg
                             elseBranchSecondReg = rightTr.resultReg
                         }
diff --git a/intermediate/src/prog8/intermediate/IRInstructions.kt b/intermediate/src/prog8/intermediate/IRInstructions.kt
index 4f29154ec..2f4719ef8 100644
--- a/intermediate/src/prog8/intermediate/IRInstructions.kt
+++ b/intermediate/src/prog8/intermediate/IRInstructions.kt
@@ -83,7 +83,6 @@ bstpos                        address   - branch to location if Status bit Negat
 bstneg                        address   - branch to location if Status bit Negative is set
 bstvc                         address   - branch to location if Status bit Overflow is clear
 bstvs                         address   - branch to location if Status bit Overflow is set
-bner        reg1, reg2,       address   - jump to location in program given by location, if reg1 != reg2
 bgt         reg1, value,      address   - jump to location in program given by location, if reg1 > immediate value (unsigned)
 bgts        reg1, value,      address   - jump to location in program given by location, if reg1 > immediate value (signed)
 bgtr        reg1, reg2,       address   - jump to location in program given by location, if reg1 > reg2 (unsigned)
@@ -258,7 +257,6 @@ enum class Opcode {
     BSTPOS,
     BSTVC,
     BSTVS,
-    BNER,
     BGTR,
     BGT,
     BLT,
@@ -401,7 +399,6 @@ val OpcodesThatBranch = setOf(
     Opcode.BSTPOS,
     Opcode.BSTVC,
     Opcode.BSTVS,
-    Opcode.BNER,
     Opcode.BGTR,
     Opcode.BGT,
     Opcode.BLT,
@@ -549,7 +546,6 @@ val instructionFormats = mutableMapOf(
     Opcode.BSTPOS     to InstructionFormat.from("N,<a"),
     Opcode.BSTVC      to InstructionFormat.from("N,<a"),
     Opcode.BSTVS      to InstructionFormat.from("N,<a"),
-    Opcode.BNER       to InstructionFormat.from("BW,<r1,<r2,<a"),
     Opcode.BGTR       to InstructionFormat.from("BW,<r1,<r2,<a"),
     Opcode.BGT        to InstructionFormat.from("BW,<r1,<i,<a"),
     Opcode.BLT        to InstructionFormat.from("BW,<r1,<i,<a"),
diff --git a/virtualmachine/src/prog8/vm/VirtualMachine.kt b/virtualmachine/src/prog8/vm/VirtualMachine.kt
index 3e15dfd5f..e77005d92 100644
--- a/virtualmachine/src/prog8/vm/VirtualMachine.kt
+++ b/virtualmachine/src/prog8/vm/VirtualMachine.kt
@@ -191,7 +191,6 @@ class VirtualMachine(irProgram: IRProgram) {
             Opcode.BSTNEG -> InsBSTNEG(ins)
             Opcode.BSTPOS -> InsBSTPOS(ins)
             Opcode.BSTVC, Opcode.BSTVS -> TODO("overflow status flag not yet supported in VM (BSTVC,BSTVS)")
-            Opcode.BNER -> InsBNER(ins)
             Opcode.BGTR -> InsBGTR(ins)
             Opcode.BGTSR -> InsBGTSR(ins)
             Opcode.BGER -> InsBGER(ins)
@@ -668,14 +667,6 @@ class VirtualMachine(irProgram: IRProgram) {
             nextPc()
     }
 
-    private fun InsBNER(i: IRInstruction) {
-        val (left: Int, right: Int) = getBranchOperands(i)
-        if(left!=right)
-            branchTo(i)
-        else
-            nextPc()
-    }
-
     private fun InsBGTR(i: IRInstruction) {
         val (left: UInt, right: UInt) = getBranchOperandsU(i)
         if(left>right)