diff --git a/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/AsmGen.kt b/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/AsmGen.kt index acd5043bc..98db45f4c 100644 --- a/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/AsmGen.kt +++ b/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/AsmGen.kt @@ -11,7 +11,6 @@ import prog8.compiler.target.C64Target import prog8.compiler.target.Cx16Target import prog8.compiler.target.cbm.AssemblyProgram import prog8.compiler.target.cbm.loadAsmIncludeFile -import prog8.compiler.target.cpu6502.codegen.assignment.* import prog8.compiler.target.cpu6502.codegen.assignment.AsmAssignSource import prog8.compiler.target.cpu6502.codegen.assignment.AsmAssignTarget import prog8.compiler.target.cpu6502.codegen.assignment.AsmAssignment @@ -852,14 +851,14 @@ class AsmGen(private val program: Program, internal fun translateNormalAssignment(assign: AsmAssignment) = assignmentAsmGen.translateNormalAssignment(assign) - internal fun assignExpressionToRegister(expr: Expression, register: RegisterOrPair) = - assignmentAsmGen.assignExpressionToRegister(expr, register) + internal fun assignExpressionToRegister(expr: Expression, register: RegisterOrPair, signed: Boolean=false) = + assignmentAsmGen.assignExpressionToRegister(expr, register, signed) internal fun assignExpressionToVariable(expr: Expression, asmVarName: String, dt: DataType, scope: Subroutine?) = assignmentAsmGen.assignExpressionToVariable(expr, asmVarName, dt, scope) - internal fun assignVariableToRegister(asmVarName: String, register: RegisterOrPair) = - assignmentAsmGen.assignVariableToRegister(asmVarName, register) + internal fun assignVariableToRegister(asmVarName: String, register: RegisterOrPair, signed: Boolean=false) = + assignmentAsmGen.assignVariableToRegister(asmVarName, register, signed) internal fun assignRegister(reg: RegisterOrPair, target: AsmAssignTarget) { when(reg) { @@ -1400,7 +1399,7 @@ $label nop""") else -> { // all else take its address and assign that also to AY register pair val addrofValue = AddressOf(returnvalue as IdentifierReference, returnvalue.position) - assignmentAsmGen.assignExpressionToRegister(addrofValue, returnReg.registerOrPair!!) + assignmentAsmGen.assignExpressionToRegister(addrofValue, returnReg.registerOrPair!!, false) } } } diff --git a/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/BuiltinFunctionsAsmGen.kt b/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/BuiltinFunctionsAsmGen.kt index 70810863f..5fc1b713e 100644 --- a/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/BuiltinFunctionsAsmGen.kt +++ b/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/BuiltinFunctionsAsmGen.kt @@ -261,7 +261,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val if(resultToStack) AsmAssignTarget(TargetStorageKind.STACK, program, asmgen, DataType.UWORD, null) else - AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, null, program, asmgen) + AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, null, program, asmgen) val assign = AsmAssignment(src, target, false, program.memsizer, fcall.position) asmgen.translateNormalAssignment(assign) asmgen.slabs[name] = size @@ -273,7 +273,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val asmgen.out(" jsr prog8_lib.func_sqrt16_stack") else { asmgen.out(" jsr prog8_lib.func_sqrt16_into_A") - assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A) + assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A) } } @@ -285,11 +285,11 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val when(func.name) { "sin8", "sin8u", "cos8", "cos8u" -> { asmgen.out(" jsr prog8_lib.func_${func.name}_into_A") - assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A) + assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A) } "sin16", "sin16u", "cos16", "cos16u" -> { asmgen.out(" jsr prog8_lib.func_${func.name}_into_AY") - assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY) + assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY) } } } @@ -578,7 +578,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val asmgen.out(" jsr floats.func_${func.name}_stack") else { asmgen.out(" jsr floats.func_${func.name}_fac1") - assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, scope, program, asmgen)) + assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, true, scope, program, asmgen)) } } @@ -603,7 +603,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val DataType.FLOAT -> asmgen.out(" jsr floats.func_sign_f_into_A") else -> throw AssemblyError("weird type $dt") } - assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A) + assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A) } } @@ -624,7 +624,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val DataType.ARRAY_F -> asmgen.out(" jsr floats.func_${function.name}_f_into_A") else -> throw AssemblyError("weird type $dt") } - assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A) + assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A) } } @@ -644,23 +644,23 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val when (dt.getOr(DataType.UNDEFINED)) { DataType.ARRAY_UB, DataType.STR -> { asmgen.out(" jsr prog8_lib.func_${function.name}_ub_into_A") - assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A) + assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A) } DataType.ARRAY_B -> { asmgen.out(" jsr prog8_lib.func_${function.name}_b_into_A") - assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A) + assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A) } DataType.ARRAY_UW -> { asmgen.out(" jsr prog8_lib.func_${function.name}_uw_into_AY") - assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY) + assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY) } DataType.ARRAY_W -> { asmgen.out(" jsr prog8_lib.func_${function.name}_w_into_AY") - assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY) + assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY) } DataType.ARRAY_F -> { asmgen.out(" jsr floats.func_${function.name}_f_fac1") - assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, scope, program, asmgen)) + assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, true, scope, program, asmgen)) } else -> throw AssemblyError("weird type $dt") } @@ -683,23 +683,23 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val when (dt.getOr(DataType.UNDEFINED)) { DataType.ARRAY_UB, DataType.STR -> { asmgen.out(" jsr prog8_lib.func_sum_ub_into_AY") - assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY) + assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY) } DataType.ARRAY_B -> { asmgen.out(" jsr prog8_lib.func_sum_b_into_AY") - assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY) + assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY) } DataType.ARRAY_UW -> { asmgen.out(" jsr prog8_lib.func_sum_uw_into_AY") - assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY) + assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY) } DataType.ARRAY_W -> { asmgen.out(" jsr prog8_lib.func_sum_w_into_AY") - assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY) + assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY) } DataType.ARRAY_F -> { asmgen.out(" jsr floats.func_sum_f_fac1") - assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, scope, program, asmgen)) + assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, true, scope, program, asmgen)) } else -> throw AssemblyError("weird type $dt") } @@ -1141,15 +1141,15 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val when (dt) { in ByteDatatypes -> { asmgen.out(" jsr prog8_lib.abs_b_into_A") - assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A) + assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A) } in WordDatatypes -> { asmgen.out(" jsr prog8_lib.abs_w_into_AY") - assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY) + assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY) } DataType.FLOAT -> { asmgen.out(" jsr floats.abs_f_fac1") - assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, scope, program, asmgen)) + assignAsmGen.assignFAC1float(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.FAC1, true, scope, program, asmgen)) } else -> throw AssemblyError("weird type") } @@ -1163,7 +1163,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val asmgen.out(" jsr prog8_lib.func_rnd_stack") else { asmgen.out(" jsr math.randbyte") - assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, scope, program, asmgen), CpuRegister.A) + assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.A, false, scope, program, asmgen), CpuRegister.A) } } "rndw" -> { @@ -1171,7 +1171,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val asmgen.out(" jsr prog8_lib.func_rndw_stack") else { asmgen.out(" jsr math.randword") - assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, scope, program, asmgen), RegisterOrPair.AY) + assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister ?: RegisterOrPair.AY, false, scope, program, asmgen), RegisterOrPair.AY) } } else -> throw AssemblyError("wrong func") @@ -1534,7 +1534,7 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val AsmAssignSource.fromAstSource(value, program, asmgen) } } - val tgt = AsmAssignTarget.fromRegisters(conv.reg!!, null, program, asmgen) + val tgt = AsmAssignTarget.fromRegisters(conv.reg!!, false, null, program, asmgen) val assign = AsmAssignment(src, tgt, false, program.memsizer, value.position) asmgen.translateNormalAssignment(assign) } diff --git a/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/ExpressionsAsmGen.kt b/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/ExpressionsAsmGen.kt index 189db373a..afde9234f 100644 --- a/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/ExpressionsAsmGen.kt +++ b/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/ExpressionsAsmGen.kt @@ -86,11 +86,11 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge return } if(dt==DataType.UBYTE) { - asmgen.assignExpressionToRegister(left, RegisterOrPair.A) + asmgen.assignExpressionToRegister(left, RegisterOrPair.A, false) if (left is FunctionCall && !left.isSimple) asmgen.out(" cmp #0") } else { - asmgen.assignExpressionToRegister(left, RegisterOrPair.AY) + asmgen.assignExpressionToRegister(left, RegisterOrPair.AY, false) asmgen.out(" sty P8ZP_SCRATCH_B1 | ora P8ZP_SCRATCH_B1") } when (operator) { @@ -102,7 +102,7 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge } } DataType.BYTE -> { - asmgen.assignExpressionToRegister(left, RegisterOrPair.A) + asmgen.assignExpressionToRegister(left, RegisterOrPair.A, true) if (left is FunctionCall && !left.isSimple) asmgen.out(" cmp #0") when (operator) { @@ -119,7 +119,7 @@ internal class ExpressionsAsmGen(private val program: Program, private val asmge } } DataType.WORD -> { - asmgen.assignExpressionToRegister(left, RegisterOrPair.AY) + asmgen.assignExpressionToRegister(left, RegisterOrPair.AY, true) when (operator) { "==" -> asmgen.out(" bne $jumpIfFalseLabel | cpy #0 | bne $jumpIfFalseLabel") "!=" -> asmgen.out(" sty P8ZP_SCRATCH_B1 | ora P8ZP_SCRATCH_B1 | beq $jumpIfFalseLabel") diff --git a/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/FunctionCallAsmGen.kt b/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/FunctionCallAsmGen.kt index 8d86c7676..b5e04b7a4 100644 --- a/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/FunctionCallAsmGen.kt +++ b/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/FunctionCallAsmGen.kt @@ -336,7 +336,7 @@ internal class FunctionCallAsmGen(private val program: Program, private val asmg if(parameter.value.type in ByteDatatypes && (register==RegisterOrPair.AX || register == RegisterOrPair.AY || register==RegisterOrPair.XY || register in Cx16VirtualRegisters)) AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, parameter.value.type, sub, register = register) else - AsmAssignTarget.fromRegisters(register, sub, program, asmgen) + AsmAssignTarget.fromRegisters(register, false, sub, program, asmgen) val src = if(valueDt in PassByReferenceDatatypes) { if(value is IdentifierReference) { val addr = AddressOf(value, Position.DUMMY) diff --git a/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/assignment/AsmAssignment.kt b/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/assignment/AsmAssignment.kt index 29efe73b7..6c7785a51 100644 --- a/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/assignment/AsmAssignment.kt +++ b/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/assignment/AsmAssignment.kt @@ -62,21 +62,21 @@ internal class AsmAssignTarget(val kind: TargetStorageKind, throw AssemblyError("unknown dt") val dt = idt.getOr(DataType.UNDEFINED) when { - identifier != null -> AsmAssignTarget(prog8.compiler.target.cpu6502.codegen.assignment.TargetStorageKind.VARIABLE, program, asmgen, dt, assign.definingSubroutine, variableAsmName = asmgen.asmVariableName(identifier!!), origAstTarget = this) - arrayindexed != null -> AsmAssignTarget(prog8.compiler.target.cpu6502.codegen.assignment.TargetStorageKind.ARRAY, program, asmgen, dt, assign.definingSubroutine, array = arrayindexed, origAstTarget = this) - memoryAddress != null -> AsmAssignTarget(prog8.compiler.target.cpu6502.codegen.assignment.TargetStorageKind.MEMORY, program, asmgen, dt, assign.definingSubroutine, memory = memoryAddress, origAstTarget = this) + identifier != null -> AsmAssignTarget(TargetStorageKind.VARIABLE, program, asmgen, dt, assign.definingSubroutine, variableAsmName = asmgen.asmVariableName(identifier!!), origAstTarget = this) + arrayindexed != null -> AsmAssignTarget(TargetStorageKind.ARRAY, program, asmgen, dt, assign.definingSubroutine, array = arrayindexed, origAstTarget = this) + memoryAddress != null -> AsmAssignTarget(TargetStorageKind.MEMORY, program, asmgen, dt, assign.definingSubroutine, memory = memoryAddress, origAstTarget = this) else -> throw AssemblyError("weird target") } } - fun fromRegisters(registers: RegisterOrPair, scope: Subroutine?, program: Program, asmgen: AsmGen): AsmAssignTarget = + fun fromRegisters(registers: RegisterOrPair, signed: Boolean, scope: Subroutine?, program: Program, asmgen: AsmGen): AsmAssignTarget = when(registers) { RegisterOrPair.A, RegisterOrPair.X, - RegisterOrPair.Y -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, DataType.UBYTE, scope, register = registers) + RegisterOrPair.Y -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, if(signed) DataType.BYTE else DataType.UBYTE, scope, register = registers) RegisterOrPair.AX, RegisterOrPair.AY, - RegisterOrPair.XY -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, DataType.UWORD, scope, register = registers) + RegisterOrPair.XY -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, if(signed) DataType.WORD else DataType.UWORD, scope, register = registers) RegisterOrPair.FAC1, RegisterOrPair.FAC2 -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, DataType.FLOAT, scope, register = registers) RegisterOrPair.R0, @@ -94,7 +94,7 @@ internal class AsmAssignTarget(val kind: TargetStorageKind, RegisterOrPair.R12, RegisterOrPair.R13, RegisterOrPair.R14, - RegisterOrPair.R15 -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, DataType.UWORD, scope, register = registers) + RegisterOrPair.R15 -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, if(signed) DataType.WORD else DataType.UWORD, scope, register = registers) } } } diff --git a/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/assignment/AssignmentAsmGen.kt b/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/assignment/AssignmentAsmGen.kt index a25b366de..cafeb1ed3 100644 --- a/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/assignment/AssignmentAsmGen.kt +++ b/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/assignment/AssignmentAsmGen.kt @@ -379,15 +379,15 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen when (valueDt) { in ByteDatatypes -> { - assignExpressionToRegister(value, RegisterOrPair.A) + assignExpressionToRegister(value, RegisterOrPair.A, valueDt==DataType.BYTE) assignTypeCastedRegisters(target.asmVarname, targetDt, RegisterOrPair.A, valueDt) } in WordDatatypes -> { - assignExpressionToRegister(value, RegisterOrPair.AY) + assignExpressionToRegister(value, RegisterOrPair.AY, valueDt==DataType.WORD) assignTypeCastedRegisters(target.asmVarname, targetDt, RegisterOrPair.AY, valueDt) } DataType.FLOAT -> { - assignExpressionToRegister(value, RegisterOrPair.FAC1) + assignExpressionToRegister(value, RegisterOrPair.FAC1, true) assignTypeCastedFloatFAC1(target.asmVarname, targetDt) } in PassByReferenceDatatypes -> { @@ -414,14 +414,14 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen RegisterOrPair.X, RegisterOrPair.Y -> { // 'cast' an ubyte value to a byte register; no cast needed at all - return assignExpressionToRegister(value, target.register) + return assignExpressionToRegister(value, target.register, false) } RegisterOrPair.AX, RegisterOrPair.AY, RegisterOrPair.XY, in Cx16VirtualRegisters -> { // cast an ubyte value to a 16 bits register, just assign it and make use of the value extension - return assignExpressionToRegister(value, target.register!!) + return assignExpressionToRegister(value, target.register!!, false) } else -> {} } @@ -439,7 +439,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen RegisterOrPair.XY, in Cx16VirtualRegisters -> { // 'cast' uword into a 16 bits register, just assign it - return assignExpressionToRegister(value, target.register!!) + return assignExpressionToRegister(value, target.register!!, false) } else -> {} } @@ -2169,9 +2169,9 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen } } - internal fun assignExpressionToRegister(expr: Expression, register: RegisterOrPair) { + internal fun assignExpressionToRegister(expr: Expression, register: RegisterOrPair, signed: Boolean) { val src = AsmAssignSource.fromAstSource(expr, program, asmgen) - val tgt = AsmAssignTarget.fromRegisters(register, null, program, asmgen) + val tgt = AsmAssignTarget.fromRegisters(register, signed, null, program, asmgen) val assign = AsmAssignment(src, tgt, false, program.memsizer, expr.position) translateNormalAssignment(assign) } @@ -2183,8 +2183,8 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen translateNormalAssignment(assign) } - internal fun assignVariableToRegister(asmVarName: String, register: RegisterOrPair) { - val tgt = AsmAssignTarget.fromRegisters(register, null, program, asmgen) + internal fun assignVariableToRegister(asmVarName: String, register: RegisterOrPair, signed: Boolean) { + val tgt = AsmAssignTarget.fromRegisters(register, signed, null, program, asmgen) val src = AsmAssignSource(SourceStorageKind.VARIABLE, program, asmgen, tgt.datatype, variableAsmName = asmVarName) val assign = AsmAssignment(src, tgt, false, program.memsizer, Position.DUMMY) translateNormalAssignment(assign) diff --git a/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/assignment/AugmentableAssignmentAsmGen.kt b/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/assignment/AugmentableAssignmentAsmGen.kt index c1c2d54be..e427a220e 100644 --- a/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/assignment/AugmentableAssignmentAsmGen.kt +++ b/codeGeneration/src/prog8/compiler/target/cpu6502/codegen/assignment/AugmentableAssignmentAsmGen.kt @@ -248,9 +248,9 @@ internal class AugmentableAssignmentAsmGen(private val program: Program, when (target.datatype) { in ByteDatatypes -> { val tgt = - prog8.compiler.target.cpu6502.codegen.assignment.AsmAssignTarget.fromRegisters( + AsmAssignTarget.fromRegisters( RegisterOrPair.A, - null, + target.datatype == DataType.BYTE, null, program, asmgen ) @@ -260,9 +260,9 @@ internal class AugmentableAssignmentAsmGen(private val program: Program, } in WordDatatypes -> { val tgt = - prog8.compiler.target.cpu6502.codegen.assignment.AsmAssignTarget.fromRegisters( + AsmAssignTarget.fromRegisters( RegisterOrPair.AY, - null, + target.datatype == DataType.WORD, null, program, asmgen ) @@ -272,9 +272,9 @@ internal class AugmentableAssignmentAsmGen(private val program: Program, } DataType.FLOAT -> { val tgt = - prog8.compiler.target.cpu6502.codegen.assignment.AsmAssignTarget.fromRegisters( + AsmAssignTarget.fromRegisters( RegisterOrPair.FAC1, - null, + true, null, program, asmgen ) @@ -1945,7 +1945,14 @@ internal class AugmentableAssignmentAsmGen(private val program: Program, sbc ${target.asmVarname} sta ${target.asmVarname}""") } - TargetStorageKind.REGISTER -> TODO("missing codegen for byte reg negate") + TargetStorageKind.REGISTER -> { + when(target.register!!) { + RegisterOrPair.A -> asmgen.out(" sta P8ZP_SCRATCH_B1 | lda #0 | sec | sbc P8ZP_SCRATCH_B1") + RegisterOrPair.X -> asmgen.out(" stx P8ZP_SCRATCH_B1 | lda #0 | sec | sbc P8ZP_SCRATCH_B1 | tax") + RegisterOrPair.Y -> asmgen.out(" sty P8ZP_SCRATCH_B1 | lda #0 | sec | sbc P8ZP_SCRATCH_B1 | tay") + else -> throw AssemblyError("invalid reg dt for byte negate") + } + } TargetStorageKind.MEMORY -> TODO("can't in-place negate memory ubyte") TargetStorageKind.STACK -> TODO("missing codegen for byte stack negate") else -> throw AssemblyError("missing codegen for in-place negate byte array") @@ -1963,7 +1970,52 @@ internal class AugmentableAssignmentAsmGen(private val program: Program, sbc ${target.asmVarname}+1 sta ${target.asmVarname}+1""") } - TargetStorageKind.REGISTER -> TODO("missing codegen for word reg negate") + TargetStorageKind.REGISTER -> { + when(target.register!!) { //P8ZP_SCRATCH_REG + RegisterOrPair.AX -> { + asmgen.out(""" + sta P8ZP_SCRATCH_REG + stx P8ZP_SCRATCH_REG+1 + lda #0 + sec + sbc P8ZP_SCRATCH_REG + pha + lda #0 + sbc P8ZP_SCRATCH_REG+1 + tax + pla""") + } + RegisterOrPair.AY -> { + asmgen.out(""" + sta P8ZP_SCRATCH_REG + sty P8ZP_SCRATCH_REG+1 + lda #0 + sec + sbc P8ZP_SCRATCH_REG + pha + lda #0 + sbc P8ZP_SCRATCH_REG+1 + tay + pla""") + } + RegisterOrPair.XY -> { + asmgen.out(""" + stx P8ZP_SCRATCH_REG + sty P8ZP_SCRATCH_REG+1 + lda #0 + sec + sbc P8ZP_SCRATCH_REG + tax + lda #0 + sbc P8ZP_SCRATCH_REG+1 + tay""") + } + in Cx16VirtualRegisters -> { + TODO("codegen for cx16 word register negate") + } + else -> throw AssemblyError("invalid reg dt for word neg") + } + } TargetStorageKind.MEMORY -> TODO("no asm gen for word memory negate") TargetStorageKind.STACK -> TODO("missing codegen for word stack negate") else -> throw AssemblyError("missing codegen for in-place negate word array") diff --git a/examples/test.p8 b/examples/test.p8 index b7eeb5840..897a909ed 100644 --- a/examples/test.p8 +++ b/examples/test.p8 @@ -4,7 +4,23 @@ main { sub start() { - uword xx=$2000 + ubyte xx=$20 + + if not xx { + xx++ + } + + if ~xx { + xx++ + } + + byte yy=3 + + if -yy { + xx++ + } + + @(~xx) *= 2