From 37fa3b34a2dae7505c72ebbfe68e3e3f5648f111 Mon Sep 17 00:00:00 2001
From: Irmen de Jong <irmen@razorvine.net>
Date: Sun, 7 Jan 2024 22:10:43 +0100
Subject: [PATCH] tweak IR

---
 .../intermediate/IRPeepholeOptimizer.kt       |  2 +-
 .../src/prog8/intermediate/IRInstructions.kt  | 32 ++++++++++++++++---
 2 files changed, 28 insertions(+), 6 deletions(-)

diff --git a/codeGenIntermediate/src/prog8/codegen/intermediate/IRPeepholeOptimizer.kt b/codeGenIntermediate/src/prog8/codegen/intermediate/IRPeepholeOptimizer.kt
index e5047e6e0..907afa8c5 100644
--- a/codeGenIntermediate/src/prog8/codegen/intermediate/IRPeepholeOptimizer.kt
+++ b/codeGenIntermediate/src/prog8/codegen/intermediate/IRPeepholeOptimizer.kt
@@ -330,7 +330,7 @@ class IRPeepholeOptimizer(private val irprog: IRProgram) {
                         changed = true
                     } else if (previous.opcode in OpcodesThatSetStatusbitsButNotCarry) {
                         val next = indexedInstructions[idx + 1].value
-                        if (next.opcode !in arrayOf(Opcode.BSTCC, Opcode.BSTCS, Opcode.BSTPOS, Opcode.BSTNEG)) {
+                        if (next.opcode !in OpcodesThatDependOnCarry) {
                             chunk.instructions.removeAt(idx)
                             changed = true
                         }
diff --git a/intermediate/src/prog8/intermediate/IRInstructions.kt b/intermediate/src/prog8/intermediate/IRInstructions.kt
index 293045921..d93c64c61 100644
--- a/intermediate/src/prog8/intermediate/IRInstructions.kt
+++ b/intermediate/src/prog8/intermediate/IRInstructions.kt
@@ -18,6 +18,7 @@ Status flags: Carry, Zero, Negative.   NOTE: status flags are only affected by t
                                              LOAD instructions DO affect the Z and N flags.
                                              INC/DEC instructions DO affect the Z and N flags,
                                              other instructions only affect Z an N flags if the value in a result register is written.
+                                             See OpcodesThatSetStatusbits
 
 Instruction set is mostly a load/store architecture, there are few instructions operating on memory directly.
 
@@ -387,14 +388,14 @@ enum class Opcode {
     BREAKPOINT
 }
 
-val OpcodesThatJump = setOf(
+val OpcodesThatJump = arrayOf(
     Opcode.JUMP,
     Opcode.JUMPI,
     Opcode.RETURN,
     Opcode.RETURNR
 )
 
-val OpcodesThatBranch = setOf(
+val OpcodesThatBranch = arrayOf(
     Opcode.JUMP,
     Opcode.JUMPI,
     Opcode.RETURN,
@@ -424,11 +425,11 @@ val OpcodesThatBranch = setOf(
     Opcode.BLES
 )
 
-val OpcodesThatSetStatusbitsIncludingCarry = setOf(
+val OpcodesThatSetStatusbitsIncludingCarry = arrayOf(
     Opcode.CMP,
     Opcode.CMPI
 )
-val OpcodesThatSetStatusbitsButNotCarry = setOf(
+val OpcodesThatSetStatusbitsButNotCarry = arrayOf(
     Opcode.LOAD,
     Opcode.LOADM,
     Opcode.LOADI,
@@ -438,8 +439,29 @@ val OpcodesThatSetStatusbitsButNotCarry = setOf(
     Opcode.INC,
     Opcode.INCM,
     Opcode.DEC,
-    Opcode.DECM
+    Opcode.DECM,
+    Opcode.ANDM,
+    Opcode.ANDR,
+    Opcode.AND,
+    Opcode.ORM,
+    Opcode.ORR,
+    Opcode.OR,
+    Opcode.XORM,
+    Opcode.XORR,
+    Opcode.XOR
 )
+
+val OpcodesThatDependOnCarry = arrayOf(
+    Opcode.BSTCC,
+    Opcode.BSTCS,
+    Opcode.BSTPOS,
+    Opcode.BSTNEG,
+    Opcode.ROXL,
+    Opcode.ROXLM,
+    Opcode.ROXR,
+    Opcode.ROXRM,
+)
+
 val OpcodesThatSetStatusbits = OpcodesThatSetStatusbitsButNotCarry + OpcodesThatSetStatusbitsIncludingCarry