From 3831679772ef2bd2b6b1756c68b0c0115e04ff61 Mon Sep 17 00:00:00 2001 From: Irmen de Jong Date: Mon, 10 Jan 2022 01:48:25 +0100 Subject: [PATCH] VarDecl: make its origin explicit --- .../codegen/assignment/AssignmentAsmGen.kt | 2 +- .../src/prog8/optimizer/UnusedCodeRemover.kt | 2 +- .../compiler/astprocessing/AstExtensions.kt | 3 +- .../astprocessing/StatementReorderer.kt | 13 +++++- .../test/TestCompilerOnImportsAndIncludes.kt | 2 +- compiler/test/TestMemory.kt | 16 +++---- .../test/codegeneration/TestAsmGenSymbols.kt | 10 ++--- compilerAst/src/prog8/ast/Program.kt | 9 ++-- .../src/prog8/ast/antlr/Antlr2Kotlin.kt | 13 ++---- .../prog8/ast/expressions/AstExpressions.kt | 2 +- .../src/prog8/ast/statements/AstStatements.kt | 42 +++++++++++-------- docs/source/todo.rst | 1 - examples/test.p8 | 5 +++ 13 files changed, 65 insertions(+), 55 deletions(-) diff --git a/codeGeneration/src/prog8/codegen/target/cpu6502/codegen/assignment/AssignmentAsmGen.kt b/codeGeneration/src/prog8/codegen/target/cpu6502/codegen/assignment/AssignmentAsmGen.kt index d14766454..de8650e0a 100644 --- a/codeGeneration/src/prog8/codegen/target/cpu6502/codegen/assignment/AssignmentAsmGen.kt +++ b/codeGeneration/src/prog8/codegen/target/cpu6502/codegen/assignment/AssignmentAsmGen.kt @@ -356,7 +356,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen if(variable!=null) { if(elementDt istype DataType.FLOAT) throw AssemblyError("containment check of floats not supported") - if(variable.autogeneratedDontRemove) { + if(variable.origin!=VarDeclOrigin.USERCODE) { when(variable.datatype) { DataType.STR -> { require(elementDt.isBytes) diff --git a/codeOptimizers/src/prog8/optimizer/UnusedCodeRemover.kt b/codeOptimizers/src/prog8/optimizer/UnusedCodeRemover.kt index ebf6a0bee..490417428 100644 --- a/codeOptimizers/src/prog8/optimizer/UnusedCodeRemover.kt +++ b/codeOptimizers/src/prog8/optimizer/UnusedCodeRemover.kt @@ -102,7 +102,7 @@ class UnusedCodeRemover(private val program: Program, override fun after(decl: VarDecl, parent: Node): Iterable { if(decl.type==VarDeclType.VAR) { val forceOutput = "force_output" in decl.definingBlock.options() - if (!forceOutput && !decl.autogeneratedDontRemove && !decl.sharedWithAsm && !decl.definingBlock.isInLibrary) { + if (!forceOutput && decl.origin==VarDeclOrigin.USERCODE && !decl.sharedWithAsm && !decl.definingBlock.isInLibrary) { val usages = callgraph.usages(decl) if (usages.isEmpty()) { errors.warn("removing unused variable '${decl.name}'", decl.position) diff --git a/compiler/src/prog8/compiler/astprocessing/AstExtensions.kt b/compiler/src/prog8/compiler/astprocessing/AstExtensions.kt index 13a71cb2c..795e31187 100644 --- a/compiler/src/prog8/compiler/astprocessing/AstExtensions.kt +++ b/compiler/src/prog8/compiler/astprocessing/AstExtensions.kt @@ -7,6 +7,7 @@ import prog8.ast.expressions.CharLiteral import prog8.ast.expressions.IdentifierReference import prog8.ast.expressions.NumericLiteralValue import prog8.ast.statements.Directive +import prog8.ast.statements.VarDeclOrigin import prog8.ast.walk.AstWalker import prog8.ast.walk.IAstModification import prog8.compilerinterface.CompilationOptions @@ -139,7 +140,7 @@ internal fun Program.moveMainAndStartToFirst() { internal fun IdentifierReference.isSubroutineParameter(program: Program): Boolean { val vardecl = this.targetVarDecl(program) - if(vardecl!=null && vardecl.autogeneratedDontRemove) { + if(vardecl!=null && vardecl.origin==VarDeclOrigin.SUBROUTINEPARAM) { return vardecl.definingSubroutine?.parameters?.any { it.name==vardecl.name } == true } return false diff --git a/compiler/src/prog8/compiler/astprocessing/StatementReorderer.kt b/compiler/src/prog8/compiler/astprocessing/StatementReorderer.kt index b001f2b1b..f6b8a3644 100644 --- a/compiler/src/prog8/compiler/astprocessing/StatementReorderer.kt +++ b/compiler/src/prog8/compiler/astprocessing/StatementReorderer.kt @@ -48,7 +48,7 @@ internal class StatementReorderer(val program: Program, if(decl !in declsProcessedWithInitAssignment) { declsProcessedWithInitAssignment.add(decl) if (decl.value == null) { - if (!decl.autogeneratedDontRemove && decl.allowInitializeWithZero) { + if (decl.origin==VarDeclOrigin.USERCODE && decl.allowInitializeWithZero) { // A numeric vardecl without an initial value is initialized with zero, // unless there's already an assignment below it, that initializes the value (or a for loop that uses it as loopvar). // This allows you to restart the program and have the same starting values of the variables @@ -153,7 +153,16 @@ internal class StatementReorderer(val program: Program, .filterIsInstance() .filter { it.subroutineParameter!=null && it.name in stringParamsByNames } .map { - val newvar = VarDecl(it.type, DataType.UWORD, it.zeropage, null, it.name, null, false, true, it.sharedWithAsm, stringParamsByNames.getValue(it.name), it.position) + val newvar = VarDecl(it.type, it.origin, DataType.UWORD, + it.zeropage, + null, + it.name, + null, + false, + it.sharedWithAsm, + stringParamsByNames.getValue(it.name), + it.position + ) IAstModification.ReplaceNode(it, newvar, subroutine) } } diff --git a/compiler/test/TestCompilerOnImportsAndIncludes.kt b/compiler/test/TestCompilerOnImportsAndIncludes.kt index a02bee74f..d8a77a7fc 100644 --- a/compiler/test/TestCompilerOnImportsAndIncludes.kt +++ b/compiler/test/TestCompilerOnImportsAndIncludes.kt @@ -94,7 +94,7 @@ class TestCompilerOnImportsAndIncludes: FunSpec({ ) tests.forEach { - val (where, p8Str, binStr) = it + val (where, p8Str, _) = it test("%asmbinary from ${where}folder") { val p8Path = assumeReadableFile(fixturesDir, p8Str) // val binPath = assumeReadableFile(fixturesDir, binStr) diff --git a/compiler/test/TestMemory.kt b/compiler/test/TestMemory.kt index 47950113a..871ec9cc6 100644 --- a/compiler/test/TestMemory.kt +++ b/compiler/test/TestMemory.kt @@ -112,7 +112,7 @@ class TestMemory: FunSpec({ } fun createTestProgramForMemoryRefViaVar(address: UInt, vartype: VarDeclType): AssignTarget { - val decl = VarDecl(vartype, DataType.BYTE, ZeropageWish.DONTCARE, null, "address", NumericLiteralValue.optimalInteger(address, Position.DUMMY), false, false, false, null, Position.DUMMY) + val decl = VarDecl(vartype, VarDeclOrigin.USERCODE, DataType.BYTE, ZeropageWish.DONTCARE, null, "address", NumericLiteralValue.optimalInteger(address, Position.DUMMY), false, false, null, Position.DUMMY) val memexpr = IdentifierReference(listOf("address"), Position.DUMMY) val target = AssignTarget(null, null, DirectMemoryWrite(memexpr, Position.DUMMY), Position.DUMMY) val assignment = Assignment(target, NumericLiteralValue.optimalInteger(0, Position.DUMMY), Position.DUMMY) @@ -151,7 +151,7 @@ class TestMemory: FunSpec({ } test("regular variable not in mapped IO ram on C64") { - val decl = VarDecl(VarDeclType.VAR, DataType.BYTE, ZeropageWish.DONTCARE, null, "address", null, false, false, false, null, Position.DUMMY) + val decl = VarDecl(VarDeclType.VAR, VarDeclOrigin.USERCODE, DataType.BYTE, ZeropageWish.DONTCARE, null, "address", null, false, false, null, Position.DUMMY) val target = AssignTarget(IdentifierReference(listOf("address"), Position.DUMMY), null, null, Position.DUMMY) val assignment = Assignment(target, NumericLiteralValue.optimalInteger(0, Position.DUMMY), Position.DUMMY) val subroutine = Subroutine("test", mutableListOf(), emptyList(), emptyList(), emptyList(), emptySet(), null, false, false, mutableListOf(decl, assignment), Position.DUMMY) @@ -163,7 +163,7 @@ class TestMemory: FunSpec({ test("memory mapped variable not in mapped IO ram on C64") { val address = 0x1000u - val decl = VarDecl(VarDeclType.MEMORY, DataType.UBYTE, ZeropageWish.DONTCARE, null, "address", NumericLiteralValue.optimalInteger(address, Position.DUMMY), false, false, false, null, Position.DUMMY) + val decl = VarDecl(VarDeclType.MEMORY, VarDeclOrigin.USERCODE, DataType.UBYTE, ZeropageWish.DONTCARE, null, "address", NumericLiteralValue.optimalInteger(address, Position.DUMMY), false, false, null, Position.DUMMY) val target = AssignTarget(IdentifierReference(listOf("address"), Position.DUMMY), null, null, Position.DUMMY) val assignment = Assignment(target, NumericLiteralValue.optimalInteger(0, Position.DUMMY), Position.DUMMY) val subroutine = Subroutine("test", mutableListOf(), emptyList(), emptyList(), emptyList(), emptySet(), null, false, false, mutableListOf(decl, assignment), Position.DUMMY) @@ -175,7 +175,7 @@ class TestMemory: FunSpec({ test("memory mapped variable in mapped IO ram on C64") { val address = 0xd020u - val decl = VarDecl(VarDeclType.MEMORY, DataType.UBYTE, ZeropageWish.DONTCARE, null, "address", NumericLiteralValue.optimalInteger(address, Position.DUMMY), false, false, false, null, Position.DUMMY) + val decl = VarDecl(VarDeclType.MEMORY, VarDeclOrigin.USERCODE, DataType.UBYTE, ZeropageWish.DONTCARE, null, "address", NumericLiteralValue.optimalInteger(address, Position.DUMMY), false, false, null, Position.DUMMY) val target = AssignTarget(IdentifierReference(listOf("address"), Position.DUMMY), null, null, Position.DUMMY) val assignment = Assignment(target, NumericLiteralValue.optimalInteger(0, Position.DUMMY), Position.DUMMY) val subroutine = Subroutine("test", mutableListOf(), emptyList(), emptyList(), emptyList(), emptySet(), null, false, false, mutableListOf(decl, assignment), Position.DUMMY) @@ -186,7 +186,7 @@ class TestMemory: FunSpec({ } test("array not in mapped IO ram") { - val decl = VarDecl(VarDeclType.VAR, DataType.ARRAY_UB, ZeropageWish.DONTCARE, null, "address", null, false, false, false, null, Position.DUMMY) + val decl = VarDecl(VarDeclType.VAR, VarDeclOrigin.USERCODE, DataType.ARRAY_UB, ZeropageWish.DONTCARE, null, "address", null, false, false, null, Position.DUMMY) val arrayindexed = ArrayIndexedExpression(IdentifierReference(listOf("address"), Position.DUMMY), ArrayIndex(NumericLiteralValue.optimalInteger(1, Position.DUMMY), Position.DUMMY), Position.DUMMY) val target = AssignTarget(null, arrayindexed, null, Position.DUMMY) val assignment = Assignment(target, NumericLiteralValue.optimalInteger(0, Position.DUMMY), Position.DUMMY) @@ -199,7 +199,7 @@ class TestMemory: FunSpec({ test("memory mapped array not in mapped IO ram") { val address = 0x1000u - val decl = VarDecl(VarDeclType.MEMORY, DataType.ARRAY_UB, ZeropageWish.DONTCARE, null, "address", NumericLiteralValue.optimalInteger(address, Position.DUMMY), false, false, false, null, Position.DUMMY) + val decl = VarDecl(VarDeclType.MEMORY, VarDeclOrigin.USERCODE, DataType.ARRAY_UB, ZeropageWish.DONTCARE, null, "address", NumericLiteralValue.optimalInteger(address, Position.DUMMY), false, false, null, Position.DUMMY) val arrayindexed = ArrayIndexedExpression(IdentifierReference(listOf("address"), Position.DUMMY), ArrayIndex(NumericLiteralValue.optimalInteger(1, Position.DUMMY), Position.DUMMY), Position.DUMMY) val target = AssignTarget(null, arrayindexed, null, Position.DUMMY) val assignment = Assignment(target, NumericLiteralValue.optimalInteger(0, Position.DUMMY), Position.DUMMY) @@ -212,7 +212,7 @@ class TestMemory: FunSpec({ test("memory mapped array in mapped IO ram") { val address = 0xd800u - val decl = VarDecl(VarDeclType.MEMORY, DataType.ARRAY_UB, ZeropageWish.DONTCARE, null, "address", NumericLiteralValue.optimalInteger(address, Position.DUMMY), false, false, false, null, Position.DUMMY) + val decl = VarDecl(VarDeclType.MEMORY, VarDeclOrigin.USERCODE, DataType.ARRAY_UB, ZeropageWish.DONTCARE, null, "address", NumericLiteralValue.optimalInteger(address, Position.DUMMY), false, false, null, Position.DUMMY) val arrayindexed = ArrayIndexedExpression(IdentifierReference(listOf("address"), Position.DUMMY), ArrayIndex(NumericLiteralValue.optimalInteger(1, Position.DUMMY), Position.DUMMY), Position.DUMMY) val target = AssignTarget(null, arrayindexed, null, Position.DUMMY) val assignment = Assignment(target, NumericLiteralValue.optimalInteger(0, Position.DUMMY), Position.DUMMY) @@ -225,7 +225,7 @@ class TestMemory: FunSpec({ test("memory() with spaces in name works") { - val result = compileText(C64Target, false, """ + compileText(C64Target, false, """ main { sub start() { uword @shared mem = memory("a b c", 100) diff --git a/compiler/test/codegeneration/TestAsmGenSymbols.kt b/compiler/test/codegeneration/TestAsmGenSymbols.kt index 966f194fe..0021cf2f0 100644 --- a/compiler/test/codegeneration/TestAsmGenSymbols.kt +++ b/compiler/test/codegeneration/TestAsmGenSymbols.kt @@ -46,8 +46,8 @@ class TestAsmGenSymbols: StringSpec({ } */ - val varInSub = VarDecl(VarDeclType.VAR, DataType.UWORD, ZeropageWish.DONTCARE, null, "localvar", NumericLiteralValue.optimalInteger(1234, Position.DUMMY), false, false, false, null, Position.DUMMY) - val var2InSub = VarDecl(VarDeclType.VAR, DataType.UWORD, ZeropageWish.DONTCARE, null, "tgt", null, false, false, false, null, Position.DUMMY) + val varInSub = VarDecl(VarDeclType.VAR, VarDeclOrigin.USERCODE, DataType.UWORD, ZeropageWish.DONTCARE, null, "localvar", NumericLiteralValue.optimalInteger(1234, Position.DUMMY), false, false, null, Position.DUMMY) + val var2InSub = VarDecl(VarDeclType.VAR, VarDeclOrigin.USERCODE, DataType.UWORD, ZeropageWish.DONTCARE, null, "tgt", null, false, false, null, Position.DUMMY) val labelInSub = Label("locallabel", Position.DUMMY) val tgt = AssignTarget(IdentifierReference(listOf("tgt"), Position.DUMMY), null, null, Position.DUMMY) @@ -63,13 +63,11 @@ class TestAsmGenSymbols: StringSpec({ val statements = mutableListOf(varInSub, var2InSub, labelInSub, assign1, assign2, assign3, assign4, assign5, assign6, assign7, assign8) val subroutine = Subroutine("start", mutableListOf(), emptyList(), emptyList(), emptyList(), emptySet(), null, false, false, statements, Position.DUMMY) val labelInBlock = Label("label_outside", Position.DUMMY) - val varInBlock = VarDecl(VarDeclType.VAR, DataType.UWORD, ZeropageWish.DONTCARE, null, "var_outside", null, false, false, false, null, Position.DUMMY) + val varInBlock = VarDecl(VarDeclType.VAR, VarDeclOrigin.USERCODE, DataType.UWORD, ZeropageWish.DONTCARE, null, "var_outside", null, false, false, null, Position.DUMMY) val block = Block("main", null, mutableListOf(labelInBlock, varInBlock, subroutine), false, Position.DUMMY) val module = Module(mutableListOf(block), Position.DUMMY, SourceCode.Generated("test")) - val program = Program("test", DummyFunctions, DummyMemsizer, DummyStringEncoder) - .addModule(module) - return program + return Program("test", DummyFunctions, DummyMemsizer, DummyStringEncoder).addModule(module) } fun createTestAsmGen(program: Program): AsmGen { diff --git a/compilerAst/src/prog8/ast/Program.kt b/compilerAst/src/prog8/ast/Program.kt index 9f72e8810..d4aff72ec 100644 --- a/compilerAst/src/prog8/ast/Program.kt +++ b/compilerAst/src/prog8/ast/Program.kt @@ -6,10 +6,7 @@ import prog8.ast.base.Position import prog8.ast.base.VarDeclType import prog8.ast.expressions.ContainmentCheck import prog8.ast.expressions.StringLiteralValue -import prog8.ast.statements.Block -import prog8.ast.statements.Subroutine -import prog8.ast.statements.VarDecl -import prog8.ast.statements.ZeropageWish +import prog8.ast.statements.* import prog8.compilerinterface.IMemSizer import prog8.compilerinterface.IStringEncoding import prog8.parser.SourceCode @@ -94,8 +91,8 @@ class Program(val name: String, .first { it is Block && it.name == internedStringsModuleName } as Block val varName = "string_${internedStringsBlock.statements.size}" val decl = VarDecl( - VarDeclType.VAR, DataType.STR, ZeropageWish.NOT_IN_ZEROPAGE, null, varName, string, - isArray = false, autogeneratedDontRemove = true, sharedWithAsm = false, subroutineParameter = null, position = string.position + VarDeclType.VAR, VarDeclOrigin.STRINGLITERAL, DataType.STR, ZeropageWish.NOT_IN_ZEROPAGE, null, varName, string, + isArray = false, sharedWithAsm = false, subroutineParameter = null, position = string.position ) internedStringsBlock.statements.add(decl) decl.linkParents(internedStringsBlock) diff --git a/compilerAst/src/prog8/ast/antlr/Antlr2Kotlin.kt b/compilerAst/src/prog8/ast/antlr/Antlr2Kotlin.kt index 27000f1fd..e24551af1 100644 --- a/compilerAst/src/prog8/ast/antlr/Antlr2Kotlin.kt +++ b/compilerAst/src/prog8/ast/antlr/Antlr2Kotlin.kt @@ -9,7 +9,6 @@ import prog8.parser.Prog8ANTLRParser import prog8.parser.SourceCode import java.nio.file.Path import kotlin.io.path.isRegularFile -import kotlin.math.exp /***************** Antlr Extension methods to create AST ****************/ @@ -56,14 +55,13 @@ private fun Prog8ANTLRParser.VariabledeclarationContext.toAst() : Statement { varinitializer()?.let { val vd = it.vardecl() return VarDecl( - VarDeclType.VAR, + VarDeclType.VAR, VarDeclOrigin.USERCODE, vd.datatype()?.toAst() ?: DataType.UNDEFINED, if (vd.ZEROPAGE() != null) ZeropageWish.PREFER_ZEROPAGE else ZeropageWish.DONTCARE, vd.arrayindex()?.toAst(), vd.varname.text, it.expression().toAst(), vd.ARRAYSIG() != null || vd.arrayindex() != null, - false, vd.SHARED()!=null, null, it.toPosition() @@ -74,14 +72,13 @@ private fun Prog8ANTLRParser.VariabledeclarationContext.toAst() : Statement { val cvarinit = it.varinitializer() val vd = cvarinit.vardecl() return VarDecl( - VarDeclType.CONST, + VarDeclType.CONST, VarDeclOrigin.USERCODE, vd.datatype()?.toAst() ?: DataType.UNDEFINED, if (vd.ZEROPAGE() != null) ZeropageWish.PREFER_ZEROPAGE else ZeropageWish.DONTCARE, vd.arrayindex()?.toAst(), vd.varname.text, cvarinit.expression().toAst(), vd.ARRAYSIG() != null || vd.arrayindex() != null, - false, vd.SHARED() != null, null, cvarinit.toPosition() @@ -92,14 +89,13 @@ private fun Prog8ANTLRParser.VariabledeclarationContext.toAst() : Statement { val mvarinit = it.varinitializer() val vd = mvarinit.vardecl() return VarDecl( - VarDeclType.MEMORY, + VarDeclType.MEMORY, VarDeclOrigin.USERCODE, vd.datatype()?.toAst() ?: DataType.UNDEFINED, if (vd.ZEROPAGE() != null) ZeropageWish.PREFER_ZEROPAGE else ZeropageWish.DONTCARE, vd.arrayindex()?.toAst(), vd.varname.text, mvarinit.expression().toAst(), vd.ARRAYSIG() != null || vd.arrayindex() != null, - false, vd.SHARED()!=null, null, mvarinit.toPosition() @@ -606,14 +602,13 @@ private fun Prog8ANTLRParser.When_choiceContext.toAst(): WhenChoice { private fun Prog8ANTLRParser.VardeclContext.toAst(): VarDecl { return VarDecl( - VarDeclType.VAR, + VarDeclType.VAR, VarDeclOrigin.USERCODE, datatype()?.toAst() ?: DataType.UNDEFINED, if(ZEROPAGE() != null) ZeropageWish.PREFER_ZEROPAGE else ZeropageWish.DONTCARE, arrayindex()?.toAst(), varname.text, null, ARRAYSIG() != null || arrayindex() != null, - false, SHARED()!=null, null, toPosition() diff --git a/compilerAst/src/prog8/ast/expressions/AstExpressions.kt b/compilerAst/src/prog8/ast/expressions/AstExpressions.kt index b008fdb29..c3d46e191 100644 --- a/compilerAst/src/prog8/ast/expressions/AstExpressions.kt +++ b/compilerAst/src/prog8/ast/expressions/AstExpressions.kt @@ -902,7 +902,7 @@ data class IdentifierReference(val nameInSource: List, override val posi fun wasStringLiteral(program: Program): Boolean { val decl = targetVarDecl(program) - if(decl == null || !decl.autogeneratedDontRemove) + if(decl == null || decl.origin!=VarDeclOrigin.STRINGLITERAL) return false val scope=decl.definingModule diff --git a/compilerAst/src/prog8/ast/statements/AstStatements.kt b/compilerAst/src/prog8/ast/statements/AstStatements.kt index c0520ff36..0f9e75184 100644 --- a/compilerAst/src/prog8/ast/statements/AstStatements.kt +++ b/compilerAst/src/prog8/ast/statements/AstStatements.kt @@ -171,17 +171,24 @@ enum class ZeropageWish { NOT_IN_ZEROPAGE } +enum class VarDeclOrigin { + USERCODE, + SUBROUTINEPARAM, + STRINGLITERAL, + ARRAYLITERAL +} + class VarDecl(val type: VarDeclType, - private val declaredDatatype: DataType, - var zeropage: ZeropageWish, - var arraysize: ArrayIndex?, - override val name: String, - var value: Expression?, - val isArray: Boolean, - val autogeneratedDontRemove: Boolean, - val sharedWithAsm: Boolean, - val subroutineParameter: SubroutineParameter?, - override val position: Position) : Statement(), INamedStatement { + val origin: VarDeclOrigin, + private val declaredDatatype: DataType, + var zeropage: ZeropageWish, + var arraysize: ArrayIndex?, + override val name: String, + var value: Expression?, + val isArray: Boolean, + val sharedWithAsm: Boolean, + val subroutineParameter: SubroutineParameter?, + override val position: Position) : Statement(), INamedStatement { override lateinit var parent: Node var allowInitializeWithZero = true @@ -191,9 +198,8 @@ class VarDecl(val type: VarDeclType, private var autoHeapValueSequenceNumber = 0 fun fromParameter(param: SubroutineParameter): VarDecl { - return VarDecl(VarDeclType.VAR, param.type, ZeropageWish.DONTCARE, null, param.name, null, + return VarDecl(VarDeclType.VAR, VarDeclOrigin.SUBROUTINEPARAM, param.type, ZeropageWish.DONTCARE, null, param.name, null, isArray = false, - autogeneratedDontRemove = true, sharedWithAsm = false, subroutineParameter = param, position = param.position @@ -205,8 +211,8 @@ class VarDecl(val type: VarDeclType, val arrayDt = array.type.getOrElse { throw FatalAstException("unknown dt") } val declaredType = ArrayToElementTypes.getValue(arrayDt) val arraysize = ArrayIndex.forArray(array) - return VarDecl(VarDeclType.VAR, declaredType, ZeropageWish.NOT_IN_ZEROPAGE, arraysize, autoVarName, array, - isArray = true, autogeneratedDontRemove = true, sharedWithAsm = false, subroutineParameter = null, position = array.position) + return VarDecl(VarDeclType.VAR, VarDeclOrigin.ARRAYLITERAL, declaredType, ZeropageWish.NOT_IN_ZEROPAGE, arraysize, autoVarName, array, + isArray = true, sharedWithAsm = false, subroutineParameter = null, position = array.position) } fun defaultZero(dt: DataType, position: Position) = when(dt) { @@ -260,10 +266,10 @@ class VarDecl(val type: VarDeclType, } override fun copy(): VarDecl { - val c = VarDecl(type, declaredDatatype, zeropage, arraysize?.copy(), name, value?.copy(), - isArray, autogeneratedDontRemove, sharedWithAsm, subroutineParameter, position) - c.allowInitializeWithZero = this.allowInitializeWithZero - return c + val copy = VarDecl(type, origin, declaredDatatype, zeropage, arraysize?.copy(), name, value?.copy(), + isArray, sharedWithAsm, subroutineParameter, position) + copy.allowInitializeWithZero = this.allowInitializeWithZero + return copy } } diff --git a/docs/source/todo.rst b/docs/source/todo.rst index 44299c7c1..96a8f4f7c 100644 --- a/docs/source/todo.rst +++ b/docs/source/todo.rst @@ -21,7 +21,6 @@ Blocked by an official Commander-x16 r39 release Future Things and Ideas ^^^^^^^^^^^^^^^^^^^^^^^ -- clean up VarDecl.autogeneratedDontRemove -> make it explicit why it's autogenerated (i.e. special type of VarDecl) - mark the initialization assignment to a vardecl as such - can we promise a left-to-right function call argument evaluation? without sacrificing performance - unify FunctioncallExpression + FunctioncallStatement and PipeExpression + Pipe statement, may require moving Expression/Statement into interfaces instead of abstract base classes diff --git a/examples/test.p8 b/examples/test.p8 index f78e38146..2514fc2de 100644 --- a/examples/test.p8 +++ b/examples/test.p8 @@ -8,12 +8,17 @@ main { uword ww ubyte bb + derp("aaaa") bb = ww==0 bb++ if ww==0 { bb++ } + sub derp(str name) { + txt.print(name) + } + ; fl = 1.234 |> addfloat1 |> addfloat2 |> addfloat3 ; floats.print_f(fl) ; txt.nl()