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https://github.com/irmen/prog8.git
synced 2026-04-20 11:17:01 +00:00
ir/vm: syscall params in high base register to avoid push/pop
This commit is contained in:
Irmen de Jong
@@ -71,11 +71,11 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
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else -> throw IllegalArgumentException("weird type")
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}
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val result = mutableListOf<IRCodeChunkBase>()
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result += exprGen.translateExpression(call.args[0], 0, -1)
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result += exprGen.translateExpression(call.args[0], SyscallRegisterBase, -1)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = 1, value = array.length)
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
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it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
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if (resultRegister != 0)
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if(resultRegister!=0)
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it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1 = resultRegister, reg2 = 0)
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}
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return result
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@@ -94,11 +94,11 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
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else -> throw IllegalArgumentException("weird type")
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}
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val result = mutableListOf<IRCodeChunkBase>()
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result += exprGen.translateExpression(call.args[0], 0, -1)
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result += exprGen.translateExpression(call.args[0], SyscallRegisterBase, -1)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = 1, value = array.length)
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
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it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
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if (resultRegister != 0)
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if(resultRegister!=0)
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it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1 = resultRegister, reg2 = 0)
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}
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return result
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@@ -213,9 +213,9 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
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else -> throw IllegalArgumentException("weird type to reverse")
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}
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val result = mutableListOf<IRCodeChunkBase>()
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result += exprGen.translateExpression(call.args[0], 0, -1)
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result += exprGen.translateExpression(call.args[0], SyscallRegisterBase, -1)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = 1, value = array.length)
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
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it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
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}
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return result
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@@ -235,9 +235,9 @@ internal class BuiltinFuncGen(private val codeGen: IRCodeGen, private val exprGe
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else -> throw IllegalArgumentException("weird type to sort")
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}
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val result = mutableListOf<IRCodeChunkBase>()
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result += exprGen.translateExpression(call.args[0], 0, -1)
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result += exprGen.translateExpression(call.args[0], SyscallRegisterBase, -1)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = 1, value = array.length)
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = SyscallRegisterBase+1, value = array.length)
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it += IRInstruction(Opcode.SYSCALL, value = syscall.number)
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}
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return result
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@@ -10,7 +10,7 @@ import prog8.intermediate.*
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internal class ExpressionGen(private val codeGen: IRCodeGen) {
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fun translateExpression(expr: PtExpression, resultRegister: Int, resultFpRegister: Int): IRCodeChunks {
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require(codeGen.registers.peekNext() > resultRegister)
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require(codeGen.registers.peekNext() > resultRegister || resultRegister >= SyscallRegisterBase)
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return when (expr) {
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is PtMachineRegister -> {
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@@ -101,49 +101,33 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
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val iterable = codeGen.symbolTable.flat.getValue(check.iterable.targetName) as StStaticVariable
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when(iterable.dt) {
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DataType.STR -> {
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val push = IRCodeChunk(null, null)
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push += IRInstruction(Opcode.PUSH, IRDataType.WORD, reg1=1)
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result += push
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result += translateExpression(check.element, 0, -1)
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result += translateExpression(check.iterable, 1, -1)
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val syscall = IRCodeChunk(null, null)
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syscall += IRInstruction(Opcode.SYSCALL, value = IMSyscall.STRING_CONTAINS.number)
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syscall += IRInstruction(Opcode.POP, IRDataType.WORD, reg1=1)
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if(resultRegister!=0)
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syscall += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1=resultRegister, reg2=0)
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result += syscall
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result += translateExpression(check.element, SyscallRegisterBase, -1)
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result += translateExpression(check.iterable, SyscallRegisterBase+1, -1)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.SYSCALL, value = IMSyscall.STRING_CONTAINS.number)
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if(resultRegister!=0)
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it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1=resultRegister, reg2=0)
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}
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}
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DataType.ARRAY_UB, DataType.ARRAY_B -> {
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val push = IRCodeChunk(null, null)
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push += IRInstruction(Opcode.PUSH, IRDataType.WORD, reg1=1)
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push += IRInstruction(Opcode.PUSH, IRDataType.BYTE, reg1=2)
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result += push
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result += translateExpression(check.element, 0, -1)
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result += translateExpression(check.iterable, 1, -1)
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val syscall = IRCodeChunk(null, null)
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syscall += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=2, value = iterable.length!!)
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syscall += IRInstruction(Opcode.SYSCALL, value = IMSyscall.BYTEARRAY_CONTAINS.number)
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syscall += IRInstruction(Opcode.POP, IRDataType.BYTE, reg1=2)
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syscall += IRInstruction(Opcode.POP, IRDataType.WORD, reg1=1)
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if(resultRegister!=0)
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syscall += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1=resultRegister, reg2=0)
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result += syscall
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result += translateExpression(check.element, SyscallRegisterBase, -1)
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result += translateExpression(check.iterable, SyscallRegisterBase+1, -1)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=SyscallRegisterBase+2, value = iterable.length!!)
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it += IRInstruction(Opcode.SYSCALL, value = IMSyscall.BYTEARRAY_CONTAINS.number)
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if(resultRegister!=0)
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it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1=resultRegister, reg2=0)
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}
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}
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DataType.ARRAY_UW, DataType.ARRAY_W -> {
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val push = IRCodeChunk(null, null)
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push += IRInstruction(Opcode.PUSH, IRDataType.WORD, reg1=1)
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push += IRInstruction(Opcode.PUSH, IRDataType.BYTE, reg1=2)
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result += push
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result += translateExpression(check.element, 0, -1)
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result += translateExpression(check.iterable, 1, -1)
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val syscall = IRCodeChunk(null, null)
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syscall += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=2, value = iterable.length!!)
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syscall += IRInstruction(Opcode.SYSCALL, value = IMSyscall.WORDARRAY_CONTAINS.number)
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syscall += IRInstruction(Opcode.POP, IRDataType.BYTE, reg1=2)
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syscall += IRInstruction(Opcode.POP, IRDataType.WORD, reg1=1)
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if(resultRegister!=0)
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syscall += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1=resultRegister, reg2=0)
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result += syscall
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result += translateExpression(check.element, SyscallRegisterBase, -1)
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result += translateExpression(check.iterable, SyscallRegisterBase+1, -1)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=SyscallRegisterBase+2, value = iterable.length!!)
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it += IRInstruction(Opcode.SYSCALL, value = IMSyscall.WORDARRAY_CONTAINS.number)
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if(resultRegister!=0)
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it += IRInstruction(Opcode.LOADR, IRDataType.BYTE, reg1=resultRegister, reg2=0)
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}
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}
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DataType.ARRAY_F -> throw AssemblyError("containment check in float-array not supported")
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else -> throw AssemblyError("weird iterable dt ${iterable.dt} for ${check.iterable.targetName}")
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@@ -332,23 +316,18 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
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addInstr(result, IRInstruction(ins, IRDataType.BYTE, reg1 = resultRegister, reg2 = zeroRegister), null)
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} else {
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if(binExpr.left.type==DataType.STR && binExpr.right.type==DataType.STR) {
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require(codeGen.registers.peekNext() > 1)
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val push = IRCodeChunk(null, null)
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push += IRInstruction(Opcode.PUSH, IRDataType.WORD, reg1=1)
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result += push
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result += translateExpression(binExpr.left, 0, -1)
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result += translateExpression(binExpr.right, 1, -1)
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val syscall = IRCodeChunk(null, null)
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syscall += IRInstruction(Opcode.SYSCALL, value = IMSyscall.COMPARE_STRINGS.number)
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if(resultRegister!=0)
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syscall += IRInstruction(Opcode.LOADR, vmDt, reg1=resultRegister, reg2=0)
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syscall += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=1, value=0)
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syscall += if(greaterEquals)
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IRInstruction(Opcode.SGES, IRDataType.BYTE, reg1=resultRegister, reg2=1)
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else
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IRInstruction(Opcode.SGTS, IRDataType.BYTE, reg1=resultRegister, reg2=1)
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syscall += IRInstruction(Opcode.POP, IRDataType.WORD, reg1=1)
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result += syscall
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result += translateExpression(binExpr.left, SyscallRegisterBase, -1)
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result += translateExpression(binExpr.right, SyscallRegisterBase+1, -1)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.SYSCALL, value = IMSyscall.COMPARE_STRINGS.number)
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if(resultRegister!=0)
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it += IRInstruction(Opcode.LOADR, vmDt, reg1 = resultRegister, reg2 = 0)
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = 1, value = 0)
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it += if (greaterEquals)
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IRInstruction(Opcode.SGES, IRDataType.BYTE, reg1 = resultRegister, reg2 = 1)
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else
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IRInstruction(Opcode.SGTS, IRDataType.BYTE, reg1 = resultRegister, reg2 = 1)
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}
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} else {
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val rightResultReg = codeGen.registers.nextFree()
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result += translateExpression(binExpr.left, resultRegister, -1)
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@@ -388,23 +367,18 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
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addInstr(result, IRInstruction(ins, IRDataType.BYTE, reg1 = resultRegister, reg2 = zeroRegister), null)
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} else {
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if(binExpr.left.type==DataType.STR && binExpr.right.type==DataType.STR) {
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require(codeGen.registers.peekNext() > 1)
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val push = IRCodeChunk(null, null)
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push += IRInstruction(Opcode.PUSH, IRDataType.WORD, reg1=1)
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result += push
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result += translateExpression(binExpr.left, 0, -1)
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result += translateExpression(binExpr.right, 1, -1)
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val syscall = IRCodeChunk(null, null)
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syscall += IRInstruction(Opcode.SYSCALL, value = IMSyscall.COMPARE_STRINGS.number)
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if(resultRegister!=0)
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syscall += IRInstruction(Opcode.LOADR, vmDt, reg1=resultRegister, reg2=0)
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syscall += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1=1, value=0)
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syscall += if(lessEquals)
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IRInstruction(Opcode.SLES, IRDataType.BYTE, reg1=resultRegister, reg2=1)
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else
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IRInstruction(Opcode.SLTS, IRDataType.BYTE, reg1=resultRegister, reg2=1)
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syscall += IRInstruction(Opcode.POP, IRDataType.WORD, reg1=1)
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result += syscall
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result += translateExpression(binExpr.left, SyscallRegisterBase, -1)
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result += translateExpression(binExpr.right, SyscallRegisterBase+1, -1)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.SYSCALL, value = IMSyscall.COMPARE_STRINGS.number)
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if(resultRegister!=0)
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it += IRInstruction(Opcode.LOADR, vmDt, reg1 = resultRegister, reg2 = 0)
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it += IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = 1, value = 0)
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it += if (lessEquals)
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IRInstruction(Opcode.SLES, IRDataType.BYTE, reg1 = resultRegister, reg2 = 1)
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else
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IRInstruction(Opcode.SLTS, IRDataType.BYTE, reg1 = resultRegister, reg2 = 1)
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}
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} else {
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val rightResultReg = codeGen.registers.nextFree()
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result += translateExpression(binExpr.left, resultRegister, -1)
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@@ -440,21 +414,16 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
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}
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} else {
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if(binExpr.left.type==DataType.STR && binExpr.right.type==DataType.STR) {
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require(codeGen.registers.peekNext() > 1)
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val push = IRCodeChunk(null, null)
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push += IRInstruction(Opcode.PUSH, IRDataType.WORD, reg1=1)
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result += push
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result += translateExpression(binExpr.left, 0, -1)
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result += translateExpression(binExpr.right, 1, -1)
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val syscall = IRCodeChunk(null, null)
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syscall += IRInstruction(Opcode.SYSCALL, value = IMSyscall.COMPARE_STRINGS.number)
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syscall += IRInstruction(Opcode.POP, IRDataType.WORD, reg1=1)
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if(resultRegister!=0)
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syscall += IRInstruction(Opcode.LOADR, vmDt, reg1=resultRegister, reg2=0)
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if(!notEquals)
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syscall += IRInstruction(Opcode.INV, vmDt, reg1=resultRegister)
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syscall += IRInstruction(Opcode.AND, vmDt, reg1=resultRegister, value=1)
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result += syscall
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result += translateExpression(binExpr.left, SyscallRegisterBase, -1)
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result += translateExpression(binExpr.right, SyscallRegisterBase+1, -1)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.SYSCALL, value = IMSyscall.COMPARE_STRINGS.number)
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if(resultRegister!=0)
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it += IRInstruction(Opcode.LOADR, vmDt, reg1 = resultRegister, reg2 = 0)
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if (!notEquals)
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it += IRInstruction(Opcode.INV, vmDt, reg1 = resultRegister)
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it += IRInstruction(Opcode.AND, vmDt, reg1 = resultRegister, value = 1)
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}
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} else {
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val rightResultReg = codeGen.registers.nextFree()
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result += translateExpression(binExpr.left, resultRegister, -1)
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@@ -1,10 +1,12 @@
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package prog8.codegen.intermediate
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import prog8.code.core.AssemblyError
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import prog8.intermediate.SyscallRegisterBase
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internal class RegisterPool {
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private var firstFree: Int=3 // integer registers 0,1,2 are reserved
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private var firstFreeFloat: Int=0
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// reserve 0,1,2 for return values of subroutine calls and syscalls
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private var firstFree: Int=3
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private var firstFreeFloat: Int=3
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fun peekNext() = firstFree
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fun peekNextFloat() = firstFreeFloat
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@@ -12,7 +14,7 @@ internal class RegisterPool {
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fun nextFree(): Int {
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val result = firstFree
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firstFree++
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if(firstFree>65535)
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if(firstFree >= SyscallRegisterBase)
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throw AssemblyError("out of virtual registers (int)")
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return result
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}
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@@ -20,7 +22,7 @@ internal class RegisterPool {
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fun nextFreeFloat(): Int {
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val result = firstFreeFloat
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firstFreeFloat++
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if(firstFreeFloat>65535)
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if(firstFreeFloat >= SyscallRegisterBase)
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throw AssemblyError("out of virtual registers (fp)")
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return result
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}
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