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https://github.com/irmen/prog8.git
synced 2024-11-23 07:32:10 +00:00
function call register args code consolidation, fix asm for loading word value from variable into register
This commit is contained in:
Irmen de Jong
parent
a5d97b326e
commit
3ada0fdf84
@ -4,14 +4,11 @@ import prog8.ast.IFunctionCall
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import prog8.ast.Program
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import prog8.ast.base.*
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import prog8.ast.expressions.*
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import prog8.ast.statements.AssignTarget
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import prog8.ast.statements.Assignment
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import prog8.ast.statements.Subroutine
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import prog8.ast.statements.SubroutineParameter
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import prog8.compiler.AssemblyError
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import prog8.compiler.target.c64.C64MachineDefinition.ESTACK_HI_HEX
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import prog8.compiler.target.c64.C64MachineDefinition.ESTACK_LO_HEX
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import prog8.compiler.toHex
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import prog8.compiler.target.c64.codegen.assignment.*
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internal class FunctionCallAsmGen(private val program: Program, private val asmgen: AsmGen) {
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@ -52,7 +49,7 @@ internal class FunctionCallAsmGen(private val program: Program, private val asmg
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}
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else -> {
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// Risk of clobbering due to complex expression args. Work via the stack.
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argsViaStackEvaluation(stmt, sub)
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registerArgsViaStackEvaluation(stmt, sub)
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}
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}
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}
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@ -64,34 +61,34 @@ internal class FunctionCallAsmGen(private val program: Program, private val asmg
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asmgen.out(" ldx c64.SCRATCH_ZPREGX") // restore X again
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}
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private fun argsViaStackEvaluation(stmt: IFunctionCall, sub: Subroutine) {
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private fun registerArgsViaStackEvaluation(stmt: IFunctionCall, sub: Subroutine) {
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// this is called when one or more of the arguments are 'complex' and
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// cannot be assigned to a register easily or risk clobbering other registers.
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for (arg in stmt.args.reversed())
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asmgen.translateExpression(arg)
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for (regparam in sub.asmParameterRegisters) {
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when (regparam.registerOrPair) {
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RegisterOrPair.A -> asmgen.out(" inx | lda $ESTACK_LO_HEX,x")
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RegisterOrPair.X -> throw AssemblyError("can't pop into X register - use a variable instead")
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RegisterOrPair.Y -> asmgen.out(" inx | ldy $ESTACK_LO_HEX,x")
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RegisterOrPair.AX -> throw AssemblyError("can't pop into X register - use a variable instead")
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RegisterOrPair.AY -> asmgen.out(" inx | lda $ESTACK_LO_HEX,x | ldy $ESTACK_HI_HEX,x")
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RegisterOrPair.XY -> throw AssemblyError("can't pop into X register - use a variable instead")
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null -> {
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}
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}
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when (regparam.statusflag) {
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Statusflag.Pc -> asmgen.out("""
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when {
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regparam.statusflag==Statusflag.Pc -> {
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asmgen.out("""
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inx
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pha
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lda $ESTACK_LO_HEX,x
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beq +
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sec
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bcs ++
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+ clc
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+ pla
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""")
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null -> {
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+ clc
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+ pla""")
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}
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else -> throw AssemblyError("can only use Carry as status flag parameter")
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regparam.statusflag!=null -> {
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throw AssemblyError("can only use Carry as status flag parameter")
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}
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regparam.registerOrPair!=null -> {
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val tgt = AsmAssignTarget.fromRegisters(regparam.registerOrPair, program, asmgen)
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val source = AsmAssignSource(SourceStorageKind.STACK, program, tgt.datatype)
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val asgn = AsmAssignment(source, tgt, false, Position.DUMMY)
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asmgen.translateNormalAssignment(asgn)
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}
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else -> {}
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}
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}
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}
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@ -102,16 +99,16 @@ internal class FunctionCallAsmGen(private val program: Program, private val asmg
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if(!valueIDt.isKnown)
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throw AssemblyError("arg type unknown")
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val valueDt = valueIDt.typeOrElse(DataType.STRUCT)
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if(!argumentTypeCompatible(valueDt, parameter.value.type))
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if(!isArgumentTypeCompatible(valueDt, parameter.value.type))
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throw AssemblyError("argument type incompatible")
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val paramVar = parameter.value
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val scopedParamVar = (sub.scopedname+"."+paramVar.name).split(".")
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val target = AssignTarget(IdentifierReference(scopedParamVar, sub.position), null, null, sub.position)
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val assign = Assignment(target, value, value.position)
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assign.linkParents(value.parent)
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asmgen.translate(assign)
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val scopedParamVar = (sub.scopedname+"."+parameter.value.name).split(".")
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val identifier = IdentifierReference(scopedParamVar, sub.position)
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identifier.linkParents(value.parent)
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val tgt = AsmAssignTarget(TargetStorageKind.VARIABLE, program, asmgen, parameter.value.type, variable = identifier)
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val source = AsmAssignSource.fromAstSource(value, program).adjustDataTypeToTarget(tgt)
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val asgn = AsmAssignment(source, tgt, false, Position.DUMMY)
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asmgen.translateNormalAssignment(asgn)
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}
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private fun argumentViaRegister(sub: Subroutine, parameter: IndexedValue<SubroutineParameter>, value: Expression) {
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@ -120,7 +117,7 @@ internal class FunctionCallAsmGen(private val program: Program, private val asmg
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if(!valueIDt.isKnown)
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throw AssemblyError("arg type unknown")
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val valueDt = valueIDt.typeOrElse(DataType.STRUCT)
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if(!argumentTypeCompatible(valueDt, parameter.value.type))
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if(!isArgumentTypeCompatible(valueDt, parameter.value.type))
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throw AssemblyError("argument type incompatible")
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val paramRegister = sub.asmParameterRegisters[parameter.index]
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@ -171,80 +168,22 @@ internal class FunctionCallAsmGen(private val program: Program, private val asmg
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}
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else throw AssemblyError("can only use Carry as status flag parameter")
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}
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register!=null && register.name.length==1 -> {
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when (value) {
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is NumericLiteralValue -> {
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asmgen.out(" ld${register.name.toLowerCase()} #${value.number.toInt().toHex()}")
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}
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is IdentifierReference -> {
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asmgen.out(" ld${register.name.toLowerCase()} ${asmgen.asmIdentifierName(value)}")
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}
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// TODO more special cases to optimize argument passing in registers without intermediate stack usage
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else -> {
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asmgen.translateExpression(value)
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when(register) {
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RegisterOrPair.A -> asmgen.out(" inx | lda $ESTACK_LO_HEX,x")
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RegisterOrPair.X -> throw AssemblyError("can't pop into X register - use a variable instead")
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RegisterOrPair.Y -> asmgen.out(" inx | ldy $ESTACK_LO_HEX,x")
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else -> throw AssemblyError("cannot assign to register pair")
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}
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}
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}
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}
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register!=null && register.name.length==2 -> {
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// register pair as a 16-bit value (only possible for subroutine parameters)
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when (value) {
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is NumericLiteralValue -> {
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// optimize when the argument is a constant literal
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val hex = value.number.toHex()
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when (register) {
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RegisterOrPair.AX -> asmgen.out(" lda #<$hex | ldx #>$hex")
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RegisterOrPair.AY -> asmgen.out(" lda #<$hex | ldy #>$hex")
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RegisterOrPair.XY -> asmgen.out(" ldx #<$hex | ldy #>$hex")
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else -> {}
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}
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}
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is AddressOf -> {
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// optimize when the argument is an address of something
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val sourceName = asmgen.asmIdentifierName(value.identifier)
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when (register) {
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RegisterOrPair.AX -> asmgen.out(" lda #<$sourceName | ldx #>$sourceName")
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RegisterOrPair.AY -> asmgen.out(" lda #<$sourceName | ldy #>$sourceName")
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RegisterOrPair.XY -> asmgen.out(" ldx #<$sourceName | ldy #>$sourceName")
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else -> {}
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}
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}
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is IdentifierReference -> {
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val sourceName = asmgen.asmIdentifierName(value)
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if(valueDt in PassByReferenceDatatypes) {
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when (register) {
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RegisterOrPair.AX -> asmgen.out(" lda #<$sourceName | ldx #>$sourceName")
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RegisterOrPair.AY -> asmgen.out(" lda #<$sourceName | ldy #>$sourceName")
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RegisterOrPair.XY -> asmgen.out(" ldx #<$sourceName | ldy #>$sourceName")
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else -> {}
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}
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} else {
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when (register) {
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RegisterOrPair.AX -> asmgen.out(" lda $sourceName | ldx $sourceName+1")
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RegisterOrPair.AY -> asmgen.out(" lda $sourceName | ldy $sourceName+1")
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RegisterOrPair.XY -> asmgen.out(" ldx $sourceName | ldy $sourceName+1")
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else -> {}
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}
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}
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}
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else -> {
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asmgen.translateExpression(value)
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if (register == RegisterOrPair.AX || register == RegisterOrPair.XY)
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throw AssemblyError("can't use X register here - use a variable")
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else if (register == RegisterOrPair.AY)
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asmgen.out(" inx | lda $ESTACK_LO_HEX,x | ldy $ESTACK_HI_HEX,x")
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}
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else -> {
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// via register or register pair
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val target = AsmAssignTarget.fromRegisters(register!!, program, asmgen)
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val src = if(valueDt in PassByReferenceDatatypes) {
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val addr = AddressOf(value as IdentifierReference, Position.DUMMY)
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AsmAssignSource.fromAstSource(addr, program).adjustDataTypeToTarget(target)
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} else {
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AsmAssignSource.fromAstSource(value, program).adjustDataTypeToTarget(target)
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}
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asmgen.translateNormalAssignment(AsmAssignment(src, target, false, Position.DUMMY))
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}
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}
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}
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private fun argumentTypeCompatible(argType: DataType, paramType: DataType): Boolean {
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private fun isArgumentTypeCompatible(argType: DataType, paramType: DataType): Boolean {
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if(argType isAssignableTo paramType)
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return true
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if(argType in ByteDatatypes && paramType in ByteDatatypes)
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@ -32,12 +32,12 @@ internal class AsmAssignTarget(val kind: TargetStorageKind,
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program: Program,
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asmgen: AsmGen,
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val datatype: DataType,
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val variable: IdentifierReference?,
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val array: ArrayIndexedExpression?,
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val memory: DirectMemoryWrite?,
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val register: RegisterOrPair?,
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val origAstTarget: AssignTarget?, // TODO get rid of this eventually?
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)
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val variable: IdentifierReference? = null,
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val array: ArrayIndexedExpression? = null,
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val memory: DirectMemoryWrite? = null,
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val register: RegisterOrPair? = null,
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val origAstTarget: AssignTarget? = null // TODO get rid of this eventually?
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)
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{
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val constMemoryAddress by lazy { memory?.addressExpression?.constValue(program)?.number?.toInt() ?: 0}
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val constArrayIndexValue by lazy { array?.arrayspec?.constIndex() }
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@ -62,12 +62,22 @@ internal class AsmAssignTarget(val kind: TargetStorageKind,
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fun fromAstAssignment(assign: Assignment, program: Program, asmgen: AsmGen): AsmAssignTarget = with(assign.target) {
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val dt = inferType(program, assign).typeOrElse(DataType.STRUCT)
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when {
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identifier != null -> AsmAssignTarget(TargetStorageKind.VARIABLE, program, asmgen, dt, identifier, null, null, null, this)
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arrayindexed != null -> AsmAssignTarget(TargetStorageKind.ARRAY, program, asmgen, dt, null, arrayindexed, null, null, this)
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memoryAddress != null -> AsmAssignTarget(TargetStorageKind.MEMORY, program, asmgen, dt, null, null, memoryAddress, null, this)
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identifier != null -> AsmAssignTarget(TargetStorageKind.VARIABLE, program, asmgen, dt, variable=identifier, origAstTarget = this)
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arrayindexed != null -> AsmAssignTarget(TargetStorageKind.ARRAY, program, asmgen, dt, array = arrayindexed, origAstTarget = this)
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memoryAddress != null -> AsmAssignTarget(TargetStorageKind.MEMORY, program, asmgen, dt, memory = memoryAddress, origAstTarget = this)
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else -> throw AssemblyError("weird target")
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}
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}
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fun fromRegisters(registers: RegisterOrPair, program: Program, asmgen: AsmGen): AsmAssignTarget =
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when(registers) {
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RegisterOrPair.A,
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RegisterOrPair.X,
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RegisterOrPair.Y -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, DataType.UBYTE, register = registers)
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RegisterOrPair.AX,
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RegisterOrPair.AY,
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RegisterOrPair.XY -> AsmAssignTarget(TargetStorageKind.REGISTER, program, asmgen, DataType.UWORD, register = registers)
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}
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}
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}
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@ -283,9 +283,9 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
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}
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TargetStorageKind.REGISTER -> {
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when(target.register!!) {
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RegisterOrPair.AX -> asmgen.out(" lda #<$sourceName | ldx #>$sourceName")
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RegisterOrPair.AY -> asmgen.out(" lda #<$sourceName | ldy #>$sourceName")
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RegisterOrPair.XY -> asmgen.out(" ldx #<$sourceName | ldy #>$sourceName")
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RegisterOrPair.AX -> asmgen.out(" lda #<$sourceName | ldx #>$sourceName")
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RegisterOrPair.AY -> asmgen.out(" lda #<$sourceName | ldy #>$sourceName")
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RegisterOrPair.XY -> asmgen.out(" ldx #<$sourceName | ldy #>$sourceName")
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else -> throw AssemblyError("can't load address in a single 8-bit register")
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}
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}
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@ -380,9 +380,9 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
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}
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TargetStorageKind.REGISTER -> {
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when(target.register!!) {
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RegisterOrPair.AX -> asmgen.out(" lda #$sourceName | ldx #$sourceName+1")
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RegisterOrPair.AY -> asmgen.out(" lda #$sourceName | ldy #$sourceName+1")
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RegisterOrPair.XY -> asmgen.out(" ldx #$sourceName | ldy #$sourceName+1")
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RegisterOrPair.AX -> asmgen.out(" lda $sourceName | ldx $sourceName+1")
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RegisterOrPair.AY -> asmgen.out(" lda $sourceName | ldy $sourceName+1")
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RegisterOrPair.XY -> asmgen.out(" ldx $sourceName | ldy $sourceName+1")
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else -> throw AssemblyError("can't load word in a single 8-bit register")
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}
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}
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@ -461,9 +461,9 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
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RegisterOrPair.A -> asmgen.out(" lda $sourceName")
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RegisterOrPair.X -> asmgen.out(" ldx $sourceName")
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RegisterOrPair.Y -> asmgen.out(" ldy $sourceName")
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RegisterOrPair.AX -> asmgen.out(" lda $sourceName | ldx #0")
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RegisterOrPair.AY -> asmgen.out(" lda $sourceName | ldy #0")
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RegisterOrPair.XY -> asmgen.out(" ldx $sourceName | ldy #0")
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RegisterOrPair.AX -> asmgen.out(" lda $sourceName | ldx #0")
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RegisterOrPair.AY -> asmgen.out(" lda $sourceName | ldy #0")
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RegisterOrPair.XY -> asmgen.out(" ldx $sourceName | ldy #0")
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}
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}
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TargetStorageKind.STACK -> TODO()
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@ -3,51 +3,13 @@
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main {
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ubyte[256] sieve
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ubyte candidate_prime = 2 ; is increased in the loop
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sub start() {
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ubyte x
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for x in 0 to 255 {
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sieve[x] = 0
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}
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; memset(sieve, 256, false) ; clear the sieve, to reset starting situation on subsequent runs
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uword lines = 1
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uword score = $1000
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; calculate primes
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c64scr.print("prime numbers up to 255:\n\n")
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ubyte amount=0
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repeat {
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ubyte prime = find_next_prime()
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if prime==0
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break
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c64scr.print_ub(prime)
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c64scr.print(", ")
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amount++
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}
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c64scr.print_uw(lines)
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c64.CHROUT('\n')
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c64scr.print("number of primes (expected 54): ")
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c64scr.print_ub(amount)
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c64scr.print_uw(score)
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c64.CHROUT('\n')
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}
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sub find_next_prime() -> ubyte {
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while sieve[candidate_prime] {
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candidate_prime++
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if candidate_prime==0
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return 0 ; we wrapped; no more primes available in the sieve
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}
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; found next one, mark the multiples and return it.
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sieve[candidate_prime] = true
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uword multiple = candidate_prime
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while multiple < len(sieve) {
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sieve[lsb(multiple)] = true
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multiple += candidate_prime
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}
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return candidate_prime
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}
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}
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