mirror of
https://github.com/irmen/prog8.git
synced 2024-12-25 08:29:25 +00:00
added memtop to machine definition and asm source code check
added %memtop directive
This commit is contained in:
parent
6fb05bdefc
commit
3b798097b9
@ -14,6 +14,7 @@ class CompilationOptions(val output: OutputType,
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val compTarget: ICompilationTarget,
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// these are set later, based on command line arguments or options in the source code:
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var loadAddress: UInt,
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var memtopAddress: UInt,
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var warnSymbolShadowing: Boolean = false,
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var optimize: Boolean = false,
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var asmQuiet: Boolean = false,
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@ -14,6 +14,7 @@ interface IMachineDefinition {
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val FLOAT_MAX_POSITIVE: Double
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val FLOAT_MEM_SIZE: Int
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val PROGRAM_LOAD_ADDRESS : UInt
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val PROGRAM_TOP_ADDRESS: UInt
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val BSSHIGHRAM_START: UInt
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val BSSHIGHRAM_END: UInt
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val BSSGOLDENRAM_START: UInt
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@ -12,6 +12,7 @@ class AtariMachineDefinition: IMachineDefinition {
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override val FLOAT_MAX_NEGATIVE = -9.999999999e97
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override val FLOAT_MEM_SIZE = 6
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override val PROGRAM_LOAD_ADDRESS = 0x2000u
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override val PROGRAM_TOP_ADDRESS = 0xffffu // TODO what's memtop
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override val BSSHIGHRAM_START = 0u // TODO
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override val BSSHIGHRAM_END = 0u // TODO
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@ -14,6 +14,7 @@ class C128MachineDefinition: IMachineDefinition {
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override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE
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override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE
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override val PROGRAM_LOAD_ADDRESS = 0x1c01u
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override val PROGRAM_TOP_ADDRESS = 0xfeffu
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override val BSSHIGHRAM_START = 0u // TODO
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override val BSSHIGHRAM_END = 0u // TODO
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@ -15,6 +15,7 @@ class C64MachineDefinition: IMachineDefinition {
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override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE
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override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE
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override val PROGRAM_LOAD_ADDRESS = 0x0801u
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override val PROGRAM_TOP_ADDRESS = 0xbfffu
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override val BSSHIGHRAM_START = 0xc000u
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override val BSSHIGHRAM_END = 0xcfffu
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@ -14,6 +14,7 @@ class CX16MachineDefinition: IMachineDefinition {
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override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE
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override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE
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override val PROGRAM_LOAD_ADDRESS = 0x0801u
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override val PROGRAM_TOP_ADDRESS = 0x9effu
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override val BSSHIGHRAM_START = 0xa000u // hiram bank 1, 8Kb, assumed to be active
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override val BSSHIGHRAM_END = 0xbfffu // Rom starts at $c000
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@ -14,6 +14,7 @@ class PETMachineDefinition: IMachineDefinition {
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override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE
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override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE
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override val PROGRAM_LOAD_ADDRESS = 0x0401u
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override val PROGRAM_TOP_ADDRESS = 0x7fffu
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override val BSSHIGHRAM_START = 0u
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override val BSSHIGHRAM_END = 0u
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@ -14,6 +14,7 @@ class VirtualMachineDefinition: IMachineDefinition {
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override val FLOAT_MAX_NEGATIVE = -Float.MAX_VALUE.toDouble()
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override val FLOAT_MEM_SIZE = 8 // 64-bits double
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override val PROGRAM_LOAD_ADDRESS = 0u // not actually used
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override val PROGRAM_TOP_ADDRESS = 0xffffu // not actually used
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override val BSSHIGHRAM_START = 0u // not actually used
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override val BSSHIGHRAM_END = 0u // not actually used
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@ -284,6 +284,8 @@ internal class ProgramAndVarsGen(
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asmgen.out(" .cerror * > ${relocatedBssEnd.toHex()}, \"too many data for slabs_BSS section\"")
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}
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}
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asmgen.out(" ; memtop check")
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asmgen.out(" .cerror * > ${options.memtopAddress.toHex()}, \"Program too long by \", * - ${options.memtopAddress.toHex()}, \" bytes, memtop=${options.memtopAddress.toHex()}\"")
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}
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private fun block2asm(block: PtBlock) {
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@ -26,7 +26,8 @@ class TestCodegen: FunSpec({
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floats = true,
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noSysInit = false,
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compTarget = target,
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loadAddress = target.machine.PROGRAM_LOAD_ADDRESS
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loadAddress = target.machine.PROGRAM_LOAD_ADDRESS,
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memtopAddress = 0xffffu
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)
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}
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@ -22,7 +22,8 @@ class TestIRPeepholeOpt: FunSpec({
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floats = false,
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noSysInit = true,
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compTarget = target,
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loadAddress = target.machine.PROGRAM_LOAD_ADDRESS
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loadAddress = target.machine.PROGRAM_LOAD_ADDRESS,
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memtopAddress = 0xffffu
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)
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val prog = IRProgram("test", IRSymbolTable(), options, target)
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prog.addBlock(block)
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@ -23,7 +23,8 @@ class TestVmCodeGen: FunSpec({
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floats = true,
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noSysInit = false,
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compTarget = target,
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loadAddress = target.machine.PROGRAM_LOAD_ADDRESS
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loadAddress = target.machine.PROGRAM_LOAD_ADDRESS,
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memtopAddress = 0xffffu
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)
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}
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@ -263,6 +263,7 @@ internal fun determineProgramLoadAddress(program: Program, options: CompilationO
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}
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options.loadAddress = loadAddress
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options.memtopAddress = program.toplevelModule.memtopAddress?.first ?: options.compTarget.machine.PROGRAM_TOP_ADDRESS
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}
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@ -398,7 +399,7 @@ fun determineCompilationOptions(program: Program, compTarget: ICompilationTarget
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return CompilationOptions(
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outputType, launcherType,
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zpType, zpReserved, zpAllowed, floatsEnabled, noSysInit,
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compTarget, 0u
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compTarget, 0u, 0xffffu
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)
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}
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@ -110,7 +110,7 @@ class ModuleImporter(private val program: Program,
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private fun removeDirectivesFromImportedModule(importedModule: Module) {
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// Most global directives don't apply for imported modules, so remove them
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val moduleLevelDirectives = listOf("%output", "%launcher", "%zeropage", "%zpreserved", "%zpallowed", "%address")
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val moduleLevelDirectives = listOf("%output", "%launcher", "%zeropage", "%zpreserved", "%zpallowed", "%address", "%memtop")
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var directives = importedModule.statements.filterIsInstance<Directive>()
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importedModule.statements.removeAll(directives.toSet())
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directives = directives.filter{ it.directive !in moduleLevelDirectives }
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@ -57,7 +57,7 @@ internal class AstChecker(private val program: Program,
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val directives = module.statements.filterIsInstance<Directive>().groupBy { it.directive }
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directives.filter { it.value.size > 1 }.forEach{ entry ->
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when(entry.key) {
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"%output", "%launcher", "%zeropage", "%address", "%encoding" ->
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"%output", "%launcher", "%zeropage", "%address", "%memtop", "%encoding" ->
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entry.value.forEach { errors.err("directive can just occur once", it.position) }
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}
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}
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@ -962,6 +962,12 @@ internal class AstChecker(private val program: Program,
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if(directive.args.size!=1 || directive.args[0].int == null)
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err("invalid address directive, expected numeric address argument")
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}
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"%memtop" -> {
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if(directive.parent !is Module)
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err("this directive may only occur at module level")
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if(directive.args.size!=1 || directive.args[0].int == null)
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err("invalid memtop directive, expected numeric address argument")
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}
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"%import" -> {
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if(directive.parent !is Module)
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err("this directive may only occur at module level")
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@ -22,7 +22,7 @@ internal class StatementReorderer(
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// - sorts the choices in when statement.
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// - insert AddressOf (&) expression where required (string params to a UWORD function param etc.).
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private val directivesToMove = setOf("%output", "%launcher", "%zeropage", "%zpreserved", "%zpallowed", "%address", "%option", "%encoding")
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private val directivesToMove = setOf("%output", "%launcher", "%zeropage", "%zpreserved", "%zpallowed", "%address", "%memtop", "%option", "%encoding")
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override fun after(module: Module, parent: Node): Iterable<IAstModification> {
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val (blocks, other) = module.statements.partition { it is Block }
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@ -20,7 +20,8 @@ class TestGoldenRam: FunSpec({
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floats = true,
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noSysInit = false,
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compTarget = VMTarget(),
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loadAddress = 999u
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loadAddress = 999u,
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memtopAddress = 0xffffu
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)
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test("empty golden ram allocations") {
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@ -52,7 +52,8 @@ class TestAbstractZeropage: FunSpec({
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floats = false,
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noSysInit = false,
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compTarget = DummyCompilationTarget,
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loadAddress = 999u
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loadAddress = 999u,
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memtopAddress = 0xffffu
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)
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)
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zp.free.size shouldBe 256-6-16
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@ -70,7 +71,7 @@ class TestC64Zeropage: FunSpec({
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val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed,
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floats = false,
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noSysInit = false,
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compTarget = c64target, loadAddress = 999u
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compTarget = c64target, loadAddress = 999u, memtopAddress = 0xffffu
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))
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var result = zp.allocate("", DataType.UBYTE, null, null, errors)
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@ -85,33 +86,33 @@ class TestC64Zeropage: FunSpec({
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}
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test("testZpFloatEnable") {
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val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u))
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val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
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var result = zp.allocate("", DataType.FLOAT, null, null, errors)
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result.expectError { "should be allocation error due to disabled floats" }
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val zp2 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.DONTUSE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u))
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val zp2 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.DONTUSE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
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result = zp2.allocate("", DataType.FLOAT, null, null, errors)
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result.expectError { "should be allocation error due to disabled ZP use" }
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val zp3 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u))
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val zp3 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
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zp3.allocate("", DataType.FLOAT, null, null, errors)
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}
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test("testZpModesWithFloats") {
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u))
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u))
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u))
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u))
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u))
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u))
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
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shouldThrow<InternalCompilerException> {
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u))
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
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}
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shouldThrow<InternalCompilerException> {
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u))
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C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
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}
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}
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test("testZpDontuse") {
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val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.DONTUSE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u))
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val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.DONTUSE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
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println(zp.free)
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zp.availableBytes() shouldBe 0
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val result = zp.allocate("", DataType.BYTE, null, null, errors)
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@ -119,13 +120,13 @@ class TestC64Zeropage: FunSpec({
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}
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test("testFreeSpacesBytes") {
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val zp1 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u))
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val zp1 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
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zp1.availableBytes() shouldBe 17
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val zp2 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u))
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val zp2 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
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zp2.availableBytes() shouldBe 87
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val zp3 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u))
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val zp3 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
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zp3.availableBytes() shouldBe 96
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val zp4 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u))
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val zp4 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
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zp4.availableBytes() shouldBe 207
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zp4.allocate("test", DataType.UBYTE, null, null, errors)
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zp4.availableBytes() shouldBe 206
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@ -134,7 +135,7 @@ class TestC64Zeropage: FunSpec({
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}
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test("testReservedSpace") {
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val zp1 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u))
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val zp1 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
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zp1.availableBytes() shouldBe 207
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4u shouldNotBeIn zp1.free
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35u shouldNotBeIn zp1.free
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@ -145,7 +146,7 @@ class TestC64Zeropage: FunSpec({
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200u shouldBeIn zp1.free
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255u shouldBeIn zp1.free
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199u shouldBeIn zp1.free
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val zp2 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, listOf(50u .. 100u, 200u..255u), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u))
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val zp2 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, listOf(50u .. 100u, 200u..255u), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
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zp2.availableBytes() shouldBe 107
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4u shouldNotBeIn zp2.free
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35u shouldNotBeIn zp2.free
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@ -156,14 +157,14 @@ class TestC64Zeropage: FunSpec({
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200u shouldNotBeIn zp2.free
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255u shouldNotBeIn zp2.free
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199u shouldBeIn zp2.free
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val zp3 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, listOf(50u .. 100u, 200u..255u), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u))
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val zp3 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, listOf(50u .. 100u, 200u..255u), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
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zp2.availableBytes() shouldBe 107
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4u shouldBeIn zp3.free
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35u shouldNotBeIn zp3.free
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}
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test("testBasicsafeAllocation") {
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val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u))
|
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val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
|
||||
zp.availableBytes() shouldBe 17
|
||||
zp.hasByteAvailable() shouldBe true
|
||||
zp.hasWordAvailable() shouldBe true
|
||||
@ -185,7 +186,7 @@ class TestC64Zeropage: FunSpec({
|
||||
}
|
||||
|
||||
test("testFullAllocation") {
|
||||
val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u))
|
||||
val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
|
||||
zp.availableBytes() shouldBe 207
|
||||
zp.hasByteAvailable() shouldBe true
|
||||
zp.hasWordAvailable() shouldBe true
|
||||
@ -216,7 +217,7 @@ class TestC64Zeropage: FunSpec({
|
||||
}
|
||||
|
||||
test("testEfficientAllocation") {
|
||||
val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u))
|
||||
val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
|
||||
zp.availableBytes() shouldBe 17
|
||||
zp.allocate("", DataType.WORD, null, null, errors).getOrElse{throw it}.address shouldBe 0x04u
|
||||
zp.allocate("", DataType.UBYTE, null, null, errors).getOrElse{throw it}.address shouldBe 0x06u
|
||||
@ -234,7 +235,7 @@ class TestC64Zeropage: FunSpec({
|
||||
}
|
||||
|
||||
test("testReservedLocations") {
|
||||
val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u))
|
||||
val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
|
||||
withClue("zp _B1 and _REG must be next to each other to create a word") {
|
||||
zp.SCRATCH_B1 + 1u shouldBe zp.SCRATCH_REG
|
||||
}
|
||||
@ -247,18 +248,18 @@ class TestCx16Zeropage: FunSpec({
|
||||
val cx16target = Cx16Target()
|
||||
|
||||
test("testReservedLocations") {
|
||||
val zp = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u))
|
||||
val zp = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u, 0xffffu))
|
||||
withClue("zp _B1 and _REG must be next to each other to create a word") {
|
||||
zp.SCRATCH_B1 + 1u shouldBe zp.SCRATCH_REG
|
||||
}
|
||||
}
|
||||
|
||||
test("testFreeSpacesBytes") {
|
||||
val zp1 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, cx16target, 999u))
|
||||
val zp1 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, cx16target, 999u, 0xffffu))
|
||||
zp1.availableBytes() shouldBe 88
|
||||
val zp2 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u))
|
||||
val zp2 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u, 0xffffu))
|
||||
zp2.availableBytes() shouldBe 175
|
||||
val zp3 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u))
|
||||
val zp3 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u, 0xffffu))
|
||||
zp3.availableBytes() shouldBe 216
|
||||
zp3.allocate("test", DataType.UBYTE, null, null, errors)
|
||||
zp3.availableBytes() shouldBe 215
|
||||
@ -267,7 +268,7 @@ class TestCx16Zeropage: FunSpec({
|
||||
}
|
||||
|
||||
test("testReservedSpace") {
|
||||
val zp1 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u))
|
||||
val zp1 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u, 0xffffu))
|
||||
zp1.availableBytes() shouldBe 216
|
||||
0x22u shouldBeIn zp1.free
|
||||
0x80u shouldBeIn zp1.free
|
||||
@ -277,7 +278,7 @@ class TestCx16Zeropage: FunSpec({
|
||||
}
|
||||
|
||||
test("preallocated zp vars") {
|
||||
val zp1 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u))
|
||||
val zp1 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u, 0xffffu))
|
||||
zp1.allocatedVariables["test"] shouldBe null
|
||||
zp1.allocatedVariables["cx16.r0"] shouldNotBe null
|
||||
zp1.allocatedVariables["cx16.r15"] shouldNotBe null
|
||||
|
@ -74,7 +74,7 @@ class TestAsmGenSymbols: StringSpec({
|
||||
|
||||
fun createTestAsmGen6502(program: Program): AsmGen6502Internal {
|
||||
val errors = ErrorReporterForTests()
|
||||
val options = CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, true, C64Target(), 999u)
|
||||
val options = CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, true, C64Target(), 999u, 0xffffu)
|
||||
val ptProgram = IntermediateAstMaker(program, errors).transform()
|
||||
val st = SymbolTableMaker(ptProgram, options).make()
|
||||
return AsmGen6502Internal(ptProgram, st, options, errors)
|
||||
|
@ -303,6 +303,14 @@ open class Module(final override val statements: MutableList<Statement>,
|
||||
Pair(address.args.single().int!!, address.position)
|
||||
}
|
||||
|
||||
val memtopAddress: Pair<UInt, Position>? by lazy {
|
||||
val address = (statements.singleOrNull { it is Directive && it.directive == "%memtop" } as? Directive)
|
||||
if(address==null || address.args.single().int==null)
|
||||
null
|
||||
else
|
||||
Pair(address.args.single().int!!, address.position)
|
||||
}
|
||||
|
||||
override fun linkParents(parent: Node) {
|
||||
require(parent is GlobalNamespace)
|
||||
this.parent = parent
|
||||
|
@ -106,6 +106,7 @@ data class Directive(val directive: String, val args: List<DirectiveArg>, overri
|
||||
// init {
|
||||
// require(directive in arrayOf(
|
||||
// "%address",
|
||||
// "%memtop",
|
||||
// "%asmbinary",
|
||||
// "%asminclude",
|
||||
// "%breakpoint",
|
||||
|
@ -184,6 +184,17 @@ Directives
|
||||
- type ``none`` : no launcher logic is added at all
|
||||
|
||||
|
||||
.. data:: %memtop <address>
|
||||
|
||||
Level: module.
|
||||
Global setting, changes the program's top memory address. This is usually specified internally by the compiler target,
|
||||
but with this you can change it to another value. This can be useful for example to 'reserve' a piece
|
||||
of memory at the end of program space where other data such as external library files can be loaded into.
|
||||
This memtop value is used for a check instruction for the assembler to see if the resulting program size
|
||||
exceeds the given memtop address. This value is inclusive, so $9eff means that the program can use up to
|
||||
and including the address $9eff and that $9f00 is the first address out of bounds.
|
||||
|
||||
|
||||
.. data:: %option <option> [, <option> ...]
|
||||
|
||||
Level: module, block.
|
||||
|
@ -30,7 +30,7 @@ Future Things and Ideas
|
||||
- (What, how, isn't current BSS support enough?)
|
||||
- Add a mechanism to allocate variables into golden ram (or segments really) (see GoldenRam class)
|
||||
- maybe treat block "golden" in a special way: can only contain vars, every var will be allocated in the Golden ram area?
|
||||
- maybe or may not needed: the variables can NOT have initialization values, they will all be set to zero on startup (simple memset)
|
||||
- maybe or may not needed: the variables can NOT have initializfation values, they will all be set to zero on startup (simple memset)
|
||||
just initialize them yourself in start() if you need a non-zero value .
|
||||
- OR.... do all this automatically if 'golden' is enabled as a compiler option? So compiler allocates in ZP first, then Golden Ram, then regular ram
|
||||
- OR.... make all this more generic and use some %segment option to create real segments for 64tass?
|
||||
|
@ -1,6 +1,7 @@
|
||||
%import diskio
|
||||
%import textio
|
||||
%import zsmkit_high
|
||||
%memtop $8bff ; zsmkit is loaded from 8c00 onwards
|
||||
|
||||
;; Proof Of Concept ZSM player using a binary blob version of zsmkit by MooingLemur
|
||||
;; This version is a bit simpler as "demo1".
|
||||
|
@ -1,6 +1,7 @@
|
||||
%import textio
|
||||
%option no_sysinit
|
||||
%zeropage basicsafe
|
||||
%memtop $0840
|
||||
|
||||
main {
|
||||
|
||||
|
@ -126,6 +126,7 @@ class IRFileReader {
|
||||
false,
|
||||
target,
|
||||
loadAddress,
|
||||
0xffffu,
|
||||
outputDir = outputDir,
|
||||
optimize = optimize
|
||||
)
|
||||
|
@ -23,6 +23,7 @@ class TestIRFileInOut: FunSpec({
|
||||
noSysInit = true,
|
||||
compTarget = target,
|
||||
loadAddress = target.machine.PROGRAM_LOAD_ADDRESS,
|
||||
memtopAddress = 0xffffu,
|
||||
outputDir = tempdir
|
||||
)
|
||||
val program = IRProgram("unittest-irwriter", IRSymbolTable(), options, target)
|
||||
|
@ -148,7 +148,7 @@ labeldef : identifier ':' ;
|
||||
unconditionaljump : 'goto' (integerliteral | scoped_identifier) ;
|
||||
|
||||
directive :
|
||||
directivename=('%output' | '%launcher' | '%zeropage' | '%zpreserved' | '%zpallowed' | '%address' | '%import' |
|
||||
directivename=('%output' | '%launcher' | '%zeropage' | '%zpreserved' | '%zpallowed' | '%address' | '%memtop' | '%import' |
|
||||
'%breakpoint' | '%asminclude' | '%asmbinary' | '%option' | '%encoding' | '%align' )
|
||||
(directivearg? | directivearg (',' directivearg)*)
|
||||
;
|
||||
|
@ -12,7 +12,7 @@
|
||||
<option name="HAS_STRING_ESCAPES" value="true" />
|
||||
</options>
|
||||
<keywords keywords="&;->;@;and;as;asmsub;break;clobbers;continue;do;downto;else;false;for;goto;if;if_cc;if_cs;if_eq;if_mi;if_ne;if_neg;if_nz;if_pl;if_pos;if_vc;if_vs;if_z;in;inline;not;or;repeat;return;romsub;step;sub;to;true;unroll;until;when;while;xor;~" ignore_case="false" />
|
||||
<keywords2 keywords="%address;%align;%asm;%asmbinary;%asminclude;%breakpoint;%encoding;%import;%ir;%launcher;%option;%output;%zeropage;%zpallowed;%zpreserved;@align64;@alignpage;@alignword;@nozp;@requirezp;@shared;@split;@zp;atascii:;cp437:;default:;iso16:;iso5:;iso:;kata:;petscii:;sc:" />
|
||||
<keywords2 keywords="%address;%align;%asm;%asmbinary;%asminclude;%breakpoint;%encoding;%import;%ir;%launcher;%memtop;%option;%output;%zeropage;%zpallowed;%zpreserved;@align64;@alignpage;@alignword;@nozp;@requirezp;@shared;@split;@zp;atascii:;cp437:;default:;iso16:;iso5:;iso:;kata:;petscii:;sc:" />
|
||||
<keywords3 keywords="bool;byte;const;float;str;ubyte;uword;void;word" />
|
||||
<keywords4 keywords="abs;call;callfar;callfar2;clamp;cmp;defer;divmod;len;lsb;max;memory;min;mkword;msb;peek;peekf;peekw;poke;pokef;pokew;rol;rol2;ror;ror2;rrestore;rrestorex;rsave;rsavex;setlsb;setmsb;sgn;sizeof;sqrt" />
|
||||
</highlighting>
|
||||
|
@ -25,7 +25,7 @@
|
||||
<Keywords name="Folders in comment, middle"></Keywords>
|
||||
<Keywords name="Folders in comment, close"></Keywords>
|
||||
<Keywords name="Keywords1">void const
str
byte ubyte bool
word uword
float
zp shared split requirezp nozp</Keywords>
|
||||
<Keywords name="Keywords2">%address
%asm
%ir
%asmbinary
%asminclude
%align
%breakpoint
%encoding
%import
%launcher
%option
%output
%zeropage
%zpreserved
%zpallowed</Keywords>
|
||||
<Keywords name="Keywords2">%address
%asm
%ir
%asmbinary
%asminclude
%align
%breakpoint
%encoding
%import
%memtop
%launcher
%option
%output
%zeropage
%zpreserved
%zpallowed</Keywords>
|
||||
<Keywords name="Keywords3">inline sub asmsub romsub
clobbers
asm
if
when else
if_cc if_cs if_eq if_mi if_neg if_nz if_pl if_pos if_vc if_vs if_z
for in step do while repeat unroll
break continue return goto</Keywords>
|
||||
<Keywords name="Keywords4">abs call callfar callfar2 clamp cmp defer divmod len lsb lsl lsr memory mkword min max msb peek peekw peekf poke pokew pokef rsave rsavex rrestore rrestorex rnd rndw rol rol2 ror ror2 setlsb setmsb sgn sizeof sqrtw</Keywords>
|
||||
<Keywords name="Keywords5">true false
not and or xor
as to downto |></Keywords>
|
||||
|
@ -24,7 +24,8 @@ class TestVm: FunSpec( {
|
||||
floats = true,
|
||||
noSysInit = false,
|
||||
compTarget = target,
|
||||
loadAddress = target.machine.PROGRAM_LOAD_ADDRESS
|
||||
loadAddress = target.machine.PROGRAM_LOAD_ADDRESS,
|
||||
memtopAddress = 0xffffu
|
||||
)
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user