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added memtop to machine definition and asm source code check

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added %memtop directive
This commit is contained in:
Irmen de Jong 2024-11-02 00:13:23 +01:00
parent 6fb05bdefc
commit 3b798097b9
31 changed files with 92 additions and 45 deletions
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1
codeCore/src/prog8/code/core/CompilationOptions.kt
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@ -14,6 +14,7 @@ class CompilationOptions(val output: OutputType,
val compTarget: ICompilationTarget, val compTarget: ICompilationTarget,
// these are set later, based on command line arguments or options in the source code: // these are set later, based on command line arguments or options in the source code:
var loadAddress: UInt, var loadAddress: UInt,
var memtopAddress: UInt,
var warnSymbolShadowing: Boolean = false, var warnSymbolShadowing: Boolean = false,
var optimize: Boolean = false, var optimize: Boolean = false,
var asmQuiet: Boolean = false, var asmQuiet: Boolean = false,

1
codeCore/src/prog8/code/core/IMachineDefinition.kt
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@ -14,6 +14,7 @@ interface IMachineDefinition {
val FLOAT_MAX_POSITIVE: Double val FLOAT_MAX_POSITIVE: Double
val FLOAT_MEM_SIZE: Int val FLOAT_MEM_SIZE: Int
val PROGRAM_LOAD_ADDRESS : UInt val PROGRAM_LOAD_ADDRESS : UInt
val PROGRAM_TOP_ADDRESS: UInt
val BSSHIGHRAM_START: UInt val BSSHIGHRAM_START: UInt
val BSSHIGHRAM_END: UInt val BSSHIGHRAM_END: UInt
val BSSGOLDENRAM_START: UInt val BSSGOLDENRAM_START: UInt

1
codeCore/src/prog8/code/target/atari/AtariMachineDefinition.kt
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@ -12,6 +12,7 @@ class AtariMachineDefinition: IMachineDefinition {
override val FLOAT_MAX_NEGATIVE = -9.999999999e97 override val FLOAT_MAX_NEGATIVE = -9.999999999e97
override val FLOAT_MEM_SIZE = 6 override val FLOAT_MEM_SIZE = 6
override val PROGRAM_LOAD_ADDRESS = 0x2000u override val PROGRAM_LOAD_ADDRESS = 0x2000u
override val PROGRAM_TOP_ADDRESS = 0xffffu // TODO what's memtop
override val BSSHIGHRAM_START = 0u // TODO override val BSSHIGHRAM_START = 0u // TODO
override val BSSHIGHRAM_END = 0u // TODO override val BSSHIGHRAM_END = 0u // TODO

1
codeCore/src/prog8/code/target/c128/C128MachineDefinition.kt
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@ -14,6 +14,7 @@ class C128MachineDefinition: IMachineDefinition {
override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE
override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE
override val PROGRAM_LOAD_ADDRESS = 0x1c01u override val PROGRAM_LOAD_ADDRESS = 0x1c01u
override val PROGRAM_TOP_ADDRESS = 0xfeffu
override val BSSHIGHRAM_START = 0u // TODO override val BSSHIGHRAM_START = 0u // TODO
override val BSSHIGHRAM_END = 0u // TODO override val BSSHIGHRAM_END = 0u // TODO

1
codeCore/src/prog8/code/target/c64/C64MachineDefinition.kt
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@ -15,6 +15,7 @@ class C64MachineDefinition: IMachineDefinition {
override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE
override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE
override val PROGRAM_LOAD_ADDRESS = 0x0801u override val PROGRAM_LOAD_ADDRESS = 0x0801u
override val PROGRAM_TOP_ADDRESS = 0xbfffu
override val BSSHIGHRAM_START = 0xc000u override val BSSHIGHRAM_START = 0xc000u
override val BSSHIGHRAM_END = 0xcfffu override val BSSHIGHRAM_END = 0xcfffu

1
codeCore/src/prog8/code/target/cx16/CX16MachineDefinition.kt
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@ -14,6 +14,7 @@ class CX16MachineDefinition: IMachineDefinition {
override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE
override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE
override val PROGRAM_LOAD_ADDRESS = 0x0801u override val PROGRAM_LOAD_ADDRESS = 0x0801u
override val PROGRAM_TOP_ADDRESS = 0x9effu
override val BSSHIGHRAM_START = 0xa000u // hiram bank 1, 8Kb, assumed to be active override val BSSHIGHRAM_START = 0xa000u // hiram bank 1, 8Kb, assumed to be active
override val BSSHIGHRAM_END = 0xbfffu // Rom starts at $c000 override val BSSHIGHRAM_END = 0xbfffu // Rom starts at $c000

1
codeCore/src/prog8/code/target/pet/PETMachineDefinition.kt
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@ -14,6 +14,7 @@ class PETMachineDefinition: IMachineDefinition {
override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE override val FLOAT_MAX_NEGATIVE = Mflpt5.FLOAT_MAX_NEGATIVE
override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE override val FLOAT_MEM_SIZE = Mflpt5.FLOAT_MEM_SIZE
override val PROGRAM_LOAD_ADDRESS = 0x0401u override val PROGRAM_LOAD_ADDRESS = 0x0401u
override val PROGRAM_TOP_ADDRESS = 0x7fffu
override val BSSHIGHRAM_START = 0u override val BSSHIGHRAM_START = 0u
override val BSSHIGHRAM_END = 0u override val BSSHIGHRAM_END = 0u

1
codeCore/src/prog8/code/target/virtual/VirtualMachineDefinition.kt
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@ -14,6 +14,7 @@ class VirtualMachineDefinition: IMachineDefinition {
override val FLOAT_MAX_NEGATIVE = -Float.MAX_VALUE.toDouble() override val FLOAT_MAX_NEGATIVE = -Float.MAX_VALUE.toDouble()
override val FLOAT_MEM_SIZE = 8 // 64-bits double override val FLOAT_MEM_SIZE = 8 // 64-bits double
override val PROGRAM_LOAD_ADDRESS = 0u // not actually used override val PROGRAM_LOAD_ADDRESS = 0u // not actually used
override val PROGRAM_TOP_ADDRESS = 0xffffu // not actually used
override val BSSHIGHRAM_START = 0u // not actually used override val BSSHIGHRAM_START = 0u // not actually used
override val BSSHIGHRAM_END = 0u // not actually used override val BSSHIGHRAM_END = 0u // not actually used

2
codeGenCpu6502/src/prog8/codegen/cpu6502/ProgramAndVarsGen.kt
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@ -284,6 +284,8 @@ internal class ProgramAndVarsGen(
asmgen.out(" .cerror * > ${relocatedBssEnd.toHex()}, \"too many data for slabs_BSS section\"") asmgen.out(" .cerror * > ${relocatedBssEnd.toHex()}, \"too many data for slabs_BSS section\"")
} }
} }
asmgen.out(" ; memtop check")
asmgen.out(" .cerror * > ${options.memtopAddress.toHex()}, \"Program too long by \", * - ${options.memtopAddress.toHex()}, \" bytes, memtop=${options.memtopAddress.toHex()}\"")
} }
private fun block2asm(block: PtBlock) { private fun block2asm(block: PtBlock) {

3
codeGenCpu6502/test/TestCodegen.kt
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@ -26,7 +26,8 @@ class TestCodegen: FunSpec({
floats = true, floats = true,
noSysInit = false, noSysInit = false,
compTarget = target, compTarget = target,
loadAddress = target.machine.PROGRAM_LOAD_ADDRESS loadAddress = target.machine.PROGRAM_LOAD_ADDRESS,
memtopAddress = 0xffffu
) )
} }

3
codeGenIntermediate/test/TestIRPeepholeOpt.kt
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@ -22,7 +22,8 @@ class TestIRPeepholeOpt: FunSpec({
floats = false, floats = false,
noSysInit = true, noSysInit = true,
compTarget = target, compTarget = target,
loadAddress = target.machine.PROGRAM_LOAD_ADDRESS loadAddress = target.machine.PROGRAM_LOAD_ADDRESS,
memtopAddress = 0xffffu
) )
val prog = IRProgram("test", IRSymbolTable(), options, target) val prog = IRProgram("test", IRSymbolTable(), options, target)
prog.addBlock(block) prog.addBlock(block)

3
codeGenIntermediate/test/TestVmCodeGen.kt
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@ -23,7 +23,8 @@ class TestVmCodeGen: FunSpec({
floats = true, floats = true,
noSysInit = false, noSysInit = false,
compTarget = target, compTarget = target,
loadAddress = target.machine.PROGRAM_LOAD_ADDRESS loadAddress = target.machine.PROGRAM_LOAD_ADDRESS,
memtopAddress = 0xffffu
) )
} }

3
compiler/src/prog8/compiler/Compiler.kt
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@ -263,6 +263,7 @@ internal fun determineProgramLoadAddress(program: Program, options: CompilationO
} }
options.loadAddress = loadAddress options.loadAddress = loadAddress
options.memtopAddress = program.toplevelModule.memtopAddress?.first ?: options.compTarget.machine.PROGRAM_TOP_ADDRESS
} }
@ -398,7 +399,7 @@ fun determineCompilationOptions(program: Program, compTarget: ICompilationTarget
return CompilationOptions( return CompilationOptions(
outputType, launcherType, outputType, launcherType,
zpType, zpReserved, zpAllowed, floatsEnabled, noSysInit, zpType, zpReserved, zpAllowed, floatsEnabled, noSysInit,
compTarget, 0u compTarget, 0u, 0xffffu
) )
} }

2
compiler/src/prog8/compiler/ModuleImporter.kt
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@ -110,7 +110,7 @@ class ModuleImporter(private val program: Program,
private fun removeDirectivesFromImportedModule(importedModule: Module) { private fun removeDirectivesFromImportedModule(importedModule: Module) {
// Most global directives don't apply for imported modules, so remove them // Most global directives don't apply for imported modules, so remove them
val moduleLevelDirectives = listOf("%output", "%launcher", "%zeropage", "%zpreserved", "%zpallowed", "%address") val moduleLevelDirectives = listOf("%output", "%launcher", "%zeropage", "%zpreserved", "%zpallowed", "%address", "%memtop")
var directives = importedModule.statements.filterIsInstance<Directive>() var directives = importedModule.statements.filterIsInstance<Directive>()
importedModule.statements.removeAll(directives.toSet()) importedModule.statements.removeAll(directives.toSet())
directives = directives.filter{ it.directive !in moduleLevelDirectives } directives = directives.filter{ it.directive !in moduleLevelDirectives }

8
compiler/src/prog8/compiler/astprocessing/AstChecker.kt
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@ -57,7 +57,7 @@ internal class AstChecker(private val program: Program,
val directives = module.statements.filterIsInstance<Directive>().groupBy { it.directive } val directives = module.statements.filterIsInstance<Directive>().groupBy { it.directive }
directives.filter { it.value.size > 1 }.forEach{ entry -> directives.filter { it.value.size > 1 }.forEach{ entry ->
when(entry.key) { when(entry.key) {
"%output", "%launcher", "%zeropage", "%address", "%encoding" -> "%output", "%launcher", "%zeropage", "%address", "%memtop", "%encoding" ->
entry.value.forEach { errors.err("directive can just occur once", it.position) } entry.value.forEach { errors.err("directive can just occur once", it.position) }
} }
} }
@ -962,6 +962,12 @@ internal class AstChecker(private val program: Program,
if(directive.args.size!=1 || directive.args[0].int == null) if(directive.args.size!=1 || directive.args[0].int == null)
err("invalid address directive, expected numeric address argument") err("invalid address directive, expected numeric address argument")
} }
"%memtop" -> {
if(directive.parent !is Module)
err("this directive may only occur at module level")
if(directive.args.size!=1 || directive.args[0].int == null)
err("invalid memtop directive, expected numeric address argument")
}
"%import" -> { "%import" -> {
if(directive.parent !is Module) if(directive.parent !is Module)
err("this directive may only occur at module level") err("this directive may only occur at module level")

2
compiler/src/prog8/compiler/astprocessing/StatementReorderer.kt
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@ -22,7 +22,7 @@ internal class StatementReorderer(
// - sorts the choices in when statement. // - sorts the choices in when statement.
// - insert AddressOf (&) expression where required (string params to a UWORD function param etc.). // - insert AddressOf (&) expression where required (string params to a UWORD function param etc.).
private val directivesToMove = setOf("%output", "%launcher", "%zeropage", "%zpreserved", "%zpallowed", "%address", "%option", "%encoding") private val directivesToMove = setOf("%output", "%launcher", "%zeropage", "%zpreserved", "%zpallowed", "%address", "%memtop", "%option", "%encoding")
override fun after(module: Module, parent: Node): Iterable<IAstModification> { override fun after(module: Module, parent: Node): Iterable<IAstModification> {
val (blocks, other) = module.statements.partition { it is Block } val (blocks, other) = module.statements.partition { it is Block }

3
compiler/test/TestGoldenRam.kt
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@ -20,7 +20,8 @@ class TestGoldenRam: FunSpec({
floats = true, floats = true,
noSysInit = false, noSysInit = false,
compTarget = VMTarget(), compTarget = VMTarget(),
loadAddress = 999u loadAddress = 999u,
memtopAddress = 0xffffu
) )
test("empty golden ram allocations") { test("empty golden ram allocations") {

63
compiler/test/TestZeropage.kt
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@ -52,7 +52,8 @@ class TestAbstractZeropage: FunSpec({
floats = false, floats = false,
noSysInit = false, noSysInit = false,
compTarget = DummyCompilationTarget, compTarget = DummyCompilationTarget,
loadAddress = 999u loadAddress = 999u,
memtopAddress = 0xffffu
) )
) )
zp.free.size shouldBe 256-6-16 zp.free.size shouldBe 256-6-16
@ -70,7 +71,7 @@ class TestC64Zeropage: FunSpec({
val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed,
floats = false, floats = false,
noSysInit = false, noSysInit = false,
compTarget = c64target, loadAddress = 999u compTarget = c64target, loadAddress = 999u, memtopAddress = 0xffffu
)) ))
var result = zp.allocate("", DataType.UBYTE, null, null, errors) var result = zp.allocate("", DataType.UBYTE, null, null, errors)
@ -85,33 +86,33 @@ class TestC64Zeropage: FunSpec({
} }
test("testZpFloatEnable") { test("testZpFloatEnable") {
val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u)) val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
var result = zp.allocate("", DataType.FLOAT, null, null, errors) var result = zp.allocate("", DataType.FLOAT, null, null, errors)
result.expectError { "should be allocation error due to disabled floats" } result.expectError { "should be allocation error due to disabled floats" }
val zp2 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.DONTUSE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u)) val zp2 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.DONTUSE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
result = zp2.allocate("", DataType.FLOAT, null, null, errors) result = zp2.allocate("", DataType.FLOAT, null, null, errors)
result.expectError { "should be allocation error due to disabled ZP use" } result.expectError { "should be allocation error due to disabled ZP use" }
val zp3 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u)) val zp3 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
zp3.allocate("", DataType.FLOAT, null, null, errors) zp3.allocate("", DataType.FLOAT, null, null, errors)
} }
test("testZpModesWithFloats") { test("testZpModesWithFloats") {
C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u)) C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u)) C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u)) C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u)) C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u)) C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u)) C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
shouldThrow<InternalCompilerException> { shouldThrow<InternalCompilerException> {
C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u)) C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
} }
shouldThrow<InternalCompilerException> { shouldThrow<InternalCompilerException> {
C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u)) C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
} }
} }
test("testZpDontuse") { test("testZpDontuse") {
val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.DONTUSE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u)) val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.DONTUSE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
println(zp.free) println(zp.free)
zp.availableBytes() shouldBe 0 zp.availableBytes() shouldBe 0
val result = zp.allocate("", DataType.BYTE, null, null, errors) val result = zp.allocate("", DataType.BYTE, null, null, errors)
@ -119,13 +120,13 @@ class TestC64Zeropage: FunSpec({
} }
test("testFreeSpacesBytes") { test("testFreeSpacesBytes") {
val zp1 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u)) val zp1 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
zp1.availableBytes() shouldBe 17 zp1.availableBytes() shouldBe 17
val zp2 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u)) val zp2 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
zp2.availableBytes() shouldBe 87 zp2.availableBytes() shouldBe 87
val zp3 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u)) val zp3 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
zp3.availableBytes() shouldBe 96 zp3.availableBytes() shouldBe 96
val zp4 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u)) val zp4 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
zp4.availableBytes() shouldBe 207 zp4.availableBytes() shouldBe 207
zp4.allocate("test", DataType.UBYTE, null, null, errors) zp4.allocate("test", DataType.UBYTE, null, null, errors)
zp4.availableBytes() shouldBe 206 zp4.availableBytes() shouldBe 206
@ -134,7 +135,7 @@ class TestC64Zeropage: FunSpec({
} }
test("testReservedSpace") { test("testReservedSpace") {
val zp1 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u)) val zp1 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
zp1.availableBytes() shouldBe 207 zp1.availableBytes() shouldBe 207
4u shouldNotBeIn zp1.free 4u shouldNotBeIn zp1.free
35u shouldNotBeIn zp1.free 35u shouldNotBeIn zp1.free
@ -145,7 +146,7 @@ class TestC64Zeropage: FunSpec({
200u shouldBeIn zp1.free 200u shouldBeIn zp1.free
255u shouldBeIn zp1.free 255u shouldBeIn zp1.free
199u shouldBeIn zp1.free 199u shouldBeIn zp1.free
val zp2 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, listOf(50u .. 100u, 200u..255u), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u)) val zp2 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, listOf(50u .. 100u, 200u..255u), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
zp2.availableBytes() shouldBe 107 zp2.availableBytes() shouldBe 107
4u shouldNotBeIn zp2.free 4u shouldNotBeIn zp2.free
35u shouldNotBeIn zp2.free 35u shouldNotBeIn zp2.free
@ -156,14 +157,14 @@ class TestC64Zeropage: FunSpec({
200u shouldNotBeIn zp2.free 200u shouldNotBeIn zp2.free
255u shouldNotBeIn zp2.free 255u shouldNotBeIn zp2.free
199u shouldBeIn zp2.free 199u shouldBeIn zp2.free
val zp3 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, listOf(50u .. 100u, 200u..255u), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u)) val zp3 = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FLOATSAFE, listOf(50u .. 100u, 200u..255u), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
zp2.availableBytes() shouldBe 107 zp2.availableBytes() shouldBe 107
4u shouldBeIn zp3.free 4u shouldBeIn zp3.free
35u shouldNotBeIn zp3.free 35u shouldNotBeIn zp3.free
} }
test("testBasicsafeAllocation") { test("testBasicsafeAllocation") {
val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u)) val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
zp.availableBytes() shouldBe 17 zp.availableBytes() shouldBe 17
zp.hasByteAvailable() shouldBe true zp.hasByteAvailable() shouldBe true
zp.hasWordAvailable() shouldBe true zp.hasWordAvailable() shouldBe true
@ -185,7 +186,7 @@ class TestC64Zeropage: FunSpec({
} }
test("testFullAllocation") { test("testFullAllocation") {
val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u)) val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
zp.availableBytes() shouldBe 207 zp.availableBytes() shouldBe 207
zp.hasByteAvailable() shouldBe true zp.hasByteAvailable() shouldBe true
zp.hasWordAvailable() shouldBe true zp.hasWordAvailable() shouldBe true
@ -216,7 +217,7 @@ class TestC64Zeropage: FunSpec({
} }
test("testEfficientAllocation") { test("testEfficientAllocation") {
val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u)) val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, c64target, 999u, 0xffffu))
zp.availableBytes() shouldBe 17 zp.availableBytes() shouldBe 17
zp.allocate("", DataType.WORD, null, null, errors).getOrElse{throw it}.address shouldBe 0x04u zp.allocate("", DataType.WORD, null, null, errors).getOrElse{throw it}.address shouldBe 0x04u
zp.allocate("", DataType.UBYTE, null, null, errors).getOrElse{throw it}.address shouldBe 0x06u zp.allocate("", DataType.UBYTE, null, null, errors).getOrElse{throw it}.address shouldBe 0x06u
@ -234,7 +235,7 @@ class TestC64Zeropage: FunSpec({
} }
test("testReservedLocations") { test("testReservedLocations") {
val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u)) val zp = C64Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, c64target, 999u, 0xffffu))
withClue("zp _B1 and _REG must be next to each other to create a word") { withClue("zp _B1 and _REG must be next to each other to create a word") {
zp.SCRATCH_B1 + 1u shouldBe zp.SCRATCH_REG zp.SCRATCH_B1 + 1u shouldBe zp.SCRATCH_REG
} }
@ -247,18 +248,18 @@ class TestCx16Zeropage: FunSpec({
val cx16target = Cx16Target() val cx16target = Cx16Target()
test("testReservedLocations") { test("testReservedLocations") {
val zp = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u)) val zp = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u, 0xffffu))
withClue("zp _B1 and _REG must be next to each other to create a word") { withClue("zp _B1 and _REG must be next to each other to create a word") {
zp.SCRATCH_B1 + 1u shouldBe zp.SCRATCH_REG zp.SCRATCH_B1 + 1u shouldBe zp.SCRATCH_REG
} }
} }
test("testFreeSpacesBytes") { test("testFreeSpacesBytes") {
val zp1 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, cx16target, 999u)) val zp1 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.BASICSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, true, false, cx16target, 999u, 0xffffu))
zp1.availableBytes() shouldBe 88 zp1.availableBytes() shouldBe 88
val zp2 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u)) val zp2 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.KERNALSAFE, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u, 0xffffu))
zp2.availableBytes() shouldBe 175 zp2.availableBytes() shouldBe 175
val zp3 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u)) val zp3 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u, 0xffffu))
zp3.availableBytes() shouldBe 216 zp3.availableBytes() shouldBe 216
zp3.allocate("test", DataType.UBYTE, null, null, errors) zp3.allocate("test", DataType.UBYTE, null, null, errors)
zp3.availableBytes() shouldBe 215 zp3.availableBytes() shouldBe 215
@ -267,7 +268,7 @@ class TestCx16Zeropage: FunSpec({
} }
test("testReservedSpace") { test("testReservedSpace") {
val zp1 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u)) val zp1 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u, 0xffffu))
zp1.availableBytes() shouldBe 216 zp1.availableBytes() shouldBe 216
0x22u shouldBeIn zp1.free 0x22u shouldBeIn zp1.free
0x80u shouldBeIn zp1.free 0x80u shouldBeIn zp1.free
@ -277,7 +278,7 @@ class TestCx16Zeropage: FunSpec({
} }
test("preallocated zp vars") { test("preallocated zp vars") {
val zp1 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u)) val zp1 = CX16Zeropage(CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, false, cx16target, 999u, 0xffffu))
zp1.allocatedVariables["test"] shouldBe null zp1.allocatedVariables["test"] shouldBe null
zp1.allocatedVariables["cx16.r0"] shouldNotBe null zp1.allocatedVariables["cx16.r0"] shouldNotBe null
zp1.allocatedVariables["cx16.r15"] shouldNotBe null zp1.allocatedVariables["cx16.r15"] shouldNotBe null

2
compiler/test/codegeneration/TestAsmGenSymbols.kt
View File

@ -74,7 +74,7 @@ class TestAsmGenSymbols: StringSpec({
fun createTestAsmGen6502(program: Program): AsmGen6502Internal { fun createTestAsmGen6502(program: Program): AsmGen6502Internal {
val errors = ErrorReporterForTests() val errors = ErrorReporterForTests()
val options = CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, true, C64Target(), 999u) val options = CompilationOptions(OutputType.RAW, CbmPrgLauncherType.NONE, ZeropageType.FULL, emptyList(), CompilationOptions.AllZeropageAllowed, false, true, C64Target(), 999u, 0xffffu)
val ptProgram = IntermediateAstMaker(program, errors).transform() val ptProgram = IntermediateAstMaker(program, errors).transform()
val st = SymbolTableMaker(ptProgram, options).make() val st = SymbolTableMaker(ptProgram, options).make()
return AsmGen6502Internal(ptProgram, st, options, errors) return AsmGen6502Internal(ptProgram, st, options, errors)

8
compilerAst/src/prog8/ast/AstToplevel.kt
View File

@ -303,6 +303,14 @@ open class Module(final override val statements: MutableList<Statement>,
Pair(address.args.single().int!!, address.position) Pair(address.args.single().int!!, address.position)
} }
val memtopAddress: Pair<UInt, Position>? by lazy {
val address = (statements.singleOrNull { it is Directive && it.directive == "%memtop" } as? Directive)
if(address==null || address.args.single().int==null)
null
else
Pair(address.args.single().int!!, address.position)
}
override fun linkParents(parent: Node) { override fun linkParents(parent: Node) {
require(parent is GlobalNamespace) require(parent is GlobalNamespace)
this.parent = parent this.parent = parent

1
compilerAst/src/prog8/ast/statements/AstStatements.kt
View File

@ -106,6 +106,7 @@ data class Directive(val directive: String, val args: List<DirectiveArg>, overri
// init { // init {
// require(directive in arrayOf( // require(directive in arrayOf(
// "%address", // "%address",
// "%memtop",
// "%asmbinary", // "%asmbinary",
// "%asminclude", // "%asminclude",
// "%breakpoint", // "%breakpoint",

11
docs/source/syntaxreference.rst
View File

@ -184,6 +184,17 @@ Directives
- type ``none`` : no launcher logic is added at all - type ``none`` : no launcher logic is added at all
.. data:: %memtop <address>
Level: module.
Global setting, changes the program's top memory address. This is usually specified internally by the compiler target,
but with this you can change it to another value. This can be useful for example to 'reserve' a piece
of memory at the end of program space where other data such as external library files can be loaded into.
This memtop value is used for a check instruction for the assembler to see if the resulting program size
exceeds the given memtop address. This value is inclusive, so $9eff means that the program can use up to
and including the address $9eff and that $9f00 is the first address out of bounds.
.. data:: %option <option> [, <option> ...] .. data:: %option <option> [, <option> ...]
Level: module, block. Level: module, block.

2
docs/source/todo.rst
View File

@ -30,7 +30,7 @@ Future Things and Ideas
- (What, how, isn't current BSS support enough?) - (What, how, isn't current BSS support enough?)
- Add a mechanism to allocate variables into golden ram (or segments really) (see GoldenRam class) - Add a mechanism to allocate variables into golden ram (or segments really) (see GoldenRam class)
- maybe treat block "golden" in a special way: can only contain vars, every var will be allocated in the Golden ram area? - maybe treat block "golden" in a special way: can only contain vars, every var will be allocated in the Golden ram area?
- maybe or may not needed: the variables can NOT have initialization values, they will all be set to zero on startup (simple memset) - maybe or may not needed: the variables can NOT have initializfation values, they will all be set to zero on startup (simple memset)
just initialize them yourself in start() if you need a non-zero value . just initialize them yourself in start() if you need a non-zero value .
- OR.... do all this automatically if 'golden' is enabled as a compiler option? So compiler allocates in ZP first, then Golden Ram, then regular ram - OR.... do all this automatically if 'golden' is enabled as a compiler option? So compiler allocates in ZP first, then Golden Ram, then regular ram
- OR.... make all this more generic and use some %segment option to create real segments for 64tass? - OR.... make all this more generic and use some %segment option to create real segments for 64tass?

1
examples/cx16/zsmkit/demo2.p8
View File

@ -1,6 +1,7 @@
%import diskio %import diskio
%import textio %import textio
%import zsmkit_high %import zsmkit_high
%memtop $8bff ; zsmkit is loaded from 8c00 onwards
;; Proof Of Concept ZSM player using a binary blob version of zsmkit by MooingLemur ;; Proof Of Concept ZSM player using a binary blob version of zsmkit by MooingLemur
;; This version is a bit simpler as "demo1". ;; This version is a bit simpler as "demo1".

1
examples/test.p8
View File

@ -1,6 +1,7 @@
%import textio %import textio
%option no_sysinit %option no_sysinit
%zeropage basicsafe %zeropage basicsafe
%memtop $0840
main { main {

1
intermediate/src/prog8/intermediate/IRFileReader.kt
View File

@ -126,6 +126,7 @@ class IRFileReader {
false, false,
target, target,
loadAddress, loadAddress,
0xffffu,
outputDir = outputDir, outputDir = outputDir,
optimize = optimize optimize = optimize
) )

1
intermediate/test/TestIRFileInOut.kt
View File

@ -23,6 +23,7 @@ class TestIRFileInOut: FunSpec({
noSysInit = true, noSysInit = true,
compTarget = target, compTarget = target,
loadAddress = target.machine.PROGRAM_LOAD_ADDRESS, loadAddress = target.machine.PROGRAM_LOAD_ADDRESS,
memtopAddress = 0xffffu,
outputDir = tempdir outputDir = tempdir
) )
val program = IRProgram("unittest-irwriter", IRSymbolTable(), options, target) val program = IRProgram("unittest-irwriter", IRSymbolTable(), options, target)

2
parser/antlr/Prog8ANTLR.g4
View File

@ -148,7 +148,7 @@ labeldef : identifier ':' ;
unconditionaljump : 'goto' (integerliteral | scoped_identifier) ; unconditionaljump : 'goto' (integerliteral | scoped_identifier) ;
directive : directive :
directivename=('%output' | '%launcher' | '%zeropage' | '%zpreserved' | '%zpallowed' | '%address' | '%import' | directivename=('%output' | '%launcher' | '%zeropage' | '%zpreserved' | '%zpallowed' | '%address' | '%memtop' | '%import' |
'%breakpoint' | '%asminclude' | '%asmbinary' | '%option' | '%encoding' | '%align' ) '%breakpoint' | '%asminclude' | '%asmbinary' | '%option' | '%encoding' | '%align' )
(directivearg? | directivearg (',' directivearg)*) (directivearg? | directivearg (',' directivearg)*)
; ;

2
syntax-files/IDEA/Prog8.xml
View File

@ -12,7 +12,7 @@
<option name="HAS_STRING_ESCAPES" value="true" /> <option name="HAS_STRING_ESCAPES" value="true" />
</options> </options>
<keywords keywords="&amp;;-&gt;;@;and;as;asmsub;break;clobbers;continue;do;downto;else;false;for;goto;if;if_cc;if_cs;if_eq;if_mi;if_ne;if_neg;if_nz;if_pl;if_pos;if_vc;if_vs;if_z;in;inline;not;or;repeat;return;romsub;step;sub;to;true;unroll;until;when;while;xor;~" ignore_case="false" /> <keywords keywords="&amp;;-&gt;;@;and;as;asmsub;break;clobbers;continue;do;downto;else;false;for;goto;if;if_cc;if_cs;if_eq;if_mi;if_ne;if_neg;if_nz;if_pl;if_pos;if_vc;if_vs;if_z;in;inline;not;or;repeat;return;romsub;step;sub;to;true;unroll;until;when;while;xor;~" ignore_case="false" />
<keywords2 keywords="%address;%align;%asm;%asmbinary;%asminclude;%breakpoint;%encoding;%import;%ir;%launcher;%option;%output;%zeropage;%zpallowed;%zpreserved;@align64;@alignpage;@alignword;@nozp;@requirezp;@shared;@split;@zp;atascii:;cp437:;default:;iso16:;iso5:;iso:;kata:;petscii:;sc:" /> <keywords2 keywords="%address;%align;%asm;%asmbinary;%asminclude;%breakpoint;%encoding;%import;%ir;%launcher;%memtop;%option;%output;%zeropage;%zpallowed;%zpreserved;@align64;@alignpage;@alignword;@nozp;@requirezp;@shared;@split;@zp;atascii:;cp437:;default:;iso16:;iso5:;iso:;kata:;petscii:;sc:" />
<keywords3 keywords="bool;byte;const;float;str;ubyte;uword;void;word" /> <keywords3 keywords="bool;byte;const;float;str;ubyte;uword;void;word" />
<keywords4 keywords="abs;call;callfar;callfar2;clamp;cmp;defer;divmod;len;lsb;max;memory;min;mkword;msb;peek;peekf;peekw;poke;pokef;pokew;rol;rol2;ror;ror2;rrestore;rrestorex;rsave;rsavex;setlsb;setmsb;sgn;sizeof;sqrt" /> <keywords4 keywords="abs;call;callfar;callfar2;clamp;cmp;defer;divmod;len;lsb;max;memory;min;mkword;msb;peek;peekf;peekw;poke;pokef;pokew;rol;rol2;ror;ror2;rrestore;rrestorex;rsave;rsavex;setlsb;setmsb;sgn;sizeof;sqrt" />
</highlighting> </highlighting>

2
syntax-files/NotepadPlusPlus/Prog8.xml
View File

@ -25,7 +25,7 @@
<Keywords name="Folders in comment, middle"></Keywords> <Keywords name="Folders in comment, middle"></Keywords>
<Keywords name="Folders in comment, close"></Keywords> <Keywords name="Folders in comment, close"></Keywords>
<Keywords name="Keywords1">void const&#x000D;&#x000A;str&#x000D;&#x000A;byte ubyte bool&#x000D;&#x000A;word uword&#x000D;&#x000A;float&#x000D;&#x000A;zp shared split requirezp nozp</Keywords> <Keywords name="Keywords1">void const&#x000D;&#x000A;str&#x000D;&#x000A;byte ubyte bool&#x000D;&#x000A;word uword&#x000D;&#x000A;float&#x000D;&#x000A;zp shared split requirezp nozp</Keywords>
<Keywords name="Keywords2">%address&#x000D;&#x000A;%asm&#x000D;&#x000A;%ir&#x000D;&#x000A;%asmbinary&#x000D;&#x000A;%asminclude&#x000D;&#x000A;%align&#x000D;&#x000A;%breakpoint&#x000D;&#x000A;%encoding&#x000D;&#x000A;%import&#x000D;&#x000A;%launcher&#x000D;&#x000A;%option&#x000D;&#x000A;%output&#x000D;&#x000A;%zeropage&#x000D;&#x000A;%zpreserved&#x000D;&#x000A;%zpallowed</Keywords> <Keywords name="Keywords2">%address&#x000D;&#x000A;%asm&#x000D;&#x000A;%ir&#x000D;&#x000A;%asmbinary&#x000D;&#x000A;%asminclude&#x000D;&#x000A;%align&#x000D;&#x000A;%breakpoint&#x000D;&#x000A;%encoding&#x000D;&#x000A;%import&#x000D;&#x000A;%memtop&#x000D;&#x000A;%launcher&#x000D;&#x000A;%option&#x000D;&#x000A;%output&#x000D;&#x000A;%zeropage&#x000D;&#x000A;%zpreserved&#x000D;&#x000A;%zpallowed</Keywords>
<Keywords name="Keywords3">inline sub asmsub romsub&#x000D;&#x000A;clobbers&#x000D;&#x000A;asm&#x000D;&#x000A;if&#x000D;&#x000A;when else&#x000D;&#x000A;if_cc if_cs if_eq if_mi if_neg if_nz if_pl if_pos if_vc if_vs if_z&#x000D;&#x000A;for in step do while repeat unroll&#x000D;&#x000A;break continue return goto</Keywords> <Keywords name="Keywords3">inline sub asmsub romsub&#x000D;&#x000A;clobbers&#x000D;&#x000A;asm&#x000D;&#x000A;if&#x000D;&#x000A;when else&#x000D;&#x000A;if_cc if_cs if_eq if_mi if_neg if_nz if_pl if_pos if_vc if_vs if_z&#x000D;&#x000A;for in step do while repeat unroll&#x000D;&#x000A;break continue return goto</Keywords>
<Keywords name="Keywords4">abs call callfar callfar2 clamp cmp defer divmod len lsb lsl lsr memory mkword min max msb peek peekw peekf poke pokew pokef rsave rsavex rrestore rrestorex rnd rndw rol rol2 ror ror2 setlsb setmsb sgn sizeof sqrtw</Keywords> <Keywords name="Keywords4">abs call callfar callfar2 clamp cmp defer divmod len lsb lsl lsr memory mkword min max msb peek peekw peekf poke pokew pokef rsave rsavex rrestore rrestorex rnd rndw rol rol2 ror ror2 setlsb setmsb sgn sizeof sqrtw</Keywords>
<Keywords name="Keywords5">true false&#x000D;&#x000A;not and or xor&#x000D;&#x000A;as to downto |&gt;</Keywords> <Keywords name="Keywords5">true false&#x000D;&#x000A;not and or xor&#x000D;&#x000A;as to downto |&gt;</Keywords>

3
virtualmachine/test/TestVm.kt
View File

@ -24,7 +24,8 @@ class TestVm: FunSpec( {
floats = true, floats = true,
noSysInit = false, noSysInit = false,
compTarget = target, compTarget = target,
loadAddress = target.machine.PROGRAM_LOAD_ADDRESS loadAddress = target.machine.PROGRAM_LOAD_ADDRESS,
memtopAddress = 0xffffu
) )
} }