mirror of https://github.com/irmen/prog8.git
allow multi-assign to skip any status register result
This commit is contained in:
Irmen de Jong
parent
0c5e8ca199
commit
3e34a3ef72
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@ -84,24 +84,39 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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}
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}
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// because we can only handle integer results right now we can just zip() it all up
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val (statusFlagResult, registersResults) = sub.returns.zip(assignment.children).partition { it.first.register.statusflag!=null }
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if(statusFlagResult.isNotEmpty()) {
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val (returns, target) = statusFlagResult.single()
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if(returns.register.statusflag!=Statusflag.Pc)
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TODO("other status flag for return value")
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val assignmentTargets = assignment.children.dropLast(1)
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if(sub.returns.size==assignmentTargets.size) {
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// because we can only handle integer results right now we can just zip() it all up
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val (statusFlagResult, registersResults) = sub.returns.zip(assignmentTargets).partition { it.first.register.statusflag!=null }
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if(statusFlagResult.isNotEmpty()) {
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val (returns, target) = statusFlagResult.single()
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if(returns.register.statusflag!=Statusflag.Pc)
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TODO("other status flag for return value")
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target as PtAssignTarget
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if(registersResults.all { (it.second as PtAssignTarget).identifier!=null}) {
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// all other results are just stored into identifiers directly so first handle those
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// (simple store instructions that don't modify the carry flag)
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assignRegisterResults(registersResults)
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assignCarryResult(target, false)
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return
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target as PtAssignTarget
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if(registersResults.all { (it.second as PtAssignTarget).identifier!=null}) {
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// all other results are just stored into identifiers directly so first handle those
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// (simple store instructions that don't modify the carry flag)
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assignRegisterResults(registersResults)
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assignCarryResult(target, false)
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return
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}
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assignCarryResult(target, needsToSaveA(registersResults))
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}
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assignCarryResult(target, needsToSaveA(registersResults))
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assignRegisterResults(registersResults)
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} else if (sub.returns.size>assignmentTargets.size) {
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// Targets and values don't match. Skip status flag results, assign only the normal value results.
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val targets = assignmentTargets.iterator()
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sub.returns.forEach {
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if(it.register.registerOrPair!=null) {
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val target = targets.next() as PtAssignTarget
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assignRegisterResults(listOf(it to target))
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}
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}
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require(!targets.hasNext())
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} else {
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throw AssemblyError("number of values and targets don't match")
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}
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assignRegisterResults(registersResults)
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}
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@ -22,14 +22,30 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
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require(funcCall.multipleResultRegs.size + funcCall.multipleResultFpRegs.size >= 2)
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if(funcCall.multipleResultFpRegs.isNotEmpty())
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TODO("deal with (multiple?) FP return registers")
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// because we can only handle integer results right now we can just zip() it all up
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val assignmentTargets = assignment.children.dropLast(1)
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addToResult(result, funcCall, funcCall.resultReg, funcCall.resultFpReg)
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sub.returns.zip(assignment.children).zip(funcCall.multipleResultRegs).forEach {
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val regNumber = it.second
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val returns = it.first.first
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val target = it.first.second as PtAssignTarget
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result += assignCpuRegister(returns, regNumber, target)
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if(sub.returns.size==assignmentTargets.size) {
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// Targets and values match. Assign all the things.
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sub.returns.zip(assignmentTargets).zip(funcCall.multipleResultRegs).forEach {
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val regNumber = it.second
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val returns = it.first.first
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val target = it.first.second as PtAssignTarget
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result += assignCpuRegister(returns, regNumber, target)
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}
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} else if (sub.returns.size>assignmentTargets.size) {
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// Targets and values don't match. Skip status flag results, assign only the normal value results.
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val targets = assignmentTargets.iterator()
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sub.returns.zip(funcCall.multipleResultRegs).forEach {
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val returns = it.first
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if(returns.register.registerOrPair!=null) {
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val target = targets.next() as PtAssignTarget
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val regNumber = it.second
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result += assignCpuRegister(returns, regNumber, target)
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}
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}
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require(!targets.hasNext())
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} else {
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throw AssemblyError("number of values and targets don't match")
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}
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return result
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} else {
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@ -547,47 +547,67 @@ internal class AstChecker(private val program: Program,
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}
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// multi-assign: check the number of assign targets vs. the number of return values of the subroutine
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// also check the types of the variables vs the types of each return value
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val fcall = assignment.value as? IFunctionCall
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val fcallTarget = fcall?.target?.targetSubroutine(program)
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if(assignment.target.multi!=null) {
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val multi = assignment.target.multi!!
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if(fcall==null) {
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errors.err("expected a function call with multiple return values", assignment.value.position)
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} else {
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if(fcallTarget==null) {
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errors.err("expected a function call with multiple return values", assignment.value.position)
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} else {
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if(fcallTarget.returntypes.size!=multi.size) {
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errors.err("expected ${multi.size} return values, have ${fcallTarget.returntypes.size}", fcall.position)
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}
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}
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}
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if(errors.noErrors()) {
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// check the types...
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fcallTarget!!.returntypes.zip(multi).withIndex().forEach { (index, p) ->
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val (returnType, target) = p
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val targetDt = target.inferType(program).getOr(DataType.UNDEFINED)
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if(!(returnType isAssignableTo targetDt))
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errors.err("can't assign returnvalue #${index+1} to corresponding target; ${returnType} vs $targetDt", target.position)
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}
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}
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checkMultiAssignment(assignment, fcall, fcallTarget)
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} else if(fcallTarget!=null) {
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if(fcallTarget.returntypes.size!=1) {
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// If there are 2 return values, one of them being a boolean in a status register, this is okay.
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// In that case the normal value is assigned and the status bit is dealth with separately for example with if_cs
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val (returnRegisters, _) = fcallTarget.asmReturnvaluesRegisters.partition { rr -> rr.registerOrPair != null }
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if(returnRegisters.size>1)
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errors.err("expected 1 return value, have ${fcallTarget.returntypes.size}", fcall.position)
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if(returnRegisters.size>1) {
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errors.err("multiple return values and too few assignment targets, need at least ${returnRegisters.size}", fcall.position)
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}
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}
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}
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super.visit(assignment)
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}
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private fun checkMultiAssignment(assignment: Assignment, fcall: IFunctionCall?, fcallTarget: Subroutine?) {
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// multi-assign: check the number of assign targets vs. the number of return values of the subroutine
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// also check the types of the variables vs the types of each return value
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if(fcall==null || fcallTarget==null) {
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errors.err("expected a function call with multiple return values", assignment.value.position)
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return
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}
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val targets = assignment.target.multi!!
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if(fcallTarget.returntypes.size<targets.size) {
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errors.err("too many assignment targets, ${targets.size} targets for ${fcallTarget.returntypes.size} return values", fcall.position)
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return
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}
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if(fcallTarget.returntypes.size>targets.size) {
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// You can have LESS assign targets than the number of result values,
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// as long as the result values contain booleans that are returned in cpu status flags (like Carry).
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// These may be ignored in the assignment - only "true" values NEED to have a target.
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val numberOfNormalValues = fcallTarget.asmReturnvaluesRegisters.count { it.registerOrPair!=null }
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if(numberOfNormalValues != targets.size) {
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errors.err("multiple return values and too few assignment targets, need at least $numberOfNormalValues", fcall.position)
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return
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}
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// check the types of the 'normal' values that are being assigned
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val returnTypesAndRegisters = fcallTarget.returntypes.zip(fcallTarget.asmReturnvaluesRegisters)
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returnTypesAndRegisters.zip(targets).withIndex().forEach { (index, p) ->
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val (returnType, register) = p.first
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if(register.registerOrPair!=null) {
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val target = p.second
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val targetDt = target.inferType(program).getOr(DataType.UNDEFINED)
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if (!(returnType isAssignableTo targetDt))
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errors.err("can't assign returnvalue #${index + 1} to corresponding target; $returnType vs $targetDt", target.position)
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}
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}
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} else {
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// check all the assigment target types
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fcallTarget.returntypes.zip(targets).withIndex().forEach { (index, p) ->
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val (returnType, target) = p
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val targetDt = target.inferType(program).getOr(DataType.UNDEFINED)
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if (!(returnType isAssignableTo targetDt))
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errors.err("can't assign returnvalue #${index + 1} to corresponding target; $returnType vs $targetDt", target.position)
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}
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}
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}
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override fun visit(assignTarget: AssignTarget) {
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super.visit(assignTarget)
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@ -2,6 +2,7 @@ package prog8tests.ast
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import io.kotest.core.spec.style.FunSpec
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import io.kotest.matchers.shouldBe
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import io.kotest.matchers.shouldNotBe
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import io.kotest.matchers.string.shouldContain
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import prog8.ast.statements.Block
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import prog8.ast.statements.Subroutine
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@ -110,9 +111,11 @@ main {
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main {
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sub start() {
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bool @shared flag
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ubyte @shared bytevar
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cx16.r0L, flag = test2(12345, 5566, flag, -42)
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cx16.r1, flag = test3()
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cx16.r1, flag, bytevar = test3()
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cx16.r1, bytevar = test3() ; omitting the status flag result should also work
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}
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asmsub test2(uword arg @AY, uword arg2 @R1, bool flag @Pc, byte value @X) -> ubyte @A, bool @Pc {
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@ -123,41 +126,37 @@ main {
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}}
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}
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asmsub test3() -> uword @R1, bool @Pc {
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asmsub test3() -> uword @R1, bool @Pc, ubyte @X {
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%asm {{
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lda #0
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ldy #0
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ldx #0
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rts
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}}
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}
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}"""
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compileText(VMTarget(), false, src, writeAssembly = true) shouldNotBe null
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val errors = ErrorReporterForTests()
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val result = compileText(Cx16Target(), false, src, errors, true)!!
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errors.errors.size shouldBe 0
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val start = result.codegenAst!!.entrypoint()!!
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start.children.size shouldBe 5
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val a1_1 = start.children[2] as PtAssignment
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val a1_2 = start.children[3] as PtAssignment
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start.children.size shouldBe 8
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val a1_1 = start.children[4] as PtAssignment
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val a1_2 = start.children[5] as PtAssignment
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val a1_3 = start.children[6] as PtAssignment
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a1_1.multiTarget shouldBe true
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a1_2.multiTarget shouldBe true
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a1_3.multiTarget shouldBe true
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a1_1.children.size shouldBe 3
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a1_2.children.size shouldBe 4
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a1_3.children.size shouldBe 3
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(a1_1.children[0] as PtAssignTarget).identifier!!.name shouldBe("cx16.r0L")
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(a1_1.children[1] as PtAssignTarget).identifier!!.name shouldBe("p8b_main.p8s_start.p8v_flag")
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(a1_2.children[0] as PtAssignTarget).identifier!!.name shouldBe("cx16.r1")
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(a1_2.children[1] as PtAssignTarget).identifier!!.name shouldBe("p8b_main.p8s_start.p8v_flag")
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errors.clear()
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val result2=compileText(VMTarget(), false, src, errors, true)!!
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errors.errors.size shouldBe 0
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val start2 = result2.codegenAst!!.entrypoint()!!
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start2.children.size shouldBe 5
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val a2_1 = start2.children[2] as PtAssignment
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val a2_2 = start2.children[3] as PtAssignment
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a2_1.multiTarget shouldBe true
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a2_2.multiTarget shouldBe true
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(a2_1.children[0] as PtAssignTarget).identifier!!.name shouldBe("cx16.r0L")
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(a2_1.children[1] as PtAssignTarget).identifier!!.name shouldBe("main.start.flag")
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(a2_2.children[0] as PtAssignTarget).identifier!!.name shouldBe("cx16.r1")
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(a2_2.children[1] as PtAssignTarget).identifier!!.name shouldBe("main.start.flag")
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(a1_2.children[2] as PtAssignTarget).identifier!!.name shouldBe("p8b_main.p8s_start.p8v_bytevar")
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(a1_3.children[0] as PtAssignTarget).identifier!!.name shouldBe("cx16.r1")
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(a1_3.children[1] as PtAssignTarget).identifier!!.name shouldBe("p8b_main.p8s_start.p8v_bytevar")
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}
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test("multi-assign from romsub") {
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@ -165,43 +164,40 @@ main {
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main {
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sub start() {
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bool @shared flag
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ubyte @shared bytevar
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flag = test(42)
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cx16.r0L, flag = test2(12345, 5566, flag, -42)
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cx16.r1, flag = test3()
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cx16.r1, flag, bytevar = test3()
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cx16.r1, bytevar = test3() ; omitting the status flag result should also work
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}
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romsub ${'$'}8000 = test(ubyte arg @A) -> bool @Pc
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romsub ${'$'}8002 = test2(uword arg @AY, uword arg2 @R1, bool flag @Pc, byte value @X) -> ubyte @A, bool @Pc
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romsub ${'$'}8003 = test3() -> uword @R1, bool @Pc
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romsub ${'$'}8003 = test3() -> uword @R1, bool @Pc, ubyte @X
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}"""
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compileText(VMTarget(), false, src, writeAssembly = true) shouldNotBe null
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val errors = ErrorReporterForTests()
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val result = compileText(Cx16Target(), false, src, errors, true)!!
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errors.errors.size shouldBe 0
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val start = result.codegenAst!!.entrypoint()!!
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start.children.size shouldBe 5
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val a1_1 = start.children[2] as PtAssignment
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val a1_2 = start.children[3] as PtAssignment
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start.children.size shouldBe 9
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val a1_1 = start.children[5] as PtAssignment
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val a1_2 = start.children[6] as PtAssignment
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val a1_3 = start.children[7] as PtAssignment
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a1_1.multiTarget shouldBe true
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a1_2.multiTarget shouldBe true
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a1_3.multiTarget shouldBe true
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a1_1.children.size shouldBe 3
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a1_2.children.size shouldBe 4
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a1_3.children.size shouldBe 3
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(a1_1.children[0] as PtAssignTarget).identifier!!.name shouldBe("cx16.r0L")
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(a1_1.children[1] as PtAssignTarget).identifier!!.name shouldBe("p8b_main.p8s_start.p8v_flag")
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(a1_2.children[0] as PtAssignTarget).identifier!!.name shouldBe("cx16.r1")
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(a1_2.children[1] as PtAssignTarget).identifier!!.name shouldBe("p8b_main.p8s_start.p8v_flag")
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errors.clear()
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val result2=compileText(VMTarget(), false, src, errors, true)!!
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errors.errors.size shouldBe 0
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val start2 = result2.codegenAst!!.entrypoint()!!
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start2.children.size shouldBe 5
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val a2_1 = start2.children[2] as PtAssignment
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val a2_2 = start2.children[3] as PtAssignment
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a2_1.multiTarget shouldBe true
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a2_2.multiTarget shouldBe true
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(a2_1.children[0] as PtAssignTarget).identifier!!.name shouldBe("cx16.r0L")
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(a2_1.children[1] as PtAssignTarget).identifier!!.name shouldBe("main.start.flag")
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(a2_2.children[0] as PtAssignTarget).identifier!!.name shouldBe("cx16.r1")
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(a2_2.children[1] as PtAssignTarget).identifier!!.name shouldBe("main.start.flag")
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(a1_2.children[2] as PtAssignTarget).identifier!!.name shouldBe("p8b_main.p8s_start.p8v_bytevar")
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(a1_3.children[0] as PtAssignTarget).identifier!!.name shouldBe("cx16.r1")
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(a1_3.children[1] as PtAssignTarget).identifier!!.name shouldBe("p8b_main.p8s_start.p8v_bytevar")
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}
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})
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@ -684,16 +684,13 @@ are all assigned to individual assignment targets. You simply write them as a co
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asmsub multisub() -> uword @AY, bool @Pc, ubyte @X { ... }
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**There is also a special rule:** if there's just one return value in a register, and one or more others that are returned
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as bits in the status register (such as the Carry bit), the compiler *also* allows you to call the subroutine and just assign a *single* return value.
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It will then store the result value in a variable if required, and *try to keep the status register untouched
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after the call* so you can often use a conditional branch statement for that. But the latter is tricky,
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make sure you check the generated assembly code.
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.. note::
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For asmsubs or romsubs that return a boolean status flag in a cpu status register such as the Carry flag,
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it is always more efficient to use a conditional branch like `if_cs` to act on that value, than storing
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it in a variable and then adding an `if flag...` statement afterwards.
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**There is also a special rule:** you are allowed to omit assignments of the boolean values returned in status registers such as the carry flag.
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So in the case of multisub() above, you could also write `wordvar, bytevar = multisub()` and leave out the carry flag.
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The compiler will try to assign the normal numeric values and leave the status flags untouched, which then allows you to
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use a conditional branch such as `if_cs` to do something with it. This is always more efficient
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than storing it in a variable and then adding an `if flag...` statement afterwards.
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It can sometimes be tricky to keep the status flags that are returned from the subroutine intact though,
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if the assign targets are not simple variables. In such cases, make sure you check the generated assembly code to see if it all works out.
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Subroutine definitions
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@ -1,7 +1,10 @@
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TODO
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====
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make it possible to omit the Status Register values in multi-assigns regardless of the number of return values (is now 1 value)
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try to replace the variable number of assignment targets by allowing placeholder '_' target
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check souce code of examples and library, for void calls that could now be turned into multi-assign calls.
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...
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@ -1,41 +1,30 @@
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%import textio
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%import test_stack
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%zeropage basicsafe
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%option no_sysinit
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main {
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sub start() {
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bool @shared flag
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ubyte @shared bytevar
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uword @shared wordvar
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; cx16.r1=9999
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; flag = test(42)
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; cx16.r0L, flag = test2(12345, 5566, flag, -42)
|
||||
; cx16.r1, flag = test3()
|
||||
|
||||
wordvar, bytevar, flag = test4()
|
||||
wordvar, bytevar, flag = test4()
|
||||
wordvar, bytevar = test4()
|
||||
if_cs
|
||||
txt.print("true! ")
|
||||
else
|
||||
txt.print("false! ")
|
||||
|
||||
txt.print_uwhex(wordvar, true)
|
||||
txt.spc()
|
||||
txt.print_bool(flag)
|
||||
txt.spc()
|
||||
txt.print_ub(bytevar)
|
||||
txt.nl()
|
||||
}
|
||||
|
||||
romsub $8000 = test(ubyte arg @A) -> bool @Pc
|
||||
romsub $8002 = test2(uword arg @AY, uword arg2 @R1, bool flag @Pc, byte value @X) -> ubyte @A, bool @Pc
|
||||
romsub $8003 = test3() -> uword @R1, bool @Pc
|
||||
|
||||
|
||||
asmsub test4() -> uword @AY, ubyte @X, bool @Pc {
|
||||
%asm {{
|
||||
lda #<$11ee
|
||||
ldy #>$11ee
|
||||
ldx #42
|
||||
sec
|
||||
clc
|
||||
rts
|
||||
}}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue