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fix byte in array assignment,
remove no longer needed array assignment ast transformation
This commit is contained in:
Irmen de Jong
parent
c5219dfb3f
commit
46c12a8899
@ -2487,41 +2487,66 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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TargetStorageKind.ARRAY -> {
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if(assignAsWord)
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TODO("assign register as word into Array not yet supported")
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if (target.constArrayIndexValue!=null) {
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when (register) {
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CpuRegister.A -> {}
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CpuRegister.X -> asmgen.out(" txa")
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CpuRegister.Y -> asmgen.out(" tya")
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if(target.array!!.splitWords)
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TODO("assign register into split words ${target.position}")
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if(target.origAstTarget?.array?.variable?.type==DataType.UWORD) {
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// assigning an indexed pointer var
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if (target.constArrayIndexValue!=null) {
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when (register) {
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CpuRegister.A -> {}
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CpuRegister.X -> asmgen.out(" txa")
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CpuRegister.Y -> asmgen.out(" tya")
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}
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if(asmgen.isZpVar(target.origAstTarget!!.array!!.variable)) {
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asmgen.out(" ldy #${target.constArrayIndexValue} | sta (${target.asmVarname}),y")
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} else {
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asmgen.out("""
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ldy ${target.asmVarname}
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sty P8ZP_SCRATCH_W1
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ldy ${target.asmVarname}+1
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sty P8ZP_SCRATCH_W1+1
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ldy #${target.constArrayIndexValue}
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sta (P8ZP_SCRATCH_W1),y""")
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}
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}
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if(asmgen.isZpVar(target.origAstTarget!!.array!!.variable)) {
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asmgen.out(" ldy #${target.constArrayIndexValue} | sta (${target.asmVarname}),y")
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} else {
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asmgen.out("""
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ldy ${target.asmVarname}
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sty P8ZP_SCRATCH_W1
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ldy ${target.asmVarname}+1
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sty P8ZP_SCRATCH_W1+1
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ldy #${target.constArrayIndexValue}
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sta (P8ZP_SCRATCH_W1),y""")
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else {
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when (register) {
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CpuRegister.A -> {}
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CpuRegister.X -> asmgen.out(" txa")
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CpuRegister.Y -> asmgen.out(" tya")
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}
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val indexVar = target.array!!.index as PtIdentifier
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if(asmgen.isZpVar(target.origAstTarget!!.array!!.variable)) {
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asmgen.out(" ldy ${asmgen.asmVariableName(indexVar)} | sta (${target.asmVarname}),y")
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} else {
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asmgen.out("""
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ldy ${target.asmVarname}
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sty P8ZP_SCRATCH_W1
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ldy ${target.asmVarname}+1
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sty P8ZP_SCRATCH_W1+1
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ldy ${asmgen.asmVariableName(indexVar)}
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sta (P8ZP_SCRATCH_W1),y""")
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}
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}
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}
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else {
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when (register) {
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CpuRegister.A -> {}
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CpuRegister.X -> asmgen.out(" txa")
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CpuRegister.Y -> asmgen.out(" tya")
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return
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} else {
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// assign regular array indexing
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if (target.constArrayIndexValue!=null) {
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when (register) {
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CpuRegister.A -> {}
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CpuRegister.X -> asmgen.out(" txa")
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CpuRegister.Y -> asmgen.out(" tya")
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}
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asmgen.out(" sta ${target.asmVarname}+${target.constArrayIndexValue}")
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}
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val indexVar = target.array!!.index as PtIdentifier
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if(asmgen.isZpVar(target.origAstTarget!!.array!!.variable)) {
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asmgen.out(" ldy ${asmgen.asmVariableName(indexVar)} | sta (${target.asmVarname}),y")
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} else {
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asmgen.out("""
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ldy ${target.asmVarname}
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sty P8ZP_SCRATCH_W1
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ldy ${target.asmVarname}+1
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sty P8ZP_SCRATCH_W1+1
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ldy ${asmgen.asmVariableName(indexVar)}
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sta (P8ZP_SCRATCH_W1),y""")
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else {
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when (register) {
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CpuRegister.A -> {}
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CpuRegister.X -> asmgen.out(" txa")
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CpuRegister.Y -> asmgen.out(" tya")
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}
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val indexVar = target.array!!.index as PtIdentifier
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asmgen.out(" ldy ${asmgen.asmVariableName(indexVar)} | sta ${target.asmVarname},y")
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}
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}
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}
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@ -108,9 +108,6 @@ internal fun Program.checkIdentifiers(errors: IErrorReporter, options: Compilati
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checker2.visit(this)
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if(errors.noErrors()) {
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val transforms = AstOnetimeTransforms(this, options)
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transforms.visit(this)
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transforms.applyModifications()
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val lit2decl = LiteralsToAutoVars(this, options.compTarget, errors)
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lit2decl.visit(this)
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if(errors.noErrors())
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@ -1,62 +0,0 @@
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package prog8.compiler.astprocessing
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import prog8.ast.Node
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import prog8.ast.Program
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import prog8.ast.expressions.*
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import prog8.ast.statements.AssignTarget
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import prog8.ast.statements.Assignment
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import prog8.ast.statements.DirectMemoryWrite
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import prog8.ast.statements.VarDecl
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import prog8.ast.walk.AstWalker
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import prog8.ast.walk.IAstModification
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import prog8.code.core.CompilationOptions
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import prog8.code.core.DataType
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import prog8.code.target.VMTarget
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internal class AstOnetimeTransforms(private val program: Program, private val options: CompilationOptions) : AstWalker() {
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override fun after(arrayIndexedExpression: ArrayIndexedExpression, parent: Node): Iterable<IAstModification> {
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if(parent !is VarDecl) {
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if(options.compTarget.name == VMTarget.NAME)
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return noModifications // vm codegen deals correctly with all cases
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// Don't replace the initializer value in a vardecl - this will be moved to a separate
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// assignment statement soon in after(VarDecl)
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return replacePointerVarIndexWithMemreadOrMemwrite(arrayIndexedExpression, parent)
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}
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return noModifications
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}
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private fun replacePointerVarIndexWithMemreadOrMemwrite(arrayIndexedExpression: ArrayIndexedExpression, parent: Node): Iterable<IAstModification> {
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// note: The CodeDesugarer already does something similar, but that is meant ONLY to take
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// into account the case where the index value is a word type.
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// The replacement here is to fix missing cases in the 6502 codegen. (VM codegen doesn't use this workaround)
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// TODO make the 6502 codegen better so this workaround can be removed
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val arrayVar = arrayIndexedExpression.arrayvar.targetVarDecl(program)
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if(arrayVar!=null && arrayVar.datatype == DataType.UWORD) {
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if(parent is AssignTarget) {
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val assignment = parent.parent as? Assignment
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if(assignment?.value is NumericLiteral || assignment?.value is IdentifierReference) {
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// the codegen contains correct optimized code ONLY for a constant assignment, or direct variable assignment.
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return noModifications
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}
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// Other cases aren't covered correctly by the 6502 codegen, and there are a LOT of cases.
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// So rewrite assignment target pointervar[index] into @(pointervar+index)
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// (the 6502 codegen covers all cases correctly for a direct memory assignment).
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val indexer = arrayIndexedExpression.indexer
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val add: Expression =
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if(indexer.indexExpr.constValue(program)?.number==0.0)
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arrayIndexedExpression.arrayvar.copy()
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else
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BinaryExpression(arrayIndexedExpression.arrayvar.copy(), "+", indexer.indexExpr, arrayIndexedExpression.position)
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val memwrite = DirectMemoryWrite(add, arrayIndexedExpression.position)
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val newtarget = AssignTarget(null, null, memwrite, arrayIndexedExpression.position)
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return listOf(IAstModification.ReplaceNode(parent, newtarget, parent.parent))
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}
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}
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return noModifications
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}
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}
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@ -1,6 +1,7 @@
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TODO
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====
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- bugfixes: assem crashing, imageviewer not loading past boat image, rockrunner music borked.
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- stackless: describe the changes in the manual.
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- IR: reduce the number of branch instructions such as BEQ, BEQR, etc (gradually), replace with CMP(I) + status branch instruction
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