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don't always import math automatically anymore

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This commit is contained in:
Irmen de Jong 2024-11-01 02:59:29 +01:00
parent 9005c7994a
commit 4b23b1dc86
12 changed files with 101 additions and 91 deletions
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8
codeGenCpu6502/src/prog8/codegen/cpu6502/BuiltinFunctionsAsmGen.kt
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@ -80,14 +80,14 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
when (resultType) { when (resultType) {
DataType.UBYTE -> { DataType.UBYTE -> {
asmgen.assignExpressionToRegister(fcall.args[0], RegisterOrPair.A) asmgen.assignExpressionToRegister(fcall.args[0], RegisterOrPair.A)
asmgen.out(" tay | jsr math.multiply_bytes") asmgen.out(" tay | jsr prog8_math.multiply_bytes")
if(resultRegister!=null) { if(resultRegister!=null) {
assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister, false, fcall.position, null, asmgen), CpuRegister.A, false, false) assignAsmGen.assignRegisterByte(AsmAssignTarget.fromRegisters(resultRegister, false, fcall.position, null, asmgen), CpuRegister.A, false, false)
} }
} }
DataType.UWORD -> { DataType.UWORD -> {
asmgen.assignExpressionToRegister(fcall.args[0], RegisterOrPair.AY) asmgen.assignExpressionToRegister(fcall.args[0], RegisterOrPair.AY)
asmgen.out(" jsr math.square") asmgen.out(" jsr prog8_math.square")
if(resultRegister!=null) { if(resultRegister!=null) {
assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister, false, fcall.position, null, asmgen), RegisterOrPair.AY) assignAsmGen.assignRegisterpairWord(AsmAssignTarget.fromRegisters(resultRegister, false, fcall.position, null, asmgen), RegisterOrPair.AY)
} }
@ -104,7 +104,7 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
assignAsmGen.assignExpressionToRegister(fcall.args[1], RegisterOrPair.Y, false) assignAsmGen.assignExpressionToRegister(fcall.args[1], RegisterOrPair.Y, false)
asmgen.restoreRegisterStack(CpuRegister.A ,false) asmgen.restoreRegisterStack(CpuRegister.A ,false)
// math.divmod_ub_asm: -- divide A by Y, result quotient in Y, remainder in A (unsigned) // math.divmod_ub_asm: -- divide A by Y, result quotient in Y, remainder in A (unsigned)
asmgen.out(" jsr math.divmod_ub_asm") asmgen.out(" jsr prog8_math.divmod_ub_asm")
val var2name = asmgen.asmVariableName(fcall.args[2] as PtIdentifier) val var2name = asmgen.asmVariableName(fcall.args[2] as PtIdentifier)
val var3name = asmgen.asmVariableName(fcall.args[3] as PtIdentifier) val var3name = asmgen.asmVariableName(fcall.args[3] as PtIdentifier)
val divisionTarget = AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, DataType.UBYTE, fcall.definingISub(), fcall.args[2].position, var2name) val divisionTarget = AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, DataType.UBYTE, fcall.definingISub(), fcall.args[2].position, var2name)
@ -118,7 +118,7 @@ internal class BuiltinFunctionsAsmGen(private val program: PtProgram,
// math.divmod_uw_asm: -- divide two unsigned words (16 bit each) into 16 bit results // math.divmod_uw_asm: -- divide two unsigned words (16 bit each) into 16 bit results
// input: P8ZP_SCRATCH_W1 in ZP: 16 bit number, A/Y: 16 bit divisor // input: P8ZP_SCRATCH_W1 in ZP: 16 bit number, A/Y: 16 bit divisor
// output: P8ZP_SCRATCH_W2 in ZP: 16 bit remainder, A/Y: 16 bit division result // output: P8ZP_SCRATCH_W2 in ZP: 16 bit remainder, A/Y: 16 bit division result
asmgen.out(" jsr math.divmod_uw_asm") asmgen.out(" jsr prog8_math.divmod_uw_asm")
val var2name = asmgen.asmVariableName(fcall.args[2] as PtIdentifier) val var2name = asmgen.asmVariableName(fcall.args[2] as PtIdentifier)
val divisionTarget = AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, DataType.UBYTE, fcall.definingISub(), fcall.args[2].position, var2name) val divisionTarget = AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, DataType.UBYTE, fcall.definingISub(), fcall.args[2].position, var2name)
val remainderVar = asmgen.asmVariableName(fcall.args[3] as PtIdentifier) val remainderVar = asmgen.asmVariableName(fcall.args[3] as PtIdentifier)

52
codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt
View File

@ -936,7 +936,7 @@ internal class AssignmentAsmGen(
if(!directIntoY(expr.right)) asmgen.out(" pha") if(!directIntoY(expr.right)) asmgen.out(" pha")
assignExpressionToRegister(expr.right, RegisterOrPair.Y, false) assignExpressionToRegister(expr.right, RegisterOrPair.Y, false)
if(!directIntoY(expr.right)) asmgen.out(" pla") if(!directIntoY(expr.right)) asmgen.out(" pla")
asmgen.out(" jsr math.divmod_ub_asm") asmgen.out(" jsr prog8_math.divmod_ub_asm")
if(target.register==RegisterOrPair.A) if(target.register==RegisterOrPair.A)
asmgen.out(" cmp #0") // fix the status register asmgen.out(" cmp #0") // fix the status register
else else
@ -945,7 +945,7 @@ internal class AssignmentAsmGen(
} }
DataType.UWORD -> { DataType.UWORD -> {
asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "P8ZP_SCRATCH_W1") asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "P8ZP_SCRATCH_W1")
asmgen.out(" jsr math.divmod_uw_asm") asmgen.out(" jsr prog8_math.divmod_uw_asm")
assignVariableWord(target, "P8ZP_SCRATCH_W2", DataType.UWORD) assignVariableWord(target, "P8ZP_SCRATCH_W2", DataType.UWORD)
return true return true
} }
@ -961,7 +961,7 @@ internal class AssignmentAsmGen(
if(!directIntoY(expr.right)) asmgen.out(" pha") if(!directIntoY(expr.right)) asmgen.out(" pha")
assignExpressionToRegister(expr.right, RegisterOrPair.Y, false) assignExpressionToRegister(expr.right, RegisterOrPair.Y, false)
if(!directIntoY(expr.right)) asmgen.out(" pla") if(!directIntoY(expr.right)) asmgen.out(" pla")
asmgen.out(" jsr math.divmod_ub_asm") asmgen.out(" jsr prog8_math.divmod_ub_asm")
assignRegisterByte(target, CpuRegister.Y, false, true) assignRegisterByte(target, CpuRegister.Y, false, true)
return true return true
} }
@ -970,19 +970,19 @@ internal class AssignmentAsmGen(
if(!directIntoY(expr.right)) asmgen.out(" pha") if(!directIntoY(expr.right)) asmgen.out(" pha")
assignExpressionToRegister(expr.right, RegisterOrPair.Y, true) assignExpressionToRegister(expr.right, RegisterOrPair.Y, true)
if(!directIntoY(expr.right)) asmgen.out(" pla") if(!directIntoY(expr.right)) asmgen.out(" pla")
asmgen.out(" jsr math.divmod_b_asm") asmgen.out(" jsr prog8_math.divmod_b_asm")
assignRegisterByte(target, CpuRegister.Y, true, true) assignRegisterByte(target, CpuRegister.Y, true, true)
return true return true
} }
DataType.UWORD -> { DataType.UWORD -> {
asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "P8ZP_SCRATCH_W1") asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "P8ZP_SCRATCH_W1")
asmgen.out(" jsr math.divmod_uw_asm") asmgen.out(" jsr prog8_math.divmod_uw_asm")
assignRegisterpairWord(target, RegisterOrPair.AY) assignRegisterpairWord(target, RegisterOrPair.AY)
return true return true
} }
DataType.WORD -> { DataType.WORD -> {
asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "P8ZP_SCRATCH_W1") asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "P8ZP_SCRATCH_W1")
asmgen.out(" jsr math.divmod_w_asm") asmgen.out(" jsr prog8_math.divmod_w_asm")
assignRegisterpairWord(target, RegisterOrPair.AY) assignRegisterpairWord(target, RegisterOrPair.AY)
return true return true
} }
@ -999,7 +999,7 @@ internal class AssignmentAsmGen(
if(!directIntoY(expr.right)) asmgen.out(" pha") if(!directIntoY(expr.right)) asmgen.out(" pha")
assignExpressionToRegister(expr.right, RegisterOrPair.Y, expr.type in SignedDatatypes) assignExpressionToRegister(expr.right, RegisterOrPair.Y, expr.type in SignedDatatypes)
if(!directIntoY(expr.right)) asmgen.out(" pla") if(!directIntoY(expr.right)) asmgen.out(" pla")
asmgen.out(" jsr math.multiply_bytes") asmgen.out(" jsr prog8_math.multiply_bytes")
assignRegisterByte(target, CpuRegister.A, false, true) assignRegisterByte(target, CpuRegister.A, false, true)
return true return true
} }
@ -1022,8 +1022,8 @@ internal class AssignmentAsmGen(
assignRegisterpairWord(target, RegisterOrPair.AY) assignRegisterpairWord(target, RegisterOrPair.AY)
return true return true
} else { } else {
asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "math.multiply_words.multiplier") asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "prog8_math.multiply_words.multiplier")
asmgen.out(" jsr math.multiply_words") asmgen.out(" jsr prog8_math.multiply_words")
assignRegisterpairWord(target, RegisterOrPair.AY) assignRegisterpairWord(target, RegisterOrPair.AY)
} }
return true return true
@ -1035,16 +1035,16 @@ internal class AssignmentAsmGen(
in ByteDatatypes -> { in ByteDatatypes -> {
assignExpressionToRegister(expr.left, RegisterOrPair.A, expr.type in SignedDatatypes) assignExpressionToRegister(expr.left, RegisterOrPair.A, expr.type in SignedDatatypes)
if (value in asmgen.optimizedByteMultiplications) if (value in asmgen.optimizedByteMultiplications)
asmgen.out(" jsr math.mul_byte_${value}") asmgen.out(" jsr prog8_math.mul_byte_${value}")
else else
asmgen.out(" ldy #$value | jsr math.multiply_bytes") asmgen.out(" ldy #$value | jsr prog8_math.multiply_bytes")
assignRegisterByte(target, CpuRegister.A, false, true) assignRegisterByte(target, CpuRegister.A, false, true)
return true return true
} }
in WordDatatypes -> { in WordDatatypes -> {
if (value in asmgen.optimizedWordMultiplications) { if (value in asmgen.optimizedWordMultiplications) {
assignExpressionToRegister(expr.left, RegisterOrPair.AY, expr.type in SignedDatatypes) assignExpressionToRegister(expr.left, RegisterOrPair.AY, expr.type in SignedDatatypes)
asmgen.out(" jsr math.mul_word_${value}") asmgen.out(" jsr prog8_math.mul_word_${value}")
} }
else { else {
if(expr.definingBlock()!!.options.veraFxMuls){ if(expr.definingBlock()!!.options.veraFxMuls){
@ -1055,8 +1055,8 @@ internal class AssignmentAsmGen(
sty cx16.r0+1 sty cx16.r0+1
jsr verafx.muls""") jsr verafx.muls""")
} else { } else {
asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "math.multiply_words.multiplier") asmgen.assignWordOperandsToAYAndVar(expr.right, expr.left, "prog8_math.multiply_words.multiplier")
asmgen.out(" jsr math.multiply_words") asmgen.out(" jsr prog8_math.multiply_words")
} }
} }
assignRegisterpairWord(target, RegisterOrPair.AY) assignRegisterpairWord(target, RegisterOrPair.AY)
@ -1093,11 +1093,11 @@ internal class AssignmentAsmGen(
asmgen.restoreRegisterStack(CpuRegister.Y, true) asmgen.restoreRegisterStack(CpuRegister.Y, true)
if(expr.operator==">>") if(expr.operator==">>")
if(signed) if(signed)
asmgen.out(" jsr math.lsr_byte_A") asmgen.out(" jsr prog8_math.lsr_byte_A")
else else
asmgen.out(" jsr math.lsr_ubyte_A") asmgen.out(" jsr prog8_math.lsr_ubyte_A")
else else
asmgen.out(" jsr math.asl_byte_A") asmgen.out(" jsr prog8_math.asl_byte_A")
assignRegisterByte(target, CpuRegister.A, signed, true) assignRegisterByte(target, CpuRegister.A, signed, true)
return true return true
} else { } else {
@ -1105,11 +1105,11 @@ internal class AssignmentAsmGen(
asmgen.restoreRegisterStack(CpuRegister.X, true) asmgen.restoreRegisterStack(CpuRegister.X, true)
if(expr.operator==">>") if(expr.operator==">>")
if(signed) if(signed)
asmgen.out(" jsr math.lsr_word_AY") asmgen.out(" jsr prog8_math.lsr_word_AY")
else else
asmgen.out(" jsr math.lsr_uword_AY") asmgen.out(" jsr prog8_math.lsr_uword_AY")
else else
asmgen.out(" jsr math.asl_word_AY") asmgen.out(" jsr prog8_math.asl_word_AY")
assignRegisterpairWord(target, RegisterOrPair.AY) assignRegisterpairWord(target, RegisterOrPair.AY)
return true return true
} }
@ -1129,7 +1129,7 @@ internal class AssignmentAsmGen(
if(shifts==1) if(shifts==1)
asmgen.out(" cmp #$80 | ror a") asmgen.out(" cmp #$80 | ror a")
else else
asmgen.out(" ldy #$shifts | jsr math.lsr_byte_A") asmgen.out(" ldy #$shifts | jsr prog8_math.lsr_byte_A")
} else { } else {
repeat(shifts) { repeat(shifts) {
asmgen.out(" lsr a") asmgen.out(" lsr a")
@ -1141,7 +1141,7 @@ internal class AssignmentAsmGen(
} }
else -> { else -> {
if(signed && expr.operator==">>") { if(signed && expr.operator==">>") {
asmgen.out(" ldy #$shifts | jsr math.lsr_byte_A") asmgen.out(" ldy #$shifts | jsr prog8_math.lsr_byte_A")
} else { } else {
asmgen.out(" lda #0") asmgen.out(" lda #0")
} }
@ -1174,7 +1174,7 @@ internal class AssignmentAsmGen(
ror a""") ror a""")
} }
else else
asmgen.out(" ldx #$shifts | jsr math.lsr_word_AY") asmgen.out(" ldx #$shifts | jsr prog8_math.lsr_word_AY")
} else { } else {
if(shifts>0) { if(shifts>0) {
asmgen.out(" sty P8ZP_SCRATCH_B1") asmgen.out(" sty P8ZP_SCRATCH_B1")
@ -1198,16 +1198,16 @@ internal class AssignmentAsmGen(
} else { } else {
asmgen.out(" ldx #$shifts") asmgen.out(" ldx #$shifts")
if(signed) if(signed)
asmgen.out(" jsr math.lsr_word_AY") asmgen.out(" jsr prog8_math.lsr_word_AY")
else else
asmgen.out(" jsr math.lsr_uword_AY") asmgen.out(" jsr prog8_math.lsr_uword_AY")
} }
assignRegisterpairWord(target, RegisterOrPair.AY) assignRegisterpairWord(target, RegisterOrPair.AY)
return true return true
} }
else -> { else -> {
if(signed && expr.operator==">>") { if(signed && expr.operator==">>") {
asmgen.out(" ldx #$shifts | jsr math.lsr_word_AY") asmgen.out(" ldx #$shifts | jsr prog8_math.lsr_word_AY")
} else { } else {
asmgen.out(" lda #0 | ldy #0") asmgen.out(" lda #0 | ldy #0")
} }

94
codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AugmentableAssignmentAsmGen.kt
View File

@ -904,9 +904,9 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
when (operator) { when (operator) {
"+" -> asmgen.out(" clc | adc $otherName") "+" -> asmgen.out(" clc | adc $otherName")
"-" -> asmgen.out(" sec | sbc $otherName") "-" -> asmgen.out(" sec | sbc $otherName")
"*" -> asmgen.out(" ldy $otherName | jsr math.multiply_bytes") "*" -> asmgen.out(" ldy $otherName | jsr prog8_math.multiply_bytes")
"/" -> asmgen.out(" ldy $otherName | jsr math.divmod_ub_asm | tya") "/" -> asmgen.out(" ldy $otherName | jsr prog8_math.divmod_ub_asm | tya")
"%" -> asmgen.out(" ldy $otherName | jsr math.divmod_ub_asm") "%" -> asmgen.out(" ldy $otherName | jsr prog8_math.divmod_ub_asm")
"<<" -> { "<<" -> {
asmgen.out(""" asmgen.out("""
ldy $otherName ldy $otherName
@ -981,23 +981,23 @@ internal class AugmentableAssignmentAsmGen(private val program: PtProgram,
"*" -> { "*" -> {
val sourceName = asmgen.loadByteFromPointerIntoA(pointervar) val sourceName = asmgen.loadByteFromPointerIntoA(pointervar)
if(value in asmgen.optimizedByteMultiplications) if(value in asmgen.optimizedByteMultiplications)
asmgen.out(" jsr math.mul_byte_${value}") asmgen.out(" jsr prog8_math.mul_byte_${value}")
else else
asmgen.out(" ldy #$value | jsr math.multiply_bytes") asmgen.out(" ldy #$value | jsr prog8_math.multiply_bytes")
asmgen.storeAIntoZpPointerVar(sourceName, false) asmgen.storeAIntoZpPointerVar(sourceName, false)
} }
"/" -> { "/" -> {
val sourceName = asmgen.loadByteFromPointerIntoA(pointervar) val sourceName = asmgen.loadByteFromPointerIntoA(pointervar)
if(value==0) if(value==0)
throw AssemblyError("division by zero") throw AssemblyError("division by zero")
asmgen.out(" ldy #$value | jsr math.divmod_ub_asm | tya") asmgen.out(" ldy #$value | jsr prog8_math.divmod_ub_asm | tya")
asmgen.storeAIntoZpPointerVar(sourceName, false) asmgen.storeAIntoZpPointerVar(sourceName, false)
} }
"%" -> { "%" -> {
val sourceName = asmgen.loadByteFromPointerIntoA(pointervar) val sourceName = asmgen.loadByteFromPointerIntoA(pointervar)
if(value==0) if(value==0)
throw AssemblyError("division by zero") throw AssemblyError("division by zero")
asmgen.out(" ldy #$value | jsr math.divmod_ub_asm") asmgen.out(" ldy #$value | jsr prog8_math.divmod_ub_asm")
asmgen.storeAIntoZpPointerVar(sourceName, false) asmgen.storeAIntoZpPointerVar(sourceName, false)
} }
"<<" -> { "<<" -> {
@ -1143,17 +1143,17 @@ $shortcutLabel:""")
when (operator) { when (operator) {
"+" -> asmgen.out(" clc | adc $variable") "+" -> asmgen.out(" clc | adc $variable")
"-" -> asmgen.out(" sec | sbc $variable") "-" -> asmgen.out(" sec | sbc $variable")
"*" -> asmgen.out(" ldy $variable | jsr math.multiply_bytes") "*" -> asmgen.out(" ldy $variable | jsr prog8_math.multiply_bytes")
"/" -> { "/" -> {
if(signed) if(signed)
asmgen.out(" ldy $variable | jsr math.divmod_b_asm | tya") asmgen.out(" ldy $variable | jsr prog8_math.divmod_b_asm | tya")
else else
asmgen.out(" ldy $variable | jsr math.divmod_ub_asm | tya") asmgen.out(" ldy $variable | jsr prog8_math.divmod_ub_asm | tya")
} }
"%" -> { "%" -> {
if(signed) if(signed)
throw AssemblyError("remainder of signed integers is not properly defined/implemented, use unsigned instead") throw AssemblyError("remainder of signed integers is not properly defined/implemented, use unsigned instead")
asmgen.out(" ldy $variable | jsr math.divmod_ub_asm") asmgen.out(" ldy $variable | jsr prog8_math.divmod_ub_asm")
} }
"<<" -> { "<<" -> {
asmgen.out(""" asmgen.out("""
@ -1318,14 +1318,14 @@ $shortcutLabel:""")
} }
"/" -> { "/" -> {
if(signed) if(signed)
asmgen.out(" tay | lda $variable | jsr math.divmod_b_asm | tya") asmgen.out(" tay | lda $variable | jsr prog8_math.divmod_b_asm | tya")
else else
asmgen.out(" tay | lda $variable | jsr math.divmod_ub_asm | tya") asmgen.out(" tay | lda $variable | jsr prog8_math.divmod_ub_asm | tya")
} }
"%" -> { "%" -> {
if(signed) if(signed)
throw AssemblyError("remainder of signed integers is not properly defined/implemented, use unsigned instead") throw AssemblyError("remainder of signed integers is not properly defined/implemented, use unsigned instead")
asmgen.out(" tay | lda $variable | jsr math.divmod_ub_asm") asmgen.out(" tay | lda $variable | jsr prog8_math.divmod_ub_asm")
} }
"<<" -> { "<<" -> {
asmgen.out(""" asmgen.out("""
@ -1478,16 +1478,16 @@ $shortcutLabel:""")
} }
"*" -> { "*" -> {
if(value in asmgen.optimizedByteMultiplications) if(value in asmgen.optimizedByteMultiplications)
asmgen.out(" lda $name | jsr math.mul_byte_$value | sta $name") asmgen.out(" lda $name | jsr prog8_math.mul_byte_$value | sta $name")
else else
asmgen.out(" lda $name | ldy #$value | jsr math.multiply_bytes | sta $name") asmgen.out(" lda $name | ldy #$value | jsr prog8_math.multiply_bytes | sta $name")
} }
"/" -> { "/" -> {
// replacing division by shifting is done in an optimizer step. // replacing division by shifting is done in an optimizer step.
if (dt == DataType.UBYTE) if (dt == DataType.UBYTE)
asmgen.out(" lda $name | ldy #$value | jsr math.divmod_ub_asm | sty $name") asmgen.out(" lda $name | ldy #$value | jsr prog8_math.divmod_ub_asm | sty $name")
else else
asmgen.out(" lda $name | ldy #$value | jsr math.divmod_b_asm | sty $name") asmgen.out(" lda $name | ldy #$value | jsr prog8_math.divmod_b_asm | sty $name")
} }
"%" -> { "%" -> {
if(dt==DataType.BYTE) if(dt==DataType.BYTE)
@ -1495,7 +1495,7 @@ $shortcutLabel:""")
asmgen.out(""" asmgen.out("""
lda $name lda $name
ldy #$value ldy #$value
jsr math.divmod_ub_asm jsr prog8_math.divmod_ub_asm
sta $name""") sta $name""")
} }
"<<" -> { "<<" -> {
@ -1529,7 +1529,7 @@ $shortcutLabel:""")
value>3 -> asmgen.out(""" value>3 -> asmgen.out("""
lda $name lda $name
ldy #$value ldy #$value
jsr math.lsr_byte_A jsr prog8_math.lsr_byte_A
sta $name""") sta $name""")
else -> repeat(value) { asmgen.out(" lda $name | asl a | ror $name") } else -> repeat(value) { asmgen.out(" lda $name | asl a | ror $name") }
} }
@ -1802,7 +1802,7 @@ $shortcutLabel:""")
"*" -> { "*" -> {
// the mul code works for both signed and unsigned // the mul code works for both signed and unsigned
if(value in asmgen.optimizedWordMultiplications) { if(value in asmgen.optimizedWordMultiplications) {
asmgen.out(" lda $lsb | ldy $msb | jsr math.mul_word_$value | sta $lsb | sty $msb") asmgen.out(" lda $lsb | ldy $msb | jsr prog8_math.mul_word_$value | sta $lsb | sty $msb")
} else { } else {
if(block?.options?.veraFxMuls==true) if(block?.options?.veraFxMuls==true)
// cx16 verafx hardware mul // cx16 verafx hardware mul
@ -1821,12 +1821,12 @@ $shortcutLabel:""")
else else
asmgen.out(""" asmgen.out("""
lda $lsb lda $lsb
sta math.multiply_words.multiplier sta prog8_math.multiply_words.multiplier
lda $msb lda $msb
sta math.multiply_words.multiplier+1 sta prog8_math.multiply_words.multiplier+1
lda #<$value lda #<$value
ldy #>$value ldy #>$value
jsr math.multiply_words jsr prog8_math.multiply_words
sta $lsb sta $lsb
sty $msb""") sty $msb""")
} }
@ -1844,7 +1844,7 @@ $shortcutLabel:""")
sty P8ZP_SCRATCH_W1+1 sty P8ZP_SCRATCH_W1+1
lda #<$value lda #<$value
ldy #>$value ldy #>$value
jsr math.divmod_w_asm jsr prog8_math.divmod_w_asm
sta $lsb sta $lsb
sty $msb sty $msb
""") """)
@ -1857,7 +1857,7 @@ $shortcutLabel:""")
sty P8ZP_SCRATCH_W1+1 sty P8ZP_SCRATCH_W1+1
lda #<$value lda #<$value
ldy #>$value ldy #>$value
jsr math.divmod_uw_asm jsr prog8_math.divmod_uw_asm
sta $lsb sta $lsb
sty $msb sty $msb
""") """)
@ -1876,7 +1876,7 @@ $shortcutLabel:""")
sty P8ZP_SCRATCH_W1+1 sty P8ZP_SCRATCH_W1+1
lda #<$value lda #<$value
ldy #>$value ldy #>$value
jsr math.divmod_uw_asm jsr prog8_math.divmod_uw_asm
lda P8ZP_SCRATCH_W2 lda P8ZP_SCRATCH_W2
ldy P8ZP_SCRATCH_W2+1 ldy P8ZP_SCRATCH_W2+1
sta $lsb sta $lsb
@ -2297,20 +2297,20 @@ $shortcutLabel:""")
sty $name+1""") sty $name+1""")
} else { } else {
if(valueDt==DataType.UBYTE) { if(valueDt==DataType.UBYTE) {
asmgen.out(" lda $otherName | sta math.multiply_words.multiplier") asmgen.out(" lda $otherName | sta prog8_math.multiply_words.multiplier")
if(asmgen.isTargetCpu(CpuType.CPU65c02)) if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz math.multiply_words.multiplier+1") asmgen.out(" stz prog8_math.multiply_words.multiplier+1")
else else
asmgen.out(" lda #0 | sta math.multiply_words.multiplier+1") asmgen.out(" lda #0 | sta prog8_math.multiply_words.multiplier+1")
} else { } else {
asmgen.out(" lda $otherName") asmgen.out(" lda $otherName")
asmgen.signExtendAYlsb(valueDt) asmgen.signExtendAYlsb(valueDt)
asmgen.out(" sta math.multiply_words.multiplier | sty math.multiply_words.multiplier+1") asmgen.out(" sta prog8_math.multiply_words.multiplier | sty prog8_math.multiply_words.multiplier+1")
} }
asmgen.out(""" asmgen.out("""
lda $name lda $name
ldy $name+1 ldy $name+1
jsr math.multiply_words jsr prog8_math.multiply_words
sta $name sta $name
sty $name+1""") sty $name+1""")
} }
@ -2324,7 +2324,7 @@ $shortcutLabel:""")
sty P8ZP_SCRATCH_W1+1 sty P8ZP_SCRATCH_W1+1
lda $otherName lda $otherName
ldy #0 ldy #0
jsr math.divmod_uw_asm jsr prog8_math.divmod_uw_asm
sta $name sta $name
sty $name+1 sty $name+1
""") """)
@ -2336,7 +2336,7 @@ $shortcutLabel:""")
sty P8ZP_SCRATCH_W1+1 sty P8ZP_SCRATCH_W1+1
lda $otherName lda $otherName
ldy #0 ldy #0
jsr math.divmod_w_asm jsr prog8_math.divmod_w_asm
sta $name sta $name
sty $name+1 sty $name+1
""") """)
@ -2352,7 +2352,7 @@ $shortcutLabel:""")
sty P8ZP_SCRATCH_W1+1 sty P8ZP_SCRATCH_W1+1
lda $otherName lda $otherName
ldy #0 ldy #0
jsr math.divmod_uw_asm jsr prog8_math.divmod_uw_asm
lda P8ZP_SCRATCH_W2 lda P8ZP_SCRATCH_W2
sta $name sta $name
lda P8ZP_SCRATCH_W2+1 lda P8ZP_SCRATCH_W2+1
@ -2460,11 +2460,11 @@ $shortcutLabel:""")
asmgen.out(""" asmgen.out("""
lda $otherName lda $otherName
ldy $otherName+1 ldy $otherName+1
sta math.multiply_words.multiplier sta prog8_math.multiply_words.multiplier
sty math.multiply_words.multiplier+1 sty prog8_math.multiply_words.multiplier+1
lda $name lda $name
ldy $name+1 ldy $name+1
jsr math.multiply_words jsr prog8_math.multiply_words
sta $name sta $name
sty $name+1""") sty $name+1""")
} }
@ -2477,7 +2477,7 @@ $shortcutLabel:""")
sty P8ZP_SCRATCH_W1+1 sty P8ZP_SCRATCH_W1+1
lda $otherName lda $otherName
ldy $otherName+1 ldy $otherName+1
jsr math.divmod_w_asm jsr prog8_math.divmod_w_asm
sta $name sta $name
sty $name+1""") sty $name+1""")
} }
@ -2489,7 +2489,7 @@ $shortcutLabel:""")
sty P8ZP_SCRATCH_W1+1 sty P8ZP_SCRATCH_W1+1
lda $otherName lda $otherName
ldy $otherName+1 ldy $otherName+1
jsr math.divmod_uw_asm jsr prog8_math.divmod_uw_asm
sta $name sta $name
sty $name+1""") sty $name+1""")
} }
@ -2504,7 +2504,7 @@ $shortcutLabel:""")
sty P8ZP_SCRATCH_W1+1 sty P8ZP_SCRATCH_W1+1
lda $otherName lda $otherName
ldy $otherName+1 ldy $otherName+1
jsr math.divmod_uw_asm jsr prog8_math.divmod_uw_asm
lda P8ZP_SCRATCH_W2 lda P8ZP_SCRATCH_W2
sta $name sta $name
lda P8ZP_SCRATCH_W2+1 lda P8ZP_SCRATCH_W2+1
@ -2661,11 +2661,11 @@ $shortcutLabel:""")
""") """)
else else
asmgen.out(""" asmgen.out("""
sta math.multiply_words.multiplier sta prog8_math.multiply_words.multiplier
sty math.multiply_words.multiplier+1 sty prog8_math.multiply_words.multiplier+1
lda $name lda $name
ldy $name+1 ldy $name+1
jsr math.multiply_words jsr prog8_math.multiply_words
sta $name sta $name
sty $name+1 sty $name+1
""") """)
@ -2680,9 +2680,9 @@ $shortcutLabel:""")
sta P8ZP_SCRATCH_W1+1 sta P8ZP_SCRATCH_W1+1
txa""") txa""")
if (dt == DataType.WORD) if (dt == DataType.WORD)
asmgen.out(" jsr math.divmod_w_asm") asmgen.out(" jsr prog8_math.divmod_w_asm")
else else
asmgen.out(" jsr math.divmod_uw_asm") asmgen.out(" jsr prog8_math.divmod_uw_asm")
asmgen.out(" sta $name | sty $name+1") asmgen.out(" sta $name | sty $name+1")
} }
@ -2696,7 +2696,7 @@ $shortcutLabel:""")
lda $name+1 lda $name+1
sta P8ZP_SCRATCH_W1+1 sta P8ZP_SCRATCH_W1+1
txa txa
jsr math.divmod_uw_asm jsr prog8_math.divmod_uw_asm
lda P8ZP_SCRATCH_W2 lda P8ZP_SCRATCH_W2
ldy P8ZP_SCRATCH_W2+1 ldy P8ZP_SCRATCH_W2+1
sta $name sta $name

14
compiler/res/prog8lib/math.p8
View File

@ -5,8 +5,6 @@
math { math {
%option no_symbol_prefixing, ignore_unused %option no_symbol_prefixing, ignore_unused
%asminclude "library:math.asm"
asmsub sin8u(ubyte angle @A) clobbers(Y) -> ubyte @A { asmsub sin8u(ubyte angle @A) clobbers(Y) -> ubyte @A {
%asm {{ %asm {{
tay tay
@ -81,13 +79,13 @@ _sinecosR8 .char trunc(127.0 * sin(range(180+45) * rad(360.0/180.0)))
asmsub rnd() clobbers(Y) -> ubyte @A { asmsub rnd() clobbers(Y) -> ubyte @A {
%asm {{ %asm {{
jmp math.randbyte jmp prog8_math.randbyte
}} }}
} }
asmsub rndw() -> uword @AY { asmsub rndw() -> uword @AY {
%asm {{ %asm {{
jmp math.randword jmp prog8_math.randword
}} }}
} }
@ -112,12 +110,12 @@ _sinecosR8 .char trunc(127.0 * sin(range(180+45) * rad(360.0/180.0)))
asmsub rndseed(uword seed1 @AY, uword seed2 @R0) clobbers(A,Y) { asmsub rndseed(uword seed1 @AY, uword seed2 @R0) clobbers(A,Y) {
; -- set new pseudo RNG's seed values. Defaults are: $00c2, $1137 ; -- set new pseudo RNG's seed values. Defaults are: $00c2, $1137
%asm {{ %asm {{
sta math.randword.x1 sta prog8_math.randword.x1
sty math.randword.c1 sty prog8_math.randword.c1
lda cx16.r0L lda cx16.r0L
sta math.randword.a1 sta prog8_math.randword.a1
lda cx16.r0H lda cx16.r0H
sta math.randword.b1 sta prog8_math.randword.b1
rts rts
}} }}
} }

5
compiler/res/prog8lib/prog8_math.p8 Normal file
View File

@ -0,0 +1,5 @@
prog8_math {
%option no_symbol_prefixing
%asminclude "library:math.asm"
}

1
compiler/res/prog8lib/virtual/prog8_math.p8 Normal file
View File

@ -0,0 +1 @@
; for the VM this is just empty, everything math is in math.p8

4
compiler/src/prog8/compiler/Compiler.kt
View File

@ -313,9 +313,7 @@ fun parseMainModule(filepath: Path,
// import the default modules // import the default modules
importer.importImplicitLibraryModule("syslib") importer.importImplicitLibraryModule("syslib")
if(compilerOptions.compTarget.name!=VMTarget.NAME && !compilerOptions.experimentalCodegen) { importer.importImplicitLibraryModule("prog8_math")
importer.importImplicitLibraryModule("math")
}
importer.importImplicitLibraryModule("prog8_lib") importer.importImplicitLibraryModule("prog8_lib")
if(program.allBlocks.any { it.options().any { option->option=="verafxmuls" } }) { if(program.allBlocks.any { it.options().any { option->option=="verafxmuls" } }) {
if(compTarget.name==Cx16Target.NAME) if(compTarget.name==Cx16Target.NAME)

4
compiler/test/TestImportedModulesOrderAndOptions.kt
View File

@ -45,7 +45,7 @@ main {
"shared_cbm_textio_functions", "shared_cbm_textio_functions",
"floats", "floats",
"shared_floats_functions", "shared_floats_functions",
"math", "prog8_math",
"prog8_lib" "prog8_lib"
) )
} }
@ -101,7 +101,7 @@ main {
listOf( listOf(
internedStringsModuleName, internedStringsModuleName,
filenameBase, filenameBase,
"textio", "syslib", "conv", "shared_cbm_textio_functions", "floats", "shared_floats_functions", "math", "prog8_lib" "textio", "syslib", "conv", "shared_cbm_textio_functions", "floats", "shared_floats_functions", "prog8_math", "prog8_lib"
) )
} }
options.floats shouldBe true options.floats shouldBe true

7
docs/source/todo.rst
View File

@ -1,11 +1,16 @@
TODO TODO
==== ====
paint and rockrunner are a couple of bytes bigger. why?
merge problem: if 2 library modules both have merge, stuff breaks (math & prog8_math where prog8_math used to have math block.... didn't work)
for releasenotes: gfx2.width and gfx2.height got renamed as gfx_lores.WIDTH/HEIGHT or gfx_hires4.WIDTH/HEIGTH constants.
replace zsound example by a zsmkit example replace zsound example by a zsmkit example
contribute a short how-to to the zsmkit repo for building a suitable blob contribute a short how-to to the zsmkit repo for building a suitable blob
write a howto for integrating third party library code like zsmkit and vtui write a howto for integrating third party library code like zsmkit and vtui
can we make it so that math is not always included on 6502 target? (what does it need, move that to another library perhaps?)
Improve register load order in subroutine call args assignments: Improve register load order in subroutine call args assignments:

1
examples/cx16/diskspeed.p8
View File

@ -1,3 +1,4 @@
%import math
%import diskio %import diskio
%import floats %import floats
%zeropage basicsafe %zeropage basicsafe

1
examples/cx16/sprites/dragon.p8
View File

@ -1,3 +1,4 @@
%import math
%import diskio %import diskio
%import textio %import textio
%import sprites %import sprites

1
examples/cx16/sprites/dragons.p8
View File

@ -1,3 +1,4 @@
%import math
%import diskio %import diskio
%import textio %import textio
%import sprites %import sprites