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optimize shifts by 1 by inlining it better

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This commit is contained in:
Irmen de Jong 2024-07-21 22:08:41 +02:00
parent 3681d6ee1c
commit 4c98070b3c
3 changed files with 52 additions and 91 deletions
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14
codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt
View File

@ -1105,6 +1105,9 @@ internal class AssignmentAsmGen(private val program: PtProgram,
}
} else {
if (signed && shifts > 0) {
if(shifts==1)
asmgen.out(" cmp #$80 | ror a")
else
asmgen.out(" ldy #$shifts | jsr math.lsr_byte_A")
} else {
repeat(shifts) {
@ -1139,6 +1142,17 @@ internal class AssignmentAsmGen(private val program: PtProgram,
}
} else {
if(signed && shifts>0) {
if(shifts==1) {
asmgen.out("""
pha
tya
cmp #$80
ror a
tay
pla
ror a""")
}
else
asmgen.out(" ldx #$shifts | jsr math.lsr_word_AY")
} else {
if(shifts>0) {

22
docs/source/todo.rst
View File

@ -5,28 +5,6 @@ See open issues on github.
Re-generate the skeletons doc files.
optimize signed word bit shifting?:
1 shift right of AX signed word:
stx P8ZP_SCRATCH_B1
cpx #$80
ror P8ZP_SCRATCH_B1
ror a
ldx P8ZP_SCRATCH_B1
multi shift right: (amount in $22)
sta $4
txa
ldx $22
beq end
loop cmp #$80
ror
ror $4
dex
bne loop
end: tax
lda $4
Improve register load order in subroutine call args assignments:
in certain situations, the "wrong" order of evaluation of function call arguments is done which results
in overwriting registers that already got their value, which requires a lot of stack juggling (especially on plain 6502 cpu!)

103
examples/test.p8
View File

@ -16,96 +16,65 @@ main {
word @shared wvalue = -8888
txt.print_b(bvalue/2)
txt.nl()
txt.print_w(wvalue/2)
txt.spc()
txt.print_b(bvalue/4)
txt.spc()
txt.print_b(bvalue/8)
txt.nl()
bvalue /= 2
wvalue /= 2
txt.print_b(bvalue)
txt.spc()
bvalue /= 8
txt.print_b(bvalue)
txt.nl()
txt.print_w(wvalue)
txt.nl()
bvalue *= 2
wvalue *= 2
txt.print_b(bvalue)
txt.nl()
txt.print_w(wvalue)
txt.nl()
txt.nl()
txt.print_b(bvalue/4)
txt.nl()
txt.print_w(wvalue/2)
txt.spc()
txt.print_w(wvalue/4)
txt.spc()
txt.print_w(wvalue/8)
txt.nl()
bvalue /= 4
wvalue /= 4
txt.print_b(bvalue)
txt.nl()
wvalue /= 2
txt.print_w(wvalue)
txt.nl()
bvalue *= 4
wvalue *= 4
txt.print_b(bvalue)
txt.nl()
txt.spc()
wvalue /= 8
txt.print_w(wvalue)
txt.nl()
txt.nl()
}
sub unsigned() {
txt.print("\nunsigned\n")
ubyte @shared ubvalue = 88
uword @shared uwvalue = 8888
ubyte @shared bvalue = 88
uword @shared wvalue = 8888
txt.print_ub(ubvalue/2)
txt.nl()
txt.print_uw(uwvalue/2)
txt.print_ub(bvalue/2)
txt.spc()
txt.print_ub(bvalue/4)
txt.spc()
txt.print_ub(bvalue/8)
txt.nl()
ubvalue /= 2
uwvalue /= 2
txt.print_ub(ubvalue)
txt.nl()
txt.print_uw(uwvalue)
bvalue /= 2
txt.print_ub(bvalue)
txt.spc()
bvalue /= 8
txt.print_ub(bvalue)
txt.nl()
ubvalue *= 2
uwvalue *= 2
txt.print_ub(ubvalue)
txt.nl()
txt.print_uw(uwvalue)
txt.nl()
txt.print_uw(wvalue/2)
txt.spc()
txt.print_uw(wvalue/4)
txt.spc()
txt.print_uw(wvalue/8)
txt.nl()
txt.print_ub(ubvalue/4)
txt.nl()
txt.print_uw(uwvalue/4)
txt.nl()
ubvalue /= 4
uwvalue /= 4
txt.print_ub(ubvalue)
txt.nl()
txt.print_uw(uwvalue)
txt.nl()
ubvalue *= 4
uwvalue *= 4
txt.print_ub(ubvalue)
txt.nl()
txt.print_uw(uwvalue)
wvalue /= 2
txt.print_uw(wvalue)
txt.spc()
wvalue /= 8
txt.print_uw(wvalue)
txt.nl()
}
}