fixed mkword() bug

This commit is contained in:
Irmen de Jong 2021-02-13 22:00:13 +01:00
parent f6136891cc
commit 4fff150c7b
2 changed files with 24 additions and 21 deletions

View File

@ -965,7 +965,15 @@ internal class BuiltinFunctionsAsmGen(private val program: Program, private val
asmgen.out(" sta P8ESTACK_LO,x | tya | sta P8ESTACK_HI,x | dex") asmgen.out(" sta P8ESTACK_LO,x | tya | sta P8ESTACK_HI,x | dex")
} else { } else {
val reg = resultRegister ?: RegisterOrPair.AY val reg = resultRegister ?: RegisterOrPair.AY
val needAsave = !(fcall.args[0] is DirectMemoryRead || fcall.args[0] is NumericLiteralValue || fcall.args[0] is IdentifierReference) var needAsave = !(fcall.args[0] is DirectMemoryRead || fcall.args[0] is NumericLiteralValue || fcall.args[0] is IdentifierReference)
if(!needAsave) {
val mr0 = fcall.args[0] as? DirectMemoryRead
val mr1 = fcall.args[1] as? DirectMemoryRead
if (mr0 != null)
needAsave = mr0.addressExpression !is NumericLiteralValue && mr0.addressExpression !is IdentifierReference
if (mr1 != null)
needAsave = needAsave or (mr1.addressExpression !is NumericLiteralValue && mr1.addressExpression !is IdentifierReference)
}
when(reg) { when(reg) {
RegisterOrPair.AX -> { RegisterOrPair.AX -> {
asmgen.assignExpressionToRegister(fcall.args[1], RegisterOrPair.A) // lsb asmgen.assignExpressionToRegister(fcall.args[1], RegisterOrPair.A) // lsb

View File

@ -4,29 +4,24 @@
main { main {
sub start() { sub start() {
ubyte ib
uword iw
ubyte xx
xx=0 uword ptr = $4000
for ib in 241 to 253 step 2 { @(ptr) = $34
txt.print_ub(ib) @(ptr+1) = $ea
txt.nl()
xx++
}
for ib in 10 downto 2 step -2 { txt.print_ubhex(@(ptr), 1)
txt.print_ub(ib) txt.print_ubhex(@(ptr+1), 1)
txt.nl() txt.nl()
xx--
}
for ib in 6 downto 0 step -2 {
txt.print_ub(ib)
txt.nl()
xx--
}
txt.print_ub(xx) uword ww = mkword(@(ptr+1), @(ptr)) ; TODO FIX
txt.print_uwhex(ww,1)
txt.nl()
ubyte low = @(ptr)
ubyte high = @(ptr+1)
ww = mkword(high, low)
txt.print_uwhex(ww,1)
txt.nl()
} }
} }