mirror of
https://github.com/irmen/prog8.git
synced 2024-11-26 11:49:22 +00:00
vm: add many builtin functions
This commit is contained in:
Irmen de Jong
parent
a2c7273801
commit
51bf33040a
@ -44,5 +44,5 @@ class VirtualMachineDefinition: IMachineDefinition {
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}
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interface IVirtualMachineRunner {
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fun runProgram(program: String, throttle: Boolean)
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fun runProgram(source: String, throttle: Boolean)
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}
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@ -2,6 +2,7 @@ package prog8.codegen.virtual
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import prog8.code.StStaticVariable
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import prog8.code.ast.*
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import prog8.code.core.AssemblyError
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import prog8.code.core.DataType
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import prog8.vm.Opcode
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import prog8.vm.Syscall
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@ -11,6 +12,54 @@ internal class BuiltinFuncGen(private val codeGen: CodeGen, private val exprGen:
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fun translate(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
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return when(call.name) {
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"cmp" -> TODO()
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"max" -> TODO()
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"min" -> TODO()
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"sum" -> TODO()
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"abs" -> TODO()
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"sgn" -> funcSgn(call, resultRegister)
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"sin" -> TODO("floats not yet implemented")
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"sin8" -> TODO()
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"sin16" -> TODO()
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"sin16u" -> TODO()
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"sinr8" -> TODO()
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"sinr8u" -> TODO()
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"sinr16" -> TODO()
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"sinr16u" -> TODO()
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"cos" -> TODO("floats not yet implemented")
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"cos8" -> TODO()
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"cos16" -> TODO()
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"cos16u" -> TODO()
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"cosr8" -> TODO()
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"cosr8u" -> TODO()
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"cosr16" -> TODO()
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"cosr16u" -> TODO()
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"tan" -> TODO("floats not yet implemented")
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"atan" -> TODO("floats not yet implemented")
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"ln" -> TODO("floats not yet implemented")
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"log2" -> TODO("floats not yet implemented")
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"sqrt16" -> funcSqrt16(call, resultRegister)
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"sqrt" -> TODO("floats not yet implemented")
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"rad" -> TODO("floats not yet implemented")
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"deg" -> TODO("floats not yet implemented")
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"round" -> TODO("floats not yet implemented")
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"floor" -> TODO("floats not yet implemented")
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"ceil" -> TODO("floats not yet implemented")
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"any" -> TODO()
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"all" -> TODO()
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"pop" -> funcPop(call)
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"popw" -> funcPopw(call)
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"push" -> funcPush(call)
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"pushw" -> funcPushw(call)
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"rsave",
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"rsavex",
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"rrestore",
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"rrestorex" -> VmCodeChunk() // vm doesn't have registers to save/restore
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"rnd" -> funcRnd(resultRegister)
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"rndw" -> funcRndw(resultRegister)
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"rndf" -> TODO("floats not yet implemented")
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"callfar" -> throw AssemblyError("callfar() is for cx16 target only")
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"callrom" -> throw AssemblyError("callrom() is for cx16 target only")
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"syscall" -> funcSyscall(call)
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"syscall1" -> funcSyscall1(call)
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"syscall2" -> funcSyscall2(call)
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@ -18,7 +67,6 @@ internal class BuiltinFuncGen(private val codeGen: CodeGen, private val exprGen:
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"msb" -> funcMsb(call, resultRegister)
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"lsb" -> funcLsb(call, resultRegister)
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"memory" -> funcMemory(call, resultRegister)
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"rnd" -> funcRnd(resultRegister)
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"peek" -> funcPeek(call, resultRegister)
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"peekw" -> funcPeekW(call, resultRegister)
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"poke" -> funcPoke(call)
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@ -34,30 +82,52 @@ internal class BuiltinFuncGen(private val codeGen: CodeGen, private val exprGen:
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"ror" -> funcRolRor2(Opcode.ROXR, call, resultRegister)
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"rol2" -> funcRolRor2(Opcode.ROL, call, resultRegister)
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"ror2" -> funcRolRor2(Opcode.ROR, call, resultRegister)
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else -> {
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TODO("builtinfunc ${call.name}")
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// code += VmCodeInstruction(Opcode.NOP))
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// for (arg in call.args) {
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// code += translateExpression(arg, resultRegister)
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// code += when(arg.type) {
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// in ByteDatatypes -> VmCodeInstruction(Opcode.PUSH, VmDataType.BYTE, reg1=resultRegister))
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// in WordDatatypes -> VmCodeInstruction(Opcode.PUSH, VmDataType.WORD, reg1=resultRegister))
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// else -> throw AssemblyError("weird arg dt")
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// }
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// }
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// code += VmCodeInstruction(Opcode.CALL), labelArg = listOf("_prog8_builtin", call.name))
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// for (arg in call.args) {
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// code += when(arg.type) {
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// in ByteDatatypes -> VmCodeInstruction(Opcode.POP, VmDataType.BYTE, reg1=resultRegister))
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// in WordDatatypes -> VmCodeInstruction(Opcode.POP, VmDataType.WORD, reg1=resultRegister))
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// else -> throw AssemblyError("weird arg dt")
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// }
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// }
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// code += VmCodeInstruction(Opcode.NOP))
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}
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else -> TODO("builtinfunc ${call.name}")
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}
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}
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private fun funcSgn(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
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val code = VmCodeChunk()
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code += exprGen.translateExpression(call.args.single(), 0)
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code += VmCodeInstruction(Opcode.SGN, codeGen.vmType(call.type), reg1=resultRegister, reg2=0)
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return code
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}
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private fun funcSqrt16(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
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val code = VmCodeChunk()
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code += exprGen.translateExpression(call.args.single(), 0)
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code += VmCodeInstruction(Opcode.SQRT, VmDataType.WORD, reg1=resultRegister, reg2=0)
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return code
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}
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private fun funcPop(call: PtBuiltinFunctionCall): VmCodeChunk {
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val code = VmCodeChunk()
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code += VmCodeInstruction(Opcode.POP, VmDataType.BYTE, reg1=0)
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code += assignRegisterTo(call.args.single(), 0)
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return code
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}
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private fun funcPopw(call: PtBuiltinFunctionCall): VmCodeChunk {
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val code = VmCodeChunk()
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code += VmCodeInstruction(Opcode.POP, VmDataType.WORD, reg1=0)
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code += assignRegisterTo(call.args.single(), 0)
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return code
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}
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private fun funcPush(call: PtBuiltinFunctionCall): VmCodeChunk {
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val code = VmCodeChunk()
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code += exprGen.translateExpression(call.args.single(), 0)
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code += VmCodeInstruction(Opcode.PUSH, VmDataType.BYTE, reg1=0)
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return code
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}
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private fun funcPushw(call: PtBuiltinFunctionCall): VmCodeChunk {
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val code = VmCodeChunk()
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code += exprGen.translateExpression(call.args.single(), 0)
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code += VmCodeInstruction(Opcode.PUSH, VmDataType.WORD, reg1=0)
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return code
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}
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private fun funcSwap(call: PtBuiltinFunctionCall): VmCodeChunk {
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val left = call.args[0]
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val right = call.args[1]
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@ -202,6 +272,14 @@ internal class BuiltinFuncGen(private val codeGen: CodeGen, private val exprGen:
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return code
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}
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private fun funcRndw(resultRegister: Int): VmCodeChunk {
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val code = VmCodeChunk()
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code += VmCodeInstruction(Opcode.SYSCALL, value= Syscall.RNDW.ordinal)
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if(resultRegister!=0)
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code += VmCodeInstruction(Opcode.LOADR, VmDataType.WORD, reg1=resultRegister, reg2=0)
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return code
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}
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private fun funcMemory(call: PtBuiltinFunctionCall, resultRegister: Int): VmCodeChunk {
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val name = (call.args[0] as PtString).value
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val size = (call.args[1] as PtNumber).number.toUInt()
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@ -7,11 +7,14 @@
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main {
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sub start() {
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pokew($1000, $ea31)
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poke($1001, $44)
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txt.print_uwhex(peekw($1000), true)
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word zz = 0
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txt.print_b(sgn(zz))
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txt.nl()
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txt.print_ubhex(peek($1001), true)
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zz = -100
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txt.print_b(sgn(zz))
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txt.nl()
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zz = 9999
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txt.print_b(sgn(zz))
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txt.nl()
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; uword other = $fe4a
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@ -6,7 +6,7 @@ Virtual machine:
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65536 virtual registers, 16 bits wide, can also be used as 8 bits. r0-r65535
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65536 bytes of memory. Thus memory pointers (addresses) are limited to 16 bits.
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Value stack, max 128 entries.
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Value stack, max 128 entries of 1 byte each.
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Status registers: Carry.
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@ -107,6 +107,8 @@ sub reg1, reg2, reg3 - reg1 = reg2-reg3 (unsigned + signe
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mul reg1, reg2, reg3 - unsigned multiply reg1=reg2*reg3 note: byte*byte->byte, no type extension to word!
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div reg1, reg2, reg3 - unsigned division reg1=reg2/reg3 note: division by zero yields max signed int $ff/$ffff
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mod reg1, reg2, reg3 - remainder (modulo) of unsigned division reg1=reg2%reg3 note: division by zero yields max signed int $ff/$ffff
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sqrt reg1, reg2 - reg1 is the square root of reg2 (for .w and .b both , the result is a byte)
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sgn reg1, reg2 - reg1 is the sign of reg2 (0, 1 or -1)
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NOTE: because mul/div are constrained (truncated) to remain in 8 or 16 bits, there is NO NEED for separate signed/unsigned mul and div instructions. The result is identical.
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@ -203,6 +205,8 @@ enum class Opcode {
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MUL,
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DIV,
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MOD,
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SQRT,
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SGN,
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EXT,
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EXTS,
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@ -227,8 +231,6 @@ enum class Opcode {
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MSIG,
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SWAPREG,
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CONCAT,
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COPY,
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COPYZ,
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BREAKPOINT
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}
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@ -372,6 +374,8 @@ val instructionFormats = mutableMapOf(
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Opcode.MUL to InstructionFormat(BW, true, true, true, false),
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Opcode.DIV to InstructionFormat(BW, true, true, true, false),
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Opcode.MOD to InstructionFormat(BW, true, true, true, false),
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Opcode.SQRT to InstructionFormat(BW, true, true, false, false),
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Opcode.SGN to InstructionFormat(BW, true, true, false, false),
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Opcode.EXT to InstructionFormat(BW, true, false, false, false),
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Opcode.EXTS to InstructionFormat(BW, true, false, false, false),
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@ -389,8 +393,6 @@ val instructionFormats = mutableMapOf(
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Opcode.ROL to InstructionFormat(BW, true, false, false, false),
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Opcode.ROXL to InstructionFormat(BW, true, false, false, false),
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Opcode.COPY to InstructionFormat(NN, true, true, false, true ),
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Opcode.COPYZ to InstructionFormat(NN, true, true, false, false),
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Opcode.MSIG to InstructionFormat(BW, true, true, false, false),
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Opcode.PUSH to InstructionFormat(BW, true, false, false, false),
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Opcode.POP to InstructionFormat(BW, true, false, false, false),
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@ -18,16 +18,17 @@ SYSCALLS:
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9 = gfx_clear ; clear graphics window with shade in r0.b
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10 = gfx_plot ; plot pixel in graphics window, r0.w/r1.w contain X and Y coordinates, r2.b contains brightness
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11 = rnd ; random BYTE
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12 = wait ; wait certain amount of jiffies (1/60 sec)
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13 = waitvsync ; wait on vsync
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14 = sin8u
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15 = cos8u
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16 = sort_ubyte array
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17 = sort_byte array
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18 = sort_uword array
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19 = sort_word array
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20 = reverse_bytes array
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21 = reverse_words array
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12 = rndw ; random WORD
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13 = wait ; wait certain amount of jiffies (1/60 sec)
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14 = waitvsync ; wait on vsync
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15 = sin8u
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16 = cos8u
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17 = sort_ubyte array
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18 = sort_byte array
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19 = sort_uword array
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20 = sort_word array
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21 = reverse_bytes array
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22 = reverse_words array
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*/
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enum class Syscall {
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@ -43,6 +44,7 @@ enum class Syscall {
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GFX_CLEAR,
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GFX_PLOT,
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RND,
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RNDW,
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WAIT,
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WAITVSYNC,
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SIN8U,
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@ -100,7 +102,10 @@ object SysCalls {
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Syscall.GFX_CLEAR -> vm.gfx_clear()
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Syscall.GFX_PLOT -> vm.gfx_plot()
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Syscall.RND -> {
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vm.registers.setUB(0, (Random.nextInt() ushr 3).toUByte())
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vm.registers.setUB(0, Random.nextInt().toUByte())
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}
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Syscall.RNDW -> {
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vm.registers.setUW(0, Random.nextInt().toUShort())
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}
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Syscall.WAIT -> {
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val millis = vm.registers.getUW(0).toLong() * 1000/60
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@ -4,6 +4,8 @@ import prog8.code.target.virtual.IVirtualMachineRunner
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import java.awt.Toolkit
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import java.util.*
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import kotlin.math.roundToInt
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import kotlin.math.sign
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import kotlin.math.sqrt
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class ProgramExitException(val status: Int): Exception()
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@ -17,7 +19,7 @@ class VirtualMachine(val memory: Memory, program: List<Instruction>) {
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val registers = Registers()
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val program: Array<Instruction> = program.toTypedArray()
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val callStack = Stack<Int>()
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val valueStack = Stack<Int>() // max 128 entries
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val valueStack = Stack<UByte>() // max 128 entries
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var pc = 0
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var stepCount = 0
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var statusCarry = false
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@ -135,6 +137,8 @@ class VirtualMachine(val memory: Memory, program: List<Instruction>) {
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Opcode.MUL -> InsMUL(ins)
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Opcode.DIV -> InsDIV(ins)
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Opcode.MOD -> InsMOD(ins)
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Opcode.SQRT -> InsSQRT(ins)
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Opcode.SGN -> InsSGN(ins)
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Opcode.EXT -> InsEXT(ins)
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Opcode.EXTS -> InsEXTS(ins)
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Opcode.AND -> InsAND(ins)
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@ -154,8 +158,6 @@ class VirtualMachine(val memory: Memory, program: List<Instruction>) {
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Opcode.CONCAT -> InsCONCAT(ins)
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Opcode.PUSH -> InsPUSH(ins)
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Opcode.POP -> InsPOP(ins)
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Opcode.COPY -> InsCOPY(ins)
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Opcode.COPYZ -> InsCOPYZ(ins)
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Opcode.BREAKPOINT -> InsBREAKPOINT()
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else -> throw IllegalArgumentException("invalid opcode ${ins.opcode}")
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}
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@ -172,17 +174,32 @@ class VirtualMachine(val memory: Memory, program: List<Instruction>) {
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if(valueStack.size>=128)
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throw StackOverflowError("valuestack limit 128 exceeded")
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val value = when(i.type!!) {
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VmDataType.BYTE -> registers.getUB(i.reg1!!).toInt()
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VmDataType.WORD -> registers.getUW(i.reg1!!).toInt()
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when(i.type!!) {
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VmDataType.BYTE -> {
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val value = registers.getUB(i.reg1!!)
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valueStack.push(value)
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}
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VmDataType.WORD -> {
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val value = registers.getUW(i.reg1!!)
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valueStack.push((value and 255u).toUByte())
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valueStack.push((value.toInt() ushr 8).toUByte())
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}
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}
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valueStack.push(value)
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pc++
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}
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private fun InsPOP(i: Instruction) {
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val value = valueStack.pop()
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setResultReg(i.reg1!!, value, i.type!!)
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val value = when(i.type!!) {
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VmDataType.BYTE -> {
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valueStack.pop().toInt()
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}
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VmDataType.WORD -> {
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val msb = valueStack.pop()
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val lsb = valueStack.pop()
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(msb.toInt() shl 8) + lsb.toInt()
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}
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}
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setResultReg(i.reg1!!, value, i.type)
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pc++
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}
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@ -597,6 +614,22 @@ class VirtualMachine(val memory: Memory, program: List<Instruction>) {
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pc++
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}
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private fun InsSQRT(i: Instruction) {
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when(i.type!!) {
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VmDataType.BYTE -> registers.setUB(i.reg1!!, sqrt(registers.getUB(i.reg2!!).toDouble()).toInt().toUByte())
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VmDataType.WORD -> registers.setUB(i.reg1!!, sqrt(registers.getUW(i.reg2!!).toDouble()).toInt().toUByte())
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}
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pc++
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}
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private fun InsSGN(i: Instruction) {
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when(i.type!!) {
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VmDataType.BYTE -> registers.setSB(i.reg1!!, registers.getSB(i.reg2!!).toInt().sign.toByte())
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VmDataType.WORD -> registers.setSW(i.reg1!!, registers.getSW(i.reg2!!).toInt().sign.toShort())
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}
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pc++
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}
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private fun arithByte(operator: String, reg1: Int, reg2: Int, reg3: Int?, value: UByte?) {
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val left = registers.getUB(reg2)
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val right = value ?: registers.getUB(reg3!!)
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@ -851,35 +884,6 @@ class VirtualMachine(val memory: Memory, program: List<Instruction>) {
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pc++
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}
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private fun InsCOPY(i: Instruction) = doCopy(i.reg1!!, i.reg2!!, i.reg3!!, false)
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private fun InsCOPYZ(i: Instruction) = doCopy(i.reg1!!, i.reg2!!, null, true)
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private fun doCopy(reg1: Int, reg2: Int, length: Int?, untilzero: Boolean) {
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var from = registers.getUW(reg1).toInt()
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var to = registers.getUW(reg2).toInt()
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if(untilzero) {
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while(true) {
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val char = memory.getUB(from)
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memory.setUB(to, char)
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if(char.toInt()==0)
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break
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from++
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to++
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}
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} else {
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var len = length!!
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while(len>0) {
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val char = memory.getUB(from)
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memory.setUB(to, char)
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from++
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to++
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len--
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}
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}
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pc++
|
||||
}
|
||||
|
||||
private fun getBranchOperands(i: Instruction): Pair<Int, Int> {
|
||||
return when(i.type) {
|
||||
VmDataType.BYTE -> Pair(registers.getSB(i.reg1!!).toInt(), registers.getSB(i.reg2!!).toInt())
|
||||
@ -957,7 +961,7 @@ class VirtualMachine(val memory: Memory, program: List<Instruction>) {
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
// probably called via reflection
|
||||
class VmRunner(): IVirtualMachineRunner {
|
||||
override fun runProgram(source: String, throttle: Boolean) {
|
||||
val (memsrc, programsrc) = source.split("------PROGRAM------".toRegex(), 2)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user