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fix non-existing instructions txy/tyx, oops
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@ -381,15 +381,9 @@ private fun optimizeStoreLoadSame(
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} else if(first=="phx" && second=="pla") {
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mods.add(Modification(lines[1].index, true, null))
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mods.add(Modification(lines[2].index, false, " txa"))
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} else if(first=="phx" && second=="ply") {
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mods.add(Modification(lines[1].index, true, null))
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mods.add(Modification(lines[2].index, false, " txy"))
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} else if(first=="phy" && second=="pla") {
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mods.add(Modification(lines[1].index, true, null))
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mods.add(Modification(lines[2].index, false, " tya"))
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} else if(first=="phy" && second=="plx") {
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mods.add(Modification(lines[1].index, true, null))
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mods.add(Modification(lines[2].index, false, " tyx"))
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}
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}
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return mods
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@ -3040,7 +3040,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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CpuRegister.X -> when(target.register!!) {
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RegisterOrPair.A -> { asmgen.out(" txa") }
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RegisterOrPair.X -> { }
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RegisterOrPair.Y -> { asmgen.out(" txy") }
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RegisterOrPair.Y -> { asmgen.out(" stx P8ZP_SCRATCH_REG | ldy P8ZP_SCRATCH_REG") }
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RegisterOrPair.AY -> {
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require(extendWord)
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if(signed)
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@ -3090,7 +3090,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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}
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CpuRegister.Y -> when(target.register!!) {
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RegisterOrPair.A -> { asmgen.out(" tya") }
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RegisterOrPair.X -> { asmgen.out(" tyx") }
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RegisterOrPair.X -> { asmgen.out(" sty P8ZP_SCRATCH_REG | ldx P8ZP_SCRATCH_REG") }
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RegisterOrPair.Y -> { }
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RegisterOrPair.AY -> {
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require(extendWord)
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@ -2,7 +2,6 @@
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TODO
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====
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- fix "txy" and "tyx" non-existing instructions (assembler/experiment/* causes them to be used)
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- fix a1%a2 being parsed as directive
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- fix bitshift.p8
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- add crc8 and crc16 and crc32 to math
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