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making zeropage more configurable for future different machine targets

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This commit is contained in:
Irmen de Jong 2020-08-25 18:10:06 +02:00
parent 032d20ff37
commit 5da9379c37
4 changed files with 24 additions and 4 deletions
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4
compiler/src/prog8/compiler/Main.kt
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@ -189,16 +189,16 @@ private fun postprocessAst(programAst: Program, errors: ErrorReporter, compilerO
private fun writeAssembly(programAst: Program, errors: ErrorReporter, outputDir: Path,
optimize: Boolean, compilerOptions: CompilationOptions): String {
// asm generation directly from the Ast,
val zeropage = CompilationTarget.machine.getZeropage(compilerOptions)
programAst.processAstBeforeAsmGeneration(errors)
errors.handle()
// printAst(programAst)
CompilationTarget.machine.initializeZeropage(compilerOptions)
val assembly = CompilationTarget.asmGenerator(
programAst,
errors,
zeropage,
CompilationTarget.machine.zeropage,
compilerOptions,
outputDir).compileToAssembly(optimize)
assembly.assemble(compilerOptions)

7
compiler/src/prog8/compiler/Zeropage.kt
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@ -8,6 +8,13 @@ class ZeropageDepletedError(message: String) : Exception(message)
abstract class Zeropage(protected val options: CompilationOptions) {
abstract val SCRATCH_B1 : Int // temp storage for a single byte
abstract val SCRATCH_REG : Int // temp storage for a register
abstract val SCRATCH_REG_X : Int // temp storage for register X (the evaluation stack pointer)
abstract val SCRATCH_W1 : Int // temp storage 1 for a word $fb+$fc
abstract val SCRATCH_W2 : Int // temp storage 2 for a word $fb+$fc
private val allocations = mutableMapOf<Int, Pair<String, DataType>>()
val free = mutableListOf<Int>() // subclasses must set this to the appropriate free locations.

3
compiler/src/prog8/compiler/target/IMachineDefinition.kt
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@ -11,6 +11,7 @@ interface IMachineDefinition {
val POINTER_MEM_SIZE: Int
val opcodeNames: Set<String>
var zeropage: Zeropage
fun getZeropage(compilerOptions: CompilationOptions): Zeropage
fun initializeZeropage(compilerOptions: CompilationOptions)
}

14
compiler/src/prog8/compiler/target/c64/C64MachineDefinition.kt
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@ -29,7 +29,11 @@ object C64MachineDefinition: IMachineDefinition {
const val ESTACK_HI_PLUS1_HEX = "\$cf01"
const val ESTACK_HI_PLUS2_HEX = "\$cf02"
override fun getZeropage(compilerOptions: CompilationOptions) = C64Zeropage(compilerOptions)
override lateinit var zeropage: Zeropage
override fun initializeZeropage(compilerOptions: CompilationOptions) {
zeropage = C64Zeropage(compilerOptions)
}
// 6502 opcodes (including aliases and illegal opcodes), these cannot be used as variable or label names
override val opcodeNames = setOf("adc", "ahx", "alr", "anc", "and", "ane", "arr", "asl", "asr", "axs", "bcc", "bcs",
@ -46,6 +50,7 @@ object C64MachineDefinition: IMachineDefinition {
class C64Zeropage(options: CompilationOptions) : Zeropage(options) {
companion object {
// TODO get rid of these static constants, use the properties from the Zeropage base class instead
const val SCRATCH_B1 = 0x02
const val SCRATCH_REG = 0x03 // temp storage for a register
const val SCRATCH_REG_X = 0xfa // temp storage for register X (the evaluation stack pointer)
@ -53,6 +58,13 @@ object C64MachineDefinition: IMachineDefinition {
const val SCRATCH_W2 = 0xfd // $fd+$fe
}
override val SCRATCH_B1 = 0x02 // temp storage for a single byte
override val SCRATCH_REG = 0x03 // temp storage for a register
override val SCRATCH_REG_X = 0xfa // temp storage for register X (the evaluation stack pointer)
override val SCRATCH_W1 = 0xfb // temp storage 1 for a word $fb+$fc
override val SCRATCH_W2 = 0xfd // temp storage 2 for a word $fb+$fc
override val exitProgramStrategy: ExitProgramStrategy = when (options.zeropage) {
ZeropageType.BASICSAFE, ZeropageType.DONTUSE -> ExitProgramStrategy.CLEAN_EXIT
ZeropageType.FLOATSAFE, ZeropageType.KERNALSAFE, ZeropageType.FULL -> ExitProgramStrategy.SYSTEM_RESET