IR: mem mapped vars and memory slabs

codeGenVirtual/src/prog8/codegen/virtual/AssemblyProgram.kt

@@ -48,12 +48,7 @@ class AssemblyProgram(override val name: String, private val allocations: Variab
             is VmCodeLabel -> write("_" + line.name.joinToString(".") + ":\n")
             is VmCodeInlineAsm -> {
                 // TODO do we have to replace variable names by their allocated address???
-                val asm = line.assembly
-//                val asm = line.assembly.replace("""&[a-zA-Z\d_\.]+""".toRegex()) { matchResult ->
-//                    // need to replace &X by address of X.  TODO: this actually needs to be done by the vm assembler/loader. Then this can be omitted
-//                    val name = matchResult.value.substring(1, matchResult.value.length).split('.')
-//                    allocations.get(name).toString() }
-                write(asm+"\n")
+                write(line.assembly+"\n")
             }
             is VmCodeInlineBinary -> {
                 write("incbin \"${line.file}\"")