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fix compilation of large bitshifts

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This commit is contained in:
Irmen de Jong 2023-07-22 23:08:22 +02:00
parent 0adce9b9c6
commit 70ed2b4203
2 changed files with 43 additions and 3 deletions
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5
codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt
View File

@ -590,7 +590,6 @@ internal class AssignmentAsmGen(private val program: PtProgram,
assignExpressionToRegister(expr.left, RegisterOrPair.A, signed)
when (shifts) {
in 0..7 -> {
require(dt==DataType.UBYTE)
if (expr.operator == "<<") {
repeat(shifts) {
asmgen.out(" asl a")
@ -609,7 +608,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
}
else -> {
if(signed && expr.operator==">>") {
TODO("signed byte >> overshift should have been compiled away?")
asmgen.out(" ldy #$shifts | jsr math.lsr_byte_A")
} else {
asmgen.out(" lda #0")
}
@ -660,7 +659,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
}
else -> {
if(signed && expr.operator==">>") {
TODO("signed word >> overshift should have been compiled away?")
asmgen.out(" ldx #$shifts | jsr math.lsr_word_AY")
} else {
asmgen.out(" lda #0 | ldy #0")
}

41
codeOptimizers/src/prog8/optimizer/ConstantFoldingOptimizer.kt
View File

@ -235,6 +235,47 @@ class ConstantFoldingOptimizer(private val program: Program) : AstWalker() {
}
}
if(rightconst!=null && (expr.operator=="<<" || expr.operator==">>")) {
val dt = expr.left.inferType(program)
if(dt.isBytes && rightconst.number>=8) {
if(dt.istype(DataType.UBYTE)) {
val zeroUB = NumericLiteral(DataType.UBYTE, 0.0, expr.position)
modifications.add(IAstModification.ReplaceNode(expr, zeroUB, parent))
} else {
if(leftconst!=null) {
val zeroB = NumericLiteral(DataType.BYTE, 0.0, expr.position)
val minusoneB = NumericLiteral(DataType.BYTE, -1.0, expr.position)
if(leftconst.number<0.0) {
if(expr.operator=="<<")
modifications.add(IAstModification.ReplaceNode(expr, zeroB, parent))
else
modifications.add(IAstModification.ReplaceNode(expr, minusoneB, parent))
} else {
modifications.add(IAstModification.ReplaceNode(expr, zeroB, parent))
}
}
}
}
else if(dt.isWords && rightconst.number>=16) {
if(dt.istype(DataType.UWORD)) {
val zeroUW = NumericLiteral(DataType.UWORD, 0.0, expr.position)
modifications.add(IAstModification.ReplaceNode(expr, zeroUW, parent))
} else {
if(leftconst!=null) {
val zeroW = NumericLiteral(DataType.WORD, 0.0, expr.position)
val minusoneW = NumericLiteral(DataType.WORD, -1.0, expr.position)
if(leftconst.number<0.0) {
if(expr.operator=="<<")
modifications.add(IAstModification.ReplaceNode(expr, zeroW, parent))
else
modifications.add(IAstModification.ReplaceNode(expr, minusoneW, parent))
} else {
modifications.add(IAstModification.ReplaceNode(expr, zeroW, parent))
}
}
}
}
}
return modifications
}