added a few more simple special codegen segements for the logic operators on a memmory-read

This commit is contained in:
Irmen de Jong 2021-04-29 19:38:42 +02:00
parent 5ee36c897d
commit 71fec4c555
3 changed files with 62 additions and 25 deletions

View File

@ -110,7 +110,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
val ident = value as? IdentifierReference
val memread = value as? DirectMemoryRead
when(target.kind) {
when (target.kind) {
TargetStorageKind.VARIABLE -> {
when (target.datatype) {
in ByteDatatypes -> {
@ -204,7 +204,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
when {
indexNum!=null -> {
val targetVarName = "${target.asmVarname} + ${indexNum.number.toInt()*program.memsizer.memorySize(target.datatype)}"
when(target.datatype) {
when (target.datatype) {
in ByteDatatypes -> {
when {
valueLv != null -> inplaceModification_byte_litval_to_variable(targetVarName, target.datatype, operator, valueLv.toInt())
@ -244,7 +244,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
}
}
indexVar!=null -> {
when(target.datatype) {
when (target.datatype) {
in ByteDatatypes -> {
val tgt = AsmAssignTarget.fromRegisters(RegisterOrPair.A, null, program, asmgen)
val assign = AsmAssignment(target.origAssign.source, tgt, false, program.memsizer, value.position)
@ -672,7 +672,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
}
private fun inplaceModification_byte_memread_to_variable(name: String, dt: DataType, operator: String, memread: DirectMemoryRead) {
when(operator) {
when (operator) {
"+" -> {
exprAsmGen.translateDirectMemReadExpression(memread, false)
asmgen.out("""
@ -689,6 +689,18 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
sbc P8ZP_SCRATCH_B1
sta $name""")
}
"|", "or" -> {
exprAsmGen.translateDirectMemReadExpression(memread, false)
asmgen.out(" ora $name | sta $name")
}
"&", "and" -> {
exprAsmGen.translateDirectMemReadExpression(memread, false)
asmgen.out(" and $name | sta $name")
}
"^", "xor" -> {
exprAsmGen.translateDirectMemReadExpression(memread, false)
asmgen.out(" eor $name | sta $name")
}
// TODO: tuned code for more operators
else -> {
inplaceModification_byte_value_to_variable(name, dt, operator, memread)
@ -697,7 +709,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
}
private fun inplaceModification_word_memread_to_variable(name: String, dt: DataType, operator: String, memread: DirectMemoryRead) {
when(operator) {
when (operator) {
"+" -> {
exprAsmGen.translateDirectMemReadExpression(memread, false)
asmgen.out("""
@ -720,6 +732,24 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
dec $name+1
+""")
}
"|", "or" -> {
exprAsmGen.translateDirectMemReadExpression(memread, false)
asmgen.out(" ora $name | sta $name")
}
"&", "and" -> {
exprAsmGen.translateDirectMemReadExpression(memread, false)
asmgen.out(" and $name | sta $name")
if(dt in WordDatatypes) {
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz $name+1")
else
asmgen.out(" lda #0 | sta $name+1")
}
}
"^", "xor" -> {
exprAsmGen.translateDirectMemReadExpression(memread, false)
asmgen.out(" eor $name | sta $name")
}
// TODO: tuned code for more operators
else -> {
inplaceModification_word_value_to_variable(name, dt, operator, memread)
@ -1274,7 +1304,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
""")
}
when(valueDt) {
when (valueDt) {
in ByteDatatypes -> {
// the other variable is a BYTE type so optimize for that
when (operator) {
@ -1671,7 +1701,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
DataType.UWORD, DataType.WORD -> {
when (outerCastDt) {
DataType.UBYTE, DataType.BYTE -> {
when(target.kind) {
when (target.kind) {
TargetStorageKind.VARIABLE -> {
if(asmgen.isTargetCpu(CpuType.CPU65c02))
asmgen.out(" stz ${target.asmVarname}+1")
@ -1715,7 +1745,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
private fun inplaceBooleanNot(target: AsmAssignTarget, dt: DataType) {
when (dt) {
DataType.UBYTE -> {
when(target.kind) {
when (target.kind) {
TargetStorageKind.VARIABLE -> {
asmgen.out("""
lda ${target.asmVarname}
@ -1765,7 +1795,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
}
}
DataType.UWORD -> {
when(target.kind) {
when (target.kind) {
TargetStorageKind.VARIABLE -> {
asmgen.out("""
lda ${target.asmVarname}
@ -1790,7 +1820,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
private fun inplaceInvert(target: AsmAssignTarget, dt: DataType) {
when (dt) {
DataType.UBYTE -> {
when(target.kind) {
when (target.kind) {
TargetStorageKind.VARIABLE -> {
asmgen.out("""
lda ${target.asmVarname}
@ -1831,7 +1861,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
}
}
DataType.UWORD -> {
when(target.kind) {
when (target.kind) {
TargetStorageKind.VARIABLE -> {
asmgen.out("""
lda ${target.asmVarname}
@ -1869,7 +1899,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
}
}
DataType.WORD -> {
when(target.kind) {
when (target.kind) {
TargetStorageKind.VARIABLE -> {
asmgen.out("""
lda #0
@ -1887,7 +1917,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
}
}
DataType.FLOAT -> {
when(target.kind) {
when (target.kind) {
TargetStorageKind.VARIABLE -> {
// simply flip the sign bit in the float
asmgen.out("""

View File

@ -2,6 +2,8 @@
TODO
====
- test all examples before release of the new version
- simplify cx16.joystick_get2() once this cx16 rom issue is resolved: https://github.com/commanderx16/x16-rom/issues/203
- c64: make the graphics.BITMAP_ADDRESS configurable (VIC banking)
- get rid of all other TODO's in the code ;-)

View File

@ -3,18 +3,23 @@ main {
sub start() {
repeat {
ubyte xx
ubyte yy=xx
ubyte aa
ubyte bb
ubyte cc
ubyte dd
}
ubyte xx
repeat {
xx=1
yy=xx
}
xx |= 44
xx &= 44
xx ^= 44
xx |= @($d020)
xx &= @($d020)
xx ^= @($d020)
uword ww
ww |= $4433
ww &= $4433
ww ^= $4433
ww |= @($d020)
ww &= @($d020)
ww ^= @($d020)
}
}