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https://github.com/irmen/prog8.git
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some optimizations
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39a8b76534
commit
72d58d5856
@ -31,6 +31,7 @@
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float[len(zcoor)] rotatedz
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sub start() {
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set_irqvec()
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while true {
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if irq.time_changed {
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irq.time_changed = 0
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@ -420,8 +420,8 @@ interface INameScope {
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namespace.allLabelsAndVariables().forEach {
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println(" ".repeat(4 * (1 + indent)) + "${it.key} -> ${it.value::class.simpleName} at ${it.value.position}")
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}
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namespace.statements.filter { it is INameScope }.forEach {
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printNames(indent+1, it as INameScope)
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namespace.statements.filterIsInstance<INameScope>().forEach {
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printNames(indent+1, it)
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}
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}
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printNames(0, this)
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@ -61,7 +61,7 @@ class AstChecker(private val namespace: INameScope,
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override fun process(module: Module) {
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super.process(module)
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val directives = module.statements.asSequence().filter { it is Directive }.groupBy { (it as Directive).directive }
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val directives = module.statements.filterIsInstance<Directive>().groupBy { it.directive }
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directives.filter { it.value.size > 1 }.forEach{ entry ->
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when(entry.key) {
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"%output", "%launcher", "%zeropage", "%address" ->
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@ -28,7 +28,7 @@ class StatementReorderer(private val namespace: INameScope, private val heap: He
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module.statements.remove(mainBlock)
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module.statements.add(0, mainBlock)
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}
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val varDecls = module.statements.filter { it is VarDecl }
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val varDecls = module.statements.filterIsInstance<VarDecl>()
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module.statements.removeAll(varDecls)
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module.statements.addAll(0, varDecls)
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val directives = module.statements.filter {it is Directive && it.directive in directivesToMove}
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@ -44,7 +44,7 @@ class StatementReorderer(private val namespace: INameScope, private val heap: He
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}
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override fun process(block: Block): IStatement {
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val subroutines = block.statements.asSequence().filter { it is Subroutine }.map { it as Subroutine }.toList()
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val subroutines = block.statements.filterIsInstance<Subroutine>()
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var numSubroutinesAtEnd = 0
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// move all subroutines to the end of the block
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for (subroutine in subroutines) {
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@ -91,7 +91,7 @@ class StatementReorderer(private val namespace: INameScope, private val heap: He
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override fun process(subroutine: Subroutine): IStatement {
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super.process(subroutine)
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val varDecls = subroutine.statements.filter { it is VarDecl }
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val varDecls = subroutine.statements.filterIsInstance<VarDecl>()
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subroutine.statements.removeAll(varDecls)
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subroutine.statements.addAll(0, varDecls)
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val directives = subroutine.statements.filter {it is Directive && it.directive in directivesToMove}
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@ -160,7 +160,7 @@ private class StatementTranslator(private val prog: IntermediateProgram,
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}
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private fun processVariables(scope: INameScope) {
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for(variable in scope.statements.asSequence().filter {it is VarDecl }.map { it as VarDecl })
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for(variable in scope.statements.filterIsInstance<VarDecl>())
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prog.variable(variable.scopedname, variable)
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for(subscope in scope.subScopes())
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processVariables(subscope.value)
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@ -94,4 +94,9 @@ class Memory {
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fun clear() {
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for(i in 0..65535) mem[i]=0
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}
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}
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fun copy(from: Int, to: Int, numbytes: Int) {
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for(i in 0 until numbytes)
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mem[to+i] = mem[from+i]
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}
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}
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@ -126,6 +126,7 @@ class StackVm(private var traceOutputFile: String?) {
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var callstack = MyStack<Instruction>()
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private set
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private var program = listOf<Instruction>()
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private var labels = emptyMap<String, Instruction>()
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private var heap = HeapValues()
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private var traceOutput = if(traceOutputFile!=null) PrintStream(File(traceOutputFile), "utf-8") else null
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private var canvas: BitmapScreenPanel? = null
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@ -136,8 +137,10 @@ class StackVm(private var traceOutputFile: String?) {
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var sourceLine: String = ""
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private set
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fun load(program: Program, canvas: BitmapScreenPanel?) {
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this.program = program.program
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this.labels = program.labels
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this.heap = program.heap
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this.canvas = canvas
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canvas?.requestFocusInWindow()
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@ -158,7 +161,7 @@ class StackVm(private var traceOutputFile: String?) {
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P_irqd = false
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sourceLine = ""
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currentIns = this.program[0]
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irqStartInstruction = program.labels["irq.irq"]
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irqStartInstruction = null
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}
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fun step(instructionCount: Int = 5000) {
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@ -1613,9 +1616,18 @@ class StackVm(private var traceOutputFile: String?) {
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val value = heap.get(iterable.heapId)
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evalstack.push(Value(DataType.UBYTE, if (value.array!!.all { v -> v != 0 }) 1 else 0))
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}
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Syscall.FUNC_SET_IRQVEC, Syscall.FUNC_SET_IRQVEC_EXCL -> TODO()
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Syscall.FUNC_RESTORE_IRQVEC -> TODO()
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Syscall.FUNC_MEMCOPY -> TODO()
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Syscall.FUNC_SET_IRQVEC, Syscall.FUNC_SET_IRQVEC_EXCL -> {
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irqStartInstruction = labels["irq.irq"]
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}
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Syscall.FUNC_RESTORE_IRQVEC -> {
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irqStartInstruction = null
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}
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Syscall.FUNC_MEMCOPY -> {
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val numbytes = evalstack.pop().integerValue()
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val to = evalstack.pop().integerValue()
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val from = evalstack.pop().integerValue()
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mem.copy(from, to, numbytes)
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}
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}
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}
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