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rts-check for non-inlined subroutines + var init adjustment when noreinit, moved out of codegen
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312949f336
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77de99b383
@ -255,6 +255,11 @@ class AsmGen6502(internal val program: Program,
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}
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}
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private fun block2asm(block: Block) {
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private fun block2asm(block: Block) {
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// no longer output the initialization assignments as regular statements in the block,
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// they will be part of the prog8_init_vars init routine generated below.
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val initializers = blockVariableInitializers.getValue(block)
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val statements = block.statements.filterNot { it in initializers }
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out("\n\n; ---- block: '${block.name}' ----")
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out("\n\n; ---- block: '${block.name}' ----")
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if(block.address!=null)
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if(block.address!=null)
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out("* = ${block.address!!.toHex()}")
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out("* = ${block.address!!.toHex()}")
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@ -267,36 +272,25 @@ class AsmGen6502(internal val program: Program,
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out("${block.name}\t" + (if("force_output" in block.options()) ".block\n" else ".proc\n"))
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out("${block.name}\t" + (if("force_output" in block.options()) ".block\n" else ".proc\n"))
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if(options.dontReinitGlobals) {
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block.statements.asSequence().filterIsInstance<VarDecl>().forEach {
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it.zeropage = ZeropageWish.NOT_IN_ZEROPAGE
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it.findInitializer(program)?.let { initializer -> it.value = initializer.value } // put the init value back into the vardecl
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}
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}
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// no longer output the initialization assignments as regular statements in the block!
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block.statements.removeAll(blockVariableInitializers.getValue(block))
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outputSourceLine(block)
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outputSourceLine(block)
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zeropagevars2asm(block.statements, block)
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zeropagevars2asm(statements, block)
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memdefs2asm(block.statements, block)
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memdefs2asm(statements, block)
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vardecls2asm(block.statements, block)
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vardecls2asm(statements, block)
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block.statements.asSequence().filterIsInstance<VarDecl>().forEach {
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statements.asSequence().filterIsInstance<VarDecl>().forEach {
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if(it.type==VarDeclType.VAR && it.datatype in NumericDatatypes)
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if(it.type==VarDeclType.VAR && it.datatype in NumericDatatypes)
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it.value=null
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it.value=null // TODO why is this done?
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}
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}
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out("\n; subroutines in this block")
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out("\n; subroutines in this block")
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// first translate regular statements, and then put the subroutines at the end.
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// first translate regular statements, and then put the subroutines at the end.
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val (subroutine, stmts) = block.statements.partition { it is Subroutine }
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val (subroutine, stmts) = statements.partition { it is Subroutine }
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stmts.forEach { translate(it) }
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stmts.forEach { translate(it) }
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subroutine.forEach { translateSubroutine(it as Subroutine) }
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subroutine.forEach { translateSubroutine(it as Subroutine) }
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if(!options.dontReinitGlobals) {
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if(!options.dontReinitGlobals) {
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// generate subroutine to initialize block-level (global) variables
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// generate subroutine to initialize block-level (global) variables
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val initializers = blockVariableInitializers.getValue(block)
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if (initializers.isNotEmpty()) {
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if (initializers.isNotEmpty()) {
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out("prog8_init_vars\t.proc\n")
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out("prog8_init_vars\t.proc\n")
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initializers.forEach { assign -> translate(assign) }
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initializers.forEach { assign -> translate(assign) }
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@ -1059,10 +1053,6 @@ class AsmGen6502(internal val program: Program,
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// (they've been inlined at the call site, remember?)
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// (they've been inlined at the call site, remember?)
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onlyVariables = true
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onlyVariables = true
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}
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}
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else if(sub.amountOfRtsInAsm()==0) {
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// make sure the NOT INLINED subroutine actually does a rts at the end
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sub.statements.add(Return(null, Position.DUMMY))
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}
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}
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}
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out("")
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out("")
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@ -49,12 +49,27 @@ internal class BeforeAsmAstChanger(val program: Program, private val options: Co
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val subs = block.statements.filterIsInstance<Subroutine>()
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val subs = block.statements.filterIsInstance<Subroutine>()
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block.statements.removeAll(subs)
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block.statements.removeAll(subs)
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block.statements.addAll(subs)
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block.statements.addAll(subs)
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// adjust global variables initialization
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if(options.dontReinitGlobals) {
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block.statements.asSequence().filterIsInstance<VarDecl>().forEach {
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if(it.type==VarDeclType.VAR) {
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it.zeropage = ZeropageWish.NOT_IN_ZEROPAGE
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it.findInitializer(program)?.let { initializer ->
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it.value = initializer.value // put the init value back into the vardecl
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}
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}
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}
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}
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return noModifications
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return noModifications
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}
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}
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override fun after(decl: VarDecl, parent: Node): Iterable<IAstModification> {
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override fun after(decl: VarDecl, parent: Node): Iterable<IAstModification> {
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if(decl.type== VarDeclType.VAR && decl.value != null && decl.datatype in NumericDatatypes)
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if(!options.dontReinitGlobals) {
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throw FatalAstException("vardecls for variables, with initial numerical value, should have been rewritten as plain vardecl + assignment $decl")
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if (decl.type == VarDeclType.VAR && decl.value != null && decl.datatype in NumericDatatypes)
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throw FatalAstException("vardecls for variables, with initial numerical value, should have been rewritten as plain vardecl + assignment $decl")
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}
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rememberSubroutineVar(decl)
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rememberSubroutineVar(decl)
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return noModifications
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return noModifications
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}
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}
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@ -116,6 +131,7 @@ internal class BeforeAsmAstChanger(val program: Program, private val options: Co
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}
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}
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override fun after(subroutine: Subroutine, parent: Node): Iterable<IAstModification> {
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override fun after(subroutine: Subroutine, parent: Node): Iterable<IAstModification> {
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val mods = mutableListOf<IAstModification>()
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val firstDeclarations = mutableMapOf<String, VarDecl>()
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val firstDeclarations = mutableMapOf<String, VarDecl>()
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val rememberedSubroutineVars = subroutineVariables.getOrDefault(subroutine, mutableListOf())
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val rememberedSubroutineVars = subroutineVariables.getOrDefault(subroutine, mutableListOf())
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for(decl in rememberedSubroutineVars) {
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for(decl in rememberedSubroutineVars) {
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@ -130,9 +146,8 @@ internal class BeforeAsmAstChanger(val program: Program, private val options: Co
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// add the implicit return statement at the end (if it's not there yet), but only if it's not a kernal routine.
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// add the implicit return statement at the end (if it's not there yet), but only if it's not a kernal routine.
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// and if an assembly block doesn't contain a rts/rti, and some other situations.
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// and if an assembly block doesn't contain a rts/rti, and some other situations.
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val mods = mutableListOf<IAstModification>()
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val returnStmt = Return(null, subroutine.position)
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val returnStmt = Return(null, subroutine.position)
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if (subroutine.asmAddress == null && !subroutine.inline) {
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if (!subroutine.isAsmSubroutine && !subroutine.inline) {
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if(subroutine.statements.isEmpty() ||
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if(subroutine.statements.isEmpty() ||
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(subroutine.amountOfRtsInAsm() == 0
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(subroutine.amountOfRtsInAsm() == 0
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&& subroutine.statements.lastOrNull { it !is VarDecl } !is Return
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&& subroutine.statements.lastOrNull { it !is VarDecl } !is Return
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@ -155,6 +170,13 @@ internal class BeforeAsmAstChanger(val program: Program, private val options: Co
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mods += IAstModification.InsertAfter(outerStatements[subroutineStmtIdx - 1], returnStmt, outerScope)
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mods += IAstModification.InsertAfter(outerStatements[subroutineStmtIdx - 1], returnStmt, outerScope)
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}
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}
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}
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}
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if (subroutine.inline && subroutine.isAsmSubroutine && subroutine.amountOfRtsInAsm() == 0) {
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// make sure the NOT INLINED asm subroutine actually has a rts at the end
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// (non-asm routines get a Return statement as needed, above)
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mods += IAstModification.InsertLast(InlineAssembly(" rts\n", Position.DUMMY), subroutine)
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}
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return mods
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return mods
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}
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}
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@ -23,14 +23,8 @@ Future Things and Ideas
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^^^^^^^^^^^^^^^^^^^^^^^
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^^^^^^^^^^^^^^^^^^^^^^^
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Ast modifications done in AsmGen, that should be done BEFORE calling asmgen (so that it doesn't have to modify the Ast any longer):
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Ast modifications done in AsmGen, that should be done BEFORE calling asmgen (so that it doesn't have to modify the Ast any longer):
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- translateSubroutine:
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- block2asm: after vardecls2asm it clears the vardecl.value of all variables (why?)
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if subroutine marked as inline but optimizations are disabled, make sure the NOT INLINED subroutine actually has a Return statement at the end
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- block2asm: removes init-assignments to no longer output the initialization assignments as regular statements (is done separately in block initialization routine)
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- block2asm:
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if(options.dontReinitGlobals) -> currently modifies the zeropage and init value of vardecl's.
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it removes init-assignments to no longer output the initialization assignments as regular statements (is done separately in block initialization routine)
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after vardecls2asm it clears the vardecl.value of all variables (why?)
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- Maybe don't rely on vardecls at all any longer but figure out the variable allocations (including ZP allocations) beforehand
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- Maybe don't rely on vardecls at all any longer but figure out the variable allocations (including ZP allocations) beforehand
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and pass that via a new datastructure to asmgen? So that asmgen is no longer tasked with doing the allocations.
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and pass that via a new datastructure to asmgen? So that asmgen is no longer tasked with doing the allocations.
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This could perhaps make it easer for the codegen as well to deal with sections, if any, in the future.
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This could perhaps make it easer for the codegen as well to deal with sections, if any, in the future.
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@ -1,9 +1,23 @@
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%import textio
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%import textio
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%zeropage basicsafe
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main {
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main {
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ubyte mainglobal1 = 10
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ubyte mainglobal2 = 20
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ubyte mainglobal3 = 30
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ubyte mainglobal4 = 40
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sub start() {
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sub start() {
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txt.print("ok")
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ubyte startval1 = 100
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ubyte startval2 = 110
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ubyte startval3 = 120
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ubyte startval4 = 130
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txt.print_ub(mainglobal1)
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txt.nl()
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txt.nl()
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sys.wait(999)
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txt.print_ub(startval1)
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txt.nl()
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startval1++
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mainglobal1++
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}
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}
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}
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}
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