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romsub @bank now also accepts a variable so the bank can be dynamic

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This commit is contained in:
Irmen de Jong
2024-11-05 23:56:58 +01:00
parent 491e5dbcfb
commit 77e376f6bf
24 changed files with 159 additions and 53 deletions
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3
codeGenCpu6502/src/prog8/codegen/cpu6502/AsmGen.kt
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@@ -48,6 +48,9 @@ class AsmGen6502(val prefixSymbols: Boolean): ICodeGeneratorBackend {
is PtAsmSub -> {
prefixNamedNode(node)
node.parameters.forEach { (_, param) -> prefixNamedNode(param) }
if(node.address?.varbank!=null) {
node.address!!.varbank = node.address!!.varbank!!.prefix(node, st)
}
}
is PtSub -> {
prefixNamedNode(node)

60
codeGenCpu6502/src/prog8/codegen/cpu6502/FunctionCallAsmGen.kt
View File

@@ -40,30 +40,78 @@ internal class FunctionCallAsmGen(private val program: PtProgram, private val as
sub.children.forEach { asmgen.translate(it as PtInlineAssembly) }
asmgen.out(" \t; inlined routine end: ${sub.name}")
} else {
val bank = sub.address?.first
if(bank==null)
asmgen.out(" jsr $subAsmName")
val bank = sub.address?.constbank?.toString()
if(bank==null) {
val varbank = if(sub.address?.varbank==null) null else asmgen.asmVariableName(sub.address!!.varbank!!)
if(varbank!=null) {
when(asmgen.options.compTarget.name) {
"cx16" -> {
// JSRFAR can jump to a banked RAM address as well!
asmgen.out("""
php
pha
lda $varbank
sta +
pla
plp
jsr cx16.JSRFAR
.word $subAsmName ; ${sub.address!!.address.toHex()}
+ .byte 0 ; modified"""
)
}
"c64" -> {
asmgen.out("""
php
pha
lda $varbank
sta +
pla
plp
jsr c64.x16jsrfar
.word $subAsmName ; ${sub.address!!.address.toHex()}
+ .byte 0 ; modified"""
)
}
"c128" -> {
asmgen.out("""
php
pha
lda $varbank
sta +
pla
plp
jsr c128.x16jsrfar
.word $subAsmName ; ${sub.address!!.address.toHex()}
+ .byte 0 ; modified"""
)
}
else -> throw AssemblyError("callfar is not supported on the selected compilation target")
}
} else {
asmgen.out(" jsr $subAsmName")
}
}
else {
when(asmgen.options.compTarget.name) {
"cx16" -> {
// JSRFAR can jump to a banked RAM address as well!
asmgen.out("""
jsr cx16.JSRFAR
.word $subAsmName ; ${sub.address!!.second.toHex()}
.word $subAsmName ; ${sub.address!!.address.toHex()}
.byte $bank"""
)
}
"c64" -> {
asmgen.out("""
jsr c64.x16jsrfar
.word $subAsmName ; ${sub.address!!.second.toHex()}
.word $subAsmName ; ${sub.address!!.address.toHex()}
.byte $bank"""
)
}
"c128" -> {
asmgen.out("""
jsr c128.x16jsrfar
.word $subAsmName ; ${sub.address!!.second.toHex()}
.word $subAsmName ; ${sub.address!!.address.toHex()}
.byte $bank"""
)
}

6
codeGenCpu6502/src/prog8/codegen/cpu6502/ProgramAndVarsGen.kt
View File

@@ -783,8 +783,10 @@ internal class ProgramAndVarsGen(
.forEach { asmsub ->
asmsub as PtAsmSub
val address = asmsub.address!!
val bank = if(address.first!=null) "; @bank ${address.first}" else ""
asmgen.out(" ${asmsub.name} = ${address.second.toHex()} $bank")
val bank = if(address.constbank!=null) "; @bank ${address.constbank}"
else if(address.varbank!=null) "; @bank ${address.varbank?.name}"
else ""
asmgen.out(" ${asmsub.name} = ${address.address.toHex()} $bank")
}
}