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tiny optimization of negating a register

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Irmen de Jong
2021-11-20 21:42:55 +01:00
parent adfaddbcf4
commit 7936fc5bd8
1 changed files with 3 additions and 3 deletions
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6
codeGeneration/src/prog8/compiler/target/cpu6502/codegen/assignment/AugmentableAssignmentAsmGen.kt
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@@ -2000,9 +2000,9 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
} }
TargetStorageKind.REGISTER -> { TargetStorageKind.REGISTER -> {
when(target.register!!) { when(target.register!!) {
RegisterOrPair.A -> asmgen.out(" sta P8ZP_SCRATCH_B1 | lda #0 | sec | sbc P8ZP_SCRATCH_B1") RegisterOrPair.A -> asmgen.out(" eor #255 | clc | adc #1")
RegisterOrPair.X -> asmgen.out(" stx P8ZP_SCRATCH_B1 | lda #0 | sec | sbc P8ZP_SCRATCH_B1 | tax") RegisterOrPair.X -> asmgen.out(" txa | eor #255 | tax | inx")
RegisterOrPair.Y -> asmgen.out(" sty P8ZP_SCRATCH_B1 | lda #0 | sec | sbc P8ZP_SCRATCH_B1 | tay") RegisterOrPair.Y -> asmgen.out(" tya | eor #255 | tay | iny")
else -> throw AssemblyError("invalid reg dt for byte negate") else -> throw AssemblyError("invalid reg dt for byte negate")
} }
} }