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fix faulty word[x]-- , fix invalid stz addressing modes
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38a6c6a866
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@ -105,7 +105,7 @@ internal class PostIncrDecrAsmGen(private val program: Program, private val asmg
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lda $asmArrayvarname,x
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bne +
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dec $asmArrayvarname+1,x
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+ dec $asmArrayvarname
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+ dec $asmArrayvarname,x
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""")
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}
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DataType.FLOAT -> {
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@ -1267,11 +1267,12 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
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}
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else {
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asmgen.loadScaledArrayIndexIntoRegister(wordtarget.array!!, wordtarget.datatype, CpuRegister.Y)
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asmgen.out(" lda $sourceName | sta ${wordtarget.asmVarname},y | iny")
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if(CompilationTarget.instance.machine.cpu == CpuType.CPU65c02)
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asmgen.out(" stz ${wordtarget.asmVarname},y")
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else
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asmgen.out(" lda #0 | sta ${wordtarget.asmVarname},y")
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asmgen.out("""
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lda $sourceName
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sta ${wordtarget.asmVarname},y
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iny
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lda #0
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sta ${wordtarget.asmVarname},y""")
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}
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}
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TargetStorageKind.REGISTER -> {
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@ -1680,7 +1681,7 @@ internal class AssignmentAsmGen(private val program: Program, private val asmgen
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}
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else {
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asmgen.loadScaledArrayIndexIntoRegister(target.array!!, DataType.UBYTE, CpuRegister.Y)
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asmgen.out(" stz ${target.asmVarname},y")
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asmgen.out(" lda #0 | sta ${target.asmVarname},y")
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}
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}
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TargetStorageKind.REGISTER -> when(target.register!!) {
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@ -1652,10 +1652,7 @@ internal class AugmentableAssignmentAsmGen(private val program: Program,
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}
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TargetStorageKind.ARRAY -> {
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asmgen.loadScaledArrayIndexIntoRegister(target.array!!, target.datatype, CpuRegister.Y, true)
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if(CompilationTarget.instance.machine.cpu == CpuType.CPU65c02)
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asmgen.out(" stz ${target.asmVarname},y")
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else
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asmgen.out(" lda #0 | sta ${target.asmVarname},y")
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asmgen.out(" lda #0 | sta ${target.asmVarname},y")
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}
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TargetStorageKind.STACK -> {
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if(CompilationTarget.instance.machine.cpu == CpuType.CPU65c02)
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