Apple-2-SW/prog8
1
0
Fork 0
mirror of https://github.com/irmen/prog8.git synced 2025-02-24 13:29:10 +00:00
Code Issues Projects Releases Wiki Activity

don't inc/dec a memory mapped register

Browse Source
This commit is contained in:
Irmen de Jong 2020-08-20 21:16:48 +02:00
parent 14f9382cf9
commit 88d5c68b32
2 changed files with 46 additions and 41 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
compiler/src/prog8/optimizer/StatementOptimizer.kt
View File

@ -405,8 +405,8 @@ internal class StatementOptimizer(private val program: Program,
if (cv == 0.0) { if (cv == 0.0) {
return listOf(IAstModification.Remove(assignment, parent)) return listOf(IAstModification.Remove(assignment, parent))
} else if (targetDt in IntegerDatatypes && floor(cv) == cv) { } else if (targetDt in IntegerDatatypes && floor(cv) == cv) {
if ((vardeclDt == VarDeclType.MEMORY && cv in 1.0..3.0) || (vardeclDt != VarDeclType.MEMORY && cv in 1.0..8.0)) { if (vardeclDt != VarDeclType.MEMORY && cv in 1.0..4.0) {
// replace by several INCs (a bit less when dealing with memory targets) // replace by several INCs if it's not a memory address (inc on a memory mapped register doesn't work very well)
val incs = AnonymousScope(mutableListOf(), assignment.position) val incs = AnonymousScope(mutableListOf(), assignment.position)
repeat(cv.toInt()) { repeat(cv.toInt()) {
incs.statements.add(PostIncrDecr(assignment.target, "++", assignment.position)) incs.statements.add(PostIncrDecr(assignment.target, "++", assignment.position))
@ -419,8 +419,8 @@ internal class StatementOptimizer(private val program: Program,
if (cv == 0.0) { if (cv == 0.0) {
return listOf(IAstModification.Remove(assignment, parent)) return listOf(IAstModification.Remove(assignment, parent))
} else if (targetDt in IntegerDatatypes && floor(cv) == cv) { } else if (targetDt in IntegerDatatypes && floor(cv) == cv) {
if ((vardeclDt == VarDeclType.MEMORY && cv in 1.0..3.0) || (vardeclDt != VarDeclType.MEMORY && cv in 1.0..8.0)) { if (vardeclDt != VarDeclType.MEMORY && cv in 1.0..4.0) {
// replace by several DECs (a bit less when dealing with memory targets) // replace by several DECs if it's not a memory address (dec on a memory mapped register doesn't work very well)
val decs = AnonymousScope(mutableListOf(), assignment.position) val decs = AnonymousScope(mutableListOf(), assignment.position)
repeat(cv.toInt()) { repeat(cv.toInt()) {
decs.statements.add(PostIncrDecr(assignment.target, "--", assignment.position)) decs.statements.add(PostIncrDecr(assignment.target, "--", assignment.position))

79
examples/test.p8
View File

@ -7,44 +7,49 @@ main {
sub start() { sub start() {
; byte A = 99 byte A = 99
; ubyte U = $18 ubyte U = $18
; word B = 9999 word B = 9999
; uword W = $18f0 uword W = $18f0
;
; c64scr.print_b(A)
; c64.CHROUT('\n')
; A = -A
; c64scr.print_b(A)
; c64.CHROUT('\n')
;
; U = ~U
; c64scr.print_ubhex(U, true)
; c64.CHROUT('\n')
; U = not U
; c64scr.print_ubhex(U, true)
; c64.CHROUT('\n')
; U = not U
; c64scr.print_ubhex(U, true)
; c64.CHROUT('\n')
;
; c64scr.print_w(B)
; c64.CHROUT('\n')
; B = -B
; c64scr.print_w(B)
; c64.CHROUT('\n')
;
; W = ~W
; c64scr.print_uwhex(W, true)
; c64.CHROUT('\n')
; W = not W
; c64scr.print_uwhex(W, true)
; c64.CHROUT('\n')
; W = not W
; c64scr.print_uwhex(W, true)
; c64.CHROUT('\n')
uword W = 43210 c64scr.print_b(A)
c64.CHROUT('\n')
A = -A
c64scr.print_b(A)
c64.CHROUT('\n')
U = ~U
c64scr.print_ubhex(U, true)
c64.CHROUT('\n')
U = not U
c64scr.print_ubhex(U, true)
c64.CHROUT('\n')
U = not U
c64scr.print_ubhex(U, true)
c64.CHROUT('\n')
c64scr.print_w(B)
c64.CHROUT('\n')
B = -B
c64scr.print_w(B)
c64.CHROUT('\n')
W = ~W
c64scr.print_uwhex(W, true)
c64.CHROUT('\n')
W = not W
c64scr.print_uwhex(W, true)
c64.CHROUT('\n')
W = not W
c64scr.print_uwhex(W, true)
c64.CHROUT('\n')
;@($d020) += @($d020) ; TODO fix compiler hang
W += 3
@($d020) += 3
W = 43210
W = W as ubyte W = W as ubyte
c64scr.print_uw(W) c64scr.print_uw(W)
c64.CHROUT('\n') c64.CHROUT('\n')