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codegen
This commit is contained in:
Irmen de Jong
parent
d18876ee70
commit
938c541cc2
@ -6,9 +6,9 @@ Written by Irmen de Jong (irmen@razorvine.net) - license: GNU GPL 3.0
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"""
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from typing import Callable
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from ..plyparse import Scope, Assignment, AugAssignment, Register, LiteralValue, SymbolName, VarDef
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from ..plyparse import Scope, Assignment, AugAssignment, Register, LiteralValue, SymbolName, VarDef, Dereference
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from . import CodeError, preserving_registers, to_hex, Context
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from ..datatypes import REGISTER_BYTES, VarType
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from ..datatypes import REGISTER_BYTES, VarType, DataType
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from ..compile import Zeropage
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@ -32,115 +32,188 @@ def generate_aug_assignment(ctx: Context) -> None:
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if isinstance(rvalue, LiteralValue):
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if type(rvalue.value) is int:
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if 0 <= rvalue.value <= 255:
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_generate_aug_reg_constant_int(out, lvalue, stmt.operator, rvalue.value, "", ctx.scope)
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if stmt.operator not in ("<<=", ">>=") or rvalue.value != 0:
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_generate_aug_reg_int(out, lvalue, stmt.operator, rvalue.value, "", ctx.scope)
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else:
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raise CodeError("aug. assignment value must be 0..255", rvalue)
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else:
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raise CodeError("constant integer literal or variable required for now", rvalue) # XXX
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elif isinstance(rvalue, SymbolName):
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symdef = ctx.scope.lookup(rvalue.name)
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if isinstance(symdef, VarDef) and symdef.vartype == VarType.CONST and symdef.datatype.isinteger():
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if 0 <= symdef.value.const_value() <= 255: # type: ignore
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_generate_aug_reg_constant_int(out, lvalue, stmt.operator, 0, symdef.name, ctx.scope)
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if isinstance(symdef, VarDef):
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if symdef.vartype == VarType.CONST:
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if symdef.datatype.isinteger() and 0 <= symdef.value.const_value() <= 255: # type: ignore
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_generate_aug_reg_int(out, lvalue, stmt.operator, symdef.value.const_value(), "", ctx.scope) # type: ignore
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else:
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raise CodeError("aug. assignment value must be 0..255", rvalue)
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raise CodeError("aug. assignment value must be integer 0..255", rvalue)
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elif symdef.datatype == DataType.BYTE:
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_generate_aug_reg_int(out, lvalue, stmt.operator, 0, symdef.name, ctx.scope)
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else:
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raise CodeError("constant integer literal or variable required for now", rvalue) # XXX
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raise CodeError("variable must be of type byte for now", rvalue) # XXX
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else:
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raise CodeError("can only use variable name as symbol for aug assign rvalue", rvalue)
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elif isinstance(rvalue, Register):
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# @todo check value range (single register; 0-255) @todo support combined registers
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if lvalue.datatype == DataType.BYTE and rvalue.datatype == DataType.WORD:
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raise CodeError("cannot assign a combined 16-bit register to a single 8-bit register", rvalue)
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_generate_aug_reg_reg(out, lvalue, stmt.operator, rvalue, ctx.scope)
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elif isinstance(rvalue, Dereference):
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if isinstance(rvalue.operand, (LiteralValue, SymbolName)):
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if isinstance(rvalue.operand, LiteralValue):
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what = to_hex(rvalue.operand.value)
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else:
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# @todo Register += symbolname / dereference , _generate_aug_reg_mem?
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raise CodeError("invalid rvalue for aug. assignment on register", rvalue)
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symdef = rvalue.my_scope().lookup(rvalue.operand.name)
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if isinstance(symdef, VarDef) and symdef.vartype == VarType.MEMORY:
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what = to_hex(symdef.value.value) # type: ignore
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else:
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what = rvalue.operand.name
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out("\vpha\n\vtya\n\vpha") # save A, Y on stack
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out("\vlda " + what)
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out("\vsta il65_lib.SCRATCH_ZPWORD1")
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out("\vlda {:s}+1".format(what))
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out("\vsta il65_lib.SCRATCH_ZPWORD1+1")
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out("\vldy #0")
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out("\vlda (il65_lib.SCRATCH_ZPWORD1), y")
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a_reg = Register(name="A", sourceref=stmt.sourceref) # type: ignore
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_generate_aug_reg_reg(out, lvalue, stmt.operator, a_reg, ctx.scope)
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out("\vst{:s} il65_lib.SCRATCH_ZP1".format(lvalue.name.lower()))
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out("\vpla\n\vtay\n\vpla") # restore A, Y from stack
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out("\vld{:s} il65_lib.SCRATCH_ZP1".format(lvalue.name.lower()))
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elif isinstance(rvalue.operand, Register):
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assert rvalue.operand.datatype == DataType.WORD
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if rvalue.datatype != DataType.BYTE:
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raise CodeError("aug. assignment value must be a byte, 0..255", rvalue)
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reg = rvalue.operand.name
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out("\vst{:s} il65_lib.SCRATCH_ZPWORD1".format(reg[0].lower()))
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out("\vst{:s} il65_lib.SCRATCH_ZPWORD1+1".format(reg[1].lower()))
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out("\vpha\n\vtya\n\vpha") # save A, Y on stack
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out("\vldy #0")
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out("\vlda (il65_lib.SCRATCH_ZPWORD1), y")
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a_reg = Register(name="A", sourceref=stmt.sourceref) # type: ignore
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_generate_aug_reg_reg(out, lvalue, stmt.operator, a_reg, ctx.scope)
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if lvalue.name != 'X':
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out("\vst{:s} il65_lib.SCRATCH_ZP1".format(lvalue.name.lower()))
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out("\vpla\n\vtay\n\vpla") # restore A, Y from stack
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if lvalue.name != 'X':
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out("\vld{:s} il65_lib.SCRATCH_ZP1".format(lvalue.name.lower()))
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else:
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raise CodeError("invalid dereference operand type", rvalue)
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else:
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raise CodeError("invalid rvalue type", rvalue)
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else:
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raise CodeError("aug. assignment only implemented for registers for now", stmt.sourceref) # XXX
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def _generate_aug_reg_constant_int(out: Callable, lvalue: Register, operator: str, rvalue: int, rname: str, scope: Scope) -> None:
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r_str = rname or to_hex(rvalue)
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def _generate_aug_reg_int(out: Callable, lvalue: Register, operator: str, rvalue: int, rname: str, scope: Scope) -> None:
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if rname:
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right_str = rname
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else:
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# an immediate value is provided in rvalue
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right_str = "#" + to_hex(rvalue)
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if operator == "+=":
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if lvalue.name == "A":
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out("\vclc")
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out("\vadc #" + r_str)
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out("\vadc " + right_str)
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elif lvalue.name == "X":
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with preserving_registers({'A'}, scope, out):
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out("\vtxa")
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out("\vclc")
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out("\vadc #" + r_str)
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out("\vadc " + right_str)
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out("\vtax")
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elif lvalue.name == "Y":
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with preserving_registers({'A'}, scope, out):
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out("\vtya")
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out("\vclc")
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out("\vadc #" + r_str)
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out("\vadc " + right_str)
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out("\vtay")
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else:
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raise CodeError("unsupported register for aug assign", str(lvalue)) # @todo +=.word
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elif operator == "-=":
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if lvalue.name == "A":
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out("\vsec")
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out("\vsbc #" + r_str)
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out("\vsbc " + right_str)
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elif lvalue.name == "X":
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with preserving_registers({'A'}, scope, out):
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out("\vtxa")
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out("\vsec")
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out("\vsbc #" + r_str)
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out("\vsbc " + right_str)
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out("\vtax")
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elif lvalue.name == "Y":
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with preserving_registers({'A'}, scope, out):
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out("\vtya")
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out("\vsec")
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out("\vsbc #" + r_str)
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out("\vsbc " + right_str)
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out("\vtay")
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else:
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raise CodeError("unsupported register for aug assign", str(lvalue)) # @todo -=.word
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elif operator == "&=":
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if lvalue.name == "A":
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out("\vand #" + r_str)
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out("\vand " + right_str)
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elif lvalue.name == "X":
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with preserving_registers({'A'}, scope, out):
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out("\vtxa")
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out("\vand #" + r_str)
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out("\vand " + right_str)
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out("\vtax")
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elif lvalue.name == "Y":
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with preserving_registers({'A'}, scope, out):
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out("\vtya")
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out("\vand #" + r_str)
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out("\vand " + right_str)
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out("\vtay")
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else:
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raise CodeError("unsupported register for aug assign", str(lvalue)) # @todo &=.word
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elif operator == "|=":
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if lvalue.name == "A":
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out("\vora #" + r_str)
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out("\vora " + right_str)
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elif lvalue.name == "X":
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with preserving_registers({'A'}, scope, out):
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out("\vtxa")
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out("\vora #" + r_str)
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out("\vora " + right_str)
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out("\vtax")
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elif lvalue.name == "Y":
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with preserving_registers({'A'}, scope, out):
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out("\vtya")
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out("\vora #" + r_str)
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out("\vora " + right_str)
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out("\vtay")
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else:
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raise CodeError("unsupported register for aug assign", str(lvalue)) # @todo |=.word
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elif operator == "^=":
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if lvalue.name == "A":
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out("\veor #" + r_str)
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out("\veor " + right_str)
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elif lvalue.name == "X":
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with preserving_registers({'A'}, scope, out):
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out("\vtxa")
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out("\veor #" + r_str)
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out("\veor " + right_str)
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out("\vtax")
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elif lvalue.name == "Y":
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with preserving_registers({'A'}, scope, out):
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out("\vtya")
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out("\veor #" + r_str)
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out("\veor " + right_str)
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out("\vtay")
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else:
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raise CodeError("unsupported register for aug assign", str(lvalue)) # @todo ^=.word
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elif operator == ">>=":
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if rvalue > 0:
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if rname:
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assert lvalue.name in REGISTER_BYTES, "only single registers for now" # @todo >>=.word
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if lvalue.name == "A":
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preserve_regs = {'X'}
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elif lvalue.name == "X":
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preserve_regs = {'A'}
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out("\vtxa")
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elif lvalue.name == "Y":
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preserve_regs = {'A', 'X'}
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out("\vtya")
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with preserving_registers(preserve_regs, scope, out):
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out("\vldx " + rname)
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out("\vjsr il65_lib.lsr_A_by_X")
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# out("\vbeq +")
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# out("-\vlsr a")
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# out("\vdex")
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# out("\vbne -")
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# put A back into target register
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if lvalue.name == "X":
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out("\vtax")
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if lvalue.name == "Y":
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out("\vtay")
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else:
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def shifts_A(times: int) -> None:
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if times >= 8:
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out("\vlda #0")
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@ -162,7 +235,29 @@ def _generate_aug_reg_constant_int(out: Callable, lvalue: Register, operator: st
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else:
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raise CodeError("unsupported register for aug assign", str(lvalue)) # @todo >>=.word
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elif operator == "<<=":
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if rvalue > 0:
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if rname:
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assert lvalue.name in REGISTER_BYTES, "only single registers for now" # @todo <<=.word
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if lvalue.name == "A":
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preserve_regs = {'X'}
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elif lvalue.name == "X":
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preserve_regs = {'A'}
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out("\vtxa")
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elif lvalue.name == "Y":
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preserve_regs = {'A', 'X'}
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out("\vtya")
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with preserving_registers(preserve_regs, scope, out):
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out("\vldx " + rname)
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out("\vjsr il65_lib.asl_A_by_X")
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# out("\vbeq +")
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# out("-\vasl a")
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# out("\vdex")
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# out("\vbne -")
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# put A back into target register
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if lvalue.name == "X":
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out("\vtax")
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elif lvalue.name == "Y":
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out("\vtay")
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else:
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def shifts_A(times: int) -> None:
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if times >= 8:
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out("\vlda #0")
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@ -251,8 +251,7 @@ def generate_incrdecr(ctx: Context) -> None:
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else:
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raise CodeError("can't inc/dec this by something else as 1 right now", stmt) # XXX
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elif isinstance(target.operand, Register):
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if target.operand.datatype == DataType.BYTE:
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raise CodeError("can't dereference just a single register, need combined register", target)
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assert target.operand.datatype == DataType.WORD
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reg = target.operand.name
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if stmt.howmuch == 1:
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out("\vclc" if stmt.operator == "++" else "\vsec")
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@ -265,7 +264,7 @@ def generate_incrdecr(ctx: Context) -> None:
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else:
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raise CodeError("can't inc/dec this by something else as 1 right now", stmt) # XXX
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else:
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raise TypeError("invalid dereference target type", target)
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raise TypeError("invalid dereference operand type", target)
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else:
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raise CodeError("cannot inc/decrement", target) # @todo support more
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@ -186,15 +186,15 @@ incrdecr_deref_byte_reg_XY
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incr_deref_byte
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ldy #0
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lda (c64.SCRATCH_ZPWORD1), y
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lda (SCRATCH_ZPWORD1), y
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adc #1 ; carry's cleared already
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sta (c64.SCRATCH_ZPWORD1), y
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sta (SCRATCH_ZPWORD1), y
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rts
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decr_deref_byte
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ldy #0
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lda (c64.SCRATCH_ZPWORD1), y
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lda (SCRATCH_ZPWORD1), y
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sbc #1 ; carry's set already
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sta (c64.SCRATCH_ZPWORD1), y
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sta (SCRATCH_ZPWORD1), y
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rts
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; increments/decrements a word referenced by indirect register pair by 1
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@ -216,32 +216,61 @@ incrdecr_deref_word_reg_XY
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incr_deref_word
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ldy #0
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lda (c64.SCRATCH_ZPWORD1), y
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lda (SCRATCH_ZPWORD1), y
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adc #1 ; carry's cleared already
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sta (c64.SCRATCH_ZPWORD1), y
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sta (SCRATCH_ZPWORD1), y
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bcc +
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iny
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lda (c64.SCRATCH_ZPWORD1), y
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lda (SCRATCH_ZPWORD1), y
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adc #0 ; carry is set
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sta (c64.SCRATCH_ZPWORD1), y
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sta (SCRATCH_ZPWORD1), y
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+ rts
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decr_deref_word
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ldy #0
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lda (c64.SCRATCH_ZPWORD1), y
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lda (SCRATCH_ZPWORD1), y
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bne +
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pha
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iny
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lda (c64.SCRATCH_ZPWORD1), y
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lda (SCRATCH_ZPWORD1), y
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sbc #1 ; carry's set already
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sta (c64.SCRATCH_ZPWORD1), y
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sta (SCRATCH_ZPWORD1), y
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dey
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pla
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+ sec
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sbc #1
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sta (c64.SCRATCH_ZPWORD1), y
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sta (SCRATCH_ZPWORD1), y
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rts
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; shift bits in A right by X positions
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lsr_A_by_X
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cpx #8
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bcc _shift
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lda #0 ; x >=8, result always 0
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rts
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_shift cpx #0
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beq +
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- lsr a
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dex
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bne -
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+ rts
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; shift bits in A left by X positions
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asl_A_by_X
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cpx #8
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bcc _shift
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lda #0 ; x >=8, result always 0
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rts
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_shift cpx #0
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beq +
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- asl a
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dex
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bne -
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+ rts
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}
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%noreturn
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@ -1,5 +1,6 @@
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# old deprecated code, in the process of moving this to the new emit/... modules
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class CodeGenerator:
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BREAKPOINT_COMMENT_SIGNATURE = "~~~BREAKPOINT~~~"
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BREAKPOINT_COMMENT_DETECTOR = r".(?P<address>\w+)\s+ea\s+nop\s+;\s+{:s}.*".format(BREAKPOINT_COMMENT_SIGNATURE)
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@ -429,130 +430,6 @@ class CodeGenerator:
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branch_emitter(targetstr, False, False)
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generate_result_assignments()
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def _generate_aug_reg_mem(self, lvalue: RegisterValue, operator: str, rvalue: MemMappedValue) -> None:
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r_str = rvalue.name or Parser.to_hex(rvalue.address)
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if operator == "+=":
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if lvalue.register == "A":
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self.p("\t\tclc")
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self.p("\t\tadc " + r_str)
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elif lvalue.register == "X":
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with self.preserving_registers({'A'}):
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self.p("\t\ttxa")
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self.p("\t\tclc")
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self.p("\t\tadc " + r_str)
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self.p("\t\ttax")
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elif lvalue.register == "Y":
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with self.preserving_registers({'A'}):
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self.p("\t\ttya")
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self.p("\t\tclc")
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self.p("\t\tadc " + r_str)
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self.p("\t\ttay")
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else:
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raise CodeError("unsupported register for aug assign", str(lvalue)) # @todo +=.word
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elif operator == "-=":
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if lvalue.register == "A":
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self.p("\t\tsec")
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self.p("\t\tsbc " + r_str)
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elif lvalue.register == "X":
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with self.preserving_registers({'A'}):
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self.p("\t\ttxa")
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self.p("\t\tsec")
|
||||
self.p("\t\tsbc " + r_str)
|
||||
self.p("\t\ttax")
|
||||
elif lvalue.register == "Y":
|
||||
with self.preserving_registers({'A'}):
|
||||
self.p("\t\ttya")
|
||||
self.p("\t\tsec")
|
||||
self.p("\t\tsbc " + r_str)
|
||||
self.p("\t\ttay")
|
||||
else:
|
||||
raise CodeError("unsupported register for aug assign", str(lvalue)) # @todo -=.word
|
||||
elif operator == "&=":
|
||||
if lvalue.register == "A":
|
||||
self.p("\t\tand " + r_str)
|
||||
elif lvalue.register == "X":
|
||||
with self.preserving_registers({'A'}):
|
||||
self.p("\t\ttxa")
|
||||
self.p("\t\tand " + r_str)
|
||||
self.p("\t\ttax")
|
||||
elif lvalue.register == "Y":
|
||||
with self.preserving_registers({'A'}):
|
||||
self.p("\t\ttya")
|
||||
self.p("\t\tand " + r_str)
|
||||
self.p("\t\ttay")
|
||||
else:
|
||||
raise CodeError("unsupported register for aug assign", str(lvalue)) # @todo &=.word
|
||||
elif operator == "|=":
|
||||
if lvalue.register == "A":
|
||||
self.p("\t\tora " + r_str)
|
||||
elif lvalue.register == "X":
|
||||
with self.preserving_registers({'A'}):
|
||||
self.p("\t\ttxa")
|
||||
self.p("\t\tora " + r_str)
|
||||
self.p("\t\ttax")
|
||||
elif lvalue.register == "Y":
|
||||
with self.preserving_registers({'A'}):
|
||||
self.p("\t\ttya")
|
||||
self.p("\t\tora " + r_str)
|
||||
self.p("\t\ttay")
|
||||
else:
|
||||
raise CodeError("unsupported register for aug assign", str(lvalue)) # @todo |=.word
|
||||
elif operator == "^=":
|
||||
if lvalue.register == "A":
|
||||
self.p("\t\teor " + r_str)
|
||||
elif lvalue.register == "X":
|
||||
with self.preserving_registers({'A'}):
|
||||
self.p("\t\ttxa")
|
||||
self.p("\t\teor " + r_str)
|
||||
self.p("\t\ttax")
|
||||
elif lvalue.register == "Y":
|
||||
with self.preserving_registers({'A'}):
|
||||
self.p("\t\ttya")
|
||||
self.p("\t\teor " + r_str)
|
||||
self.p("\t\ttay")
|
||||
else:
|
||||
raise CodeError("unsupported register for aug assign", str(lvalue)) # @todo ^=.word
|
||||
elif operator == ">>=":
|
||||
if rvalue.datatype != DataType.BYTE:
|
||||
raise CodeError("can only shift by a byte value", str(rvalue))
|
||||
r_str = rvalue.name or Parser.to_hex(rvalue.address)
|
||||
if lvalue.register == "A":
|
||||
self.p("\t\tlsr " + r_str)
|
||||
elif lvalue.register == "X":
|
||||
with self.preserving_registers({'A'}):
|
||||
self.p("\t\ttxa")
|
||||
self.p("\t\tlsr " + r_str)
|
||||
self.p("\t\ttax")
|
||||
elif lvalue.register == "Y":
|
||||
with self.preserving_registers({'A'}):
|
||||
self.p("\t\ttya")
|
||||
self.p("\t\tlsr " + r_str)
|
||||
self.p("\t\ttay")
|
||||
else:
|
||||
raise CodeError("unsupported lvalue register for shift", str(lvalue)) # @todo >>=.word
|
||||
elif operator == "<<=":
|
||||
if rvalue.datatype != DataType.BYTE:
|
||||
raise CodeError("can only shift by a byte value", str(rvalue))
|
||||
r_str = rvalue.name or Parser.to_hex(rvalue.address)
|
||||
if lvalue.register == "A":
|
||||
self.p("\t\tasl " + r_str)
|
||||
elif lvalue.register == "X":
|
||||
with self.preserving_registers({'A'}):
|
||||
self.p("\t\ttxa")
|
||||
self.p("\t\tasl " + r_str)
|
||||
self.p("\t\ttax")
|
||||
elif lvalue.register == "Y":
|
||||
with self.preserving_registers({'A'}):
|
||||
self.p("\t\ttya")
|
||||
self.p("\t\tasl " + r_str)
|
||||
self.p("\t\ttay")
|
||||
else:
|
||||
raise CodeError("unsupported lvalue register for shift", str(lvalue)) # @todo >>=.word
|
||||
|
||||
|
||||
|
||||
def generate_assignment(self, stmt: AssignmentStmt) -> None:
|
||||
def unwrap_indirect(iv: IndirectValue) -> MemMappedValue:
|
||||
if isinstance(iv.value, MemMappedValue):
|
||||
|
||||
Loading…
Reference in New Issue
Block a user