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vm: setting status bits
This commit is contained in:
Irmen de Jong
parent
229c1114dd
commit
9d7131d9f6
@ -1,16 +1,20 @@
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%import textio
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main {
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uword[] pages1 = [ &page_credits.chars_1]
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uword foo2 = &page_credits.chars_1
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ubyte begin = 10
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ubyte end = 20
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sub start() {
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txt.print_uw(foo2)
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uword @shared foo = pages1[0] ; TODO fix IR compiler error no chunk with label 'page_credits.chars_1' (caused by optimizer)
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ubyte xx
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for xx in begin to end step 3 {
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txt.print_ub(xx)
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txt.spc()
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}
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txt.nl()
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for xx in end to begin step -3 {
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txt.print_ub(xx)
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txt.spc()
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}
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txt.nl()
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}
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}
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page_credits {
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ubyte[] chars_1 = [11]
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}
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@ -383,13 +383,13 @@ class VirtualMachine(irProgram: IRProgram) {
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else {
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if(i.immediate!=null) {
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setResultReg(i.reg1!!, i.immediate!!, i.type!!)
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statusZero = i.immediate==0
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statusNegative = i.immediate!! <0
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statusbitsNZ(i.immediate!!, i.type!!)
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}
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else {
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if(i.labelSymbol==null)
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throw IllegalArgumentException("expected LOAD of address of labelsymbol")
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setResultReg(i.reg1!!, i.address!!, i.type!!)
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statusbitsNZ(i.address!!, i.type!!)
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}
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}
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nextPc()
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@ -400,14 +400,12 @@ class VirtualMachine(irProgram: IRProgram) {
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IRDataType.BYTE -> {
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val value = memory.getUB(i.address!!)
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registers.setUB(i.reg1!!, value)
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statusZero = value==0.toUByte()
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statusNegative = value>=0x80u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.WORD -> {
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val value = memory.getUW(i.address!!)
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registers.setUW(i.reg1!!, value)
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statusZero = value== 0.toUShort()
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statusNegative = value>=0x8000u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.FLOAT -> registers.setFloat(i.fpReg1!!, memory.getFloat(i.address!!))
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}
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@ -419,14 +417,12 @@ class VirtualMachine(irProgram: IRProgram) {
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IRDataType.BYTE -> {
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val value = memory.getUB(registers.getUW(i.reg2!!).toInt())
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registers.setUB(i.reg1!!, value)
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statusZero = value==0.toUByte()
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statusNegative = value>=0x80u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.WORD -> {
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val value = memory.getUW(registers.getUW(i.reg2!!).toInt())
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registers.setUW(i.reg1!!, value)
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statusZero = value== 0.toUShort()
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statusNegative = value>=0x8000u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.FLOAT -> registers.setFloat(i.fpReg1!!, memory.getFloat(registers.getUW(i.reg1!!).toInt()))
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}
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@ -438,14 +434,12 @@ class VirtualMachine(irProgram: IRProgram) {
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IRDataType.BYTE -> {
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val value = memory.getUB(i.address!! + registers.getUB(i.reg2!!).toInt())
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registers.setUB(i.reg1!!, value)
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statusZero = value==0.toUByte()
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statusNegative = value>=0x80u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.WORD -> {
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val value = memory.getUW(i.address!! + registers.getUB(i.reg2!!).toInt())
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registers.setUW(i.reg1!!, value)
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statusZero = value== 0.toUShort()
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statusNegative = value>=0x8000u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.FLOAT -> registers.setFloat(i.fpReg1!!, memory.getFloat(i.address!! + registers.getUB(i.reg1!!).toInt()))
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}
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@ -458,15 +452,13 @@ class VirtualMachine(irProgram: IRProgram) {
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val pointer = memory.getUW(i.address!!) + registers.getUB(i.reg2!!)
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val value = memory.getUB(pointer.toInt())
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registers.setUB(i.reg1!!, value)
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statusZero = value==0.toUByte()
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statusNegative = value>=0x80u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.WORD -> {
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val pointer = memory.getUW(i.address!!) + registers.getUB(i.reg2!!)
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val value = memory.getUW(pointer.toInt())
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registers.setUW(i.reg1!!, value)
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statusZero = value== 0.toUShort()
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statusNegative = value>=0x8000u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.FLOAT -> {
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val pointer = memory.getUW(i.address!!) + registers.getUB(i.reg1!!)
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@ -481,14 +473,12 @@ class VirtualMachine(irProgram: IRProgram) {
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IRDataType.BYTE -> {
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val value = registers.getUB(i.reg2!!)
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registers.setUB(i.reg1!!, value)
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statusZero = value==0.toUByte()
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statusNegative = value>=0x80u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.WORD -> {
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val value = registers.getUW(i.reg2!!)
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registers.setUW(i.reg1!!, value)
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statusZero = value== 0.toUShort()
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statusNegative = value>=0x8000u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.FLOAT -> registers.setFloat(i.fpReg1!!, registers.getFloat(i.fpReg2!!))
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}
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@ -908,14 +898,12 @@ class VirtualMachine(irProgram: IRProgram) {
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IRDataType.BYTE -> {
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val value = (registers.getUB(i.reg1!!)+1u).toUByte()
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registers.setUB(i.reg1!!, value)
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statusZero = value==0.toUByte()
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statusNegative = value>=0x80u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.WORD -> {
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val value = (registers.getUW(i.reg1!!)+1u).toUShort()
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registers.setUW(i.reg1!!, value)
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statusZero = value==0.toUShort()
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statusNegative = value>=0x8000u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.FLOAT -> registers.setFloat(i.fpReg1!!, registers.getFloat(i.fpReg1!!)+1f)
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}
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@ -928,14 +916,12 @@ class VirtualMachine(irProgram: IRProgram) {
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IRDataType.BYTE -> {
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val value = (memory.getUB(address)+1u).toUByte()
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memory.setUB(address, value)
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statusZero = value==0.toUByte()
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statusNegative = value>=0x80u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.WORD -> {
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val value = (memory.getUW(address)+1u).toUShort()
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memory.setUW(address, value)
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statusZero = value== 0.toUShort()
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statusNegative = value>=0x8000u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.FLOAT -> memory.setFloat(address, memory.getFloat(address)+1f)
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}
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@ -947,14 +933,12 @@ class VirtualMachine(irProgram: IRProgram) {
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IRDataType.BYTE -> {
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val value = (registers.getUB(i.reg1!!)-1u).toUByte()
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registers.setUB(i.reg1!!, value)
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statusZero = value== 0.toUByte()
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statusNegative = value>=0x80u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.WORD -> {
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val value = (registers.getUW(i.reg1!!)-1u).toUShort()
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registers.setUW(i.reg1!!, value)
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statusZero = value== 0.toUShort()
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statusNegative = value>=0x8000u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.FLOAT -> registers.setFloat(i.fpReg1!!, registers.getFloat(i.fpReg1!!)-1f)
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}
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@ -966,14 +950,12 @@ class VirtualMachine(irProgram: IRProgram) {
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IRDataType.BYTE -> {
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val value = (memory.getUB(i.address!!)-1u).toUByte()
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memory.setUB(i.address!!, value)
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statusZero = value== 0.toUByte()
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statusNegative = value>=0x80u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.WORD -> {
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val value = (memory.getUW(i.address!!)-1u).toUShort()
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memory.setUW(i.address!!, value)
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statusZero = value== 0.toUShort()
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statusNegative = value>=0x8000u
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statusbitsNZ(value.toInt(), i.type!!)
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}
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IRDataType.FLOAT -> memory.setFloat(i.address!!, memory.getFloat(i.address!!)-1f)
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}
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@ -1268,52 +1250,50 @@ class VirtualMachine(irProgram: IRProgram) {
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}
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private fun InsCMP(i: IRInstruction) {
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val comparison: Int
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when(i.type!!) {
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val comparison = when(i.type!!) {
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IRDataType.BYTE -> {
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val reg1 = registers.getUB(i.reg1!!)
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val reg2 = registers.getUB(i.reg2!!)
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comparison = reg1.toInt() - reg2.toInt()
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statusNegative = (comparison and 0x80)==0x80
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reg1.toInt() - reg2.toInt()
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}
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IRDataType.WORD -> {
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val reg1 = registers.getUW(i.reg1!!)
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val reg2 = registers.getUW(i.reg2!!)
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comparison = reg1.toInt() - reg2.toInt()
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statusNegative = (comparison and 0x8000)==0x8000
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reg1.toInt() - reg2.toInt()
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}
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IRDataType.FLOAT -> throw IllegalArgumentException("invalid float type for this instruction $i")
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}
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if(comparison==0){
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statusZero = true
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statusCarry = true
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} else if(comparison>0) {
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statusZero = false
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statusCarry = true
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} else {
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statusZero = false
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statusCarry = false
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}
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statusbitsComparison(comparison, i.type!!)
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nextPc()
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}
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private fun InsCMPI(i: IRInstruction) {
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val comparison: Int
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when(i.type!!) {
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val comparison = when(i.type!!) {
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IRDataType.BYTE -> {
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val reg1 = registers.getUB(i.reg1!!)
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comparison = reg1.toInt() - (i.immediate!! and 255)
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statusNegative = (comparison and 0x80)==0x80
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reg1.toInt() - (i.immediate!! and 255)
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}
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IRDataType.WORD -> {
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val reg1 = registers.getUW(i.reg1!!)
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comparison = reg1.toInt() - (i.immediate!! and 65535)
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statusNegative = (comparison and 0x8000)==0x8000
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reg1.toInt() - (i.immediate!! and 65535)
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}
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IRDataType.FLOAT -> throw IllegalArgumentException("invalid float type for this instruction $i")
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}
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if(comparison==0){
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statusbitsComparison(comparison, i.type!!)
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nextPc()
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}
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private fun statusbitsNZ(value: Int, type: IRDataType) {
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statusZero = value==0
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when(type) {
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IRDataType.BYTE -> statusNegative = (value and 0x80)==0x80
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IRDataType.WORD -> statusNegative = (value and 0x8000)==0x8000
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IRDataType.FLOAT -> { /* floats don't change the status bits */ }
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}
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}
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private fun statusbitsComparison(comparison: Int, type: IRDataType) {
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if(comparison==0) {
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statusZero = true
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statusCarry = true
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} else if(comparison>0) {
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@ -1323,7 +1303,12 @@ class VirtualMachine(irProgram: IRProgram) {
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statusZero = false
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statusCarry = false
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}
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nextPc()
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when(type) {
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IRDataType.BYTE -> statusNegative = (comparison and 0x80)!=0
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IRDataType.WORD -> statusNegative = (comparison and 0x8000)!=0
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IRDataType.FLOAT -> { /* floats don't change the status bits */ }
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}
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// TODO statusOverflow
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}
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private fun plusMinusMultAnyByte(operator: String, reg1: Int, reg2: Int) {
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