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fix popCpuStack to load values into asmsub register params
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@ -2875,13 +2875,8 @@ $repeatLabel lda $counterVar
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}
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}
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}
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}
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internal fun popCpuStack(dt: DataType, target: IPtVariable, scope: IPtSubroutine?) {
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internal fun popCpuStack(asmsub: PtAsmSub, parameter: PtSubroutineParameter, reg: RegisterOrStatusflag) {
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// note: because A is pushed first so popped last, saving A is often not required here.
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val shouldKeepA = asmsub.parameters.any { it.second.registerOrPair==RegisterOrPair.AX || it.second.registerOrPair==RegisterOrPair.AY}
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val parameter = (target as PtNode).definingSub()?.parameters?.singleOrNull { it.name===target.name }
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if(parameter!=null) {
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val sub = parameter.definingAsmSub() ?: throw AssemblyError("push/pop arg passing only supported on asmsubs ${target.position}")
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val shouldKeepA = sub.parameters.any { it.second.registerOrPair==RegisterOrPair.AX || it.second.registerOrPair==RegisterOrPair.AY}
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val reg = sub.parameters.single { it.first === parameter }.second
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if(reg.statusflag!=null) {
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if(reg.statusflag!=null) {
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if(shouldKeepA)
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if(shouldKeepA)
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out(" sta P8ZP_SCRATCH_REG")
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out(" sta P8ZP_SCRATCH_REG")
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@ -2895,7 +2890,7 @@ $repeatLabel lda $counterVar
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out(" lda P8ZP_SCRATCH_REG")
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out(" lda P8ZP_SCRATCH_REG")
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}
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}
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else {
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else {
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if (dt in ByteDatatypes) {
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if (parameter.type in ByteDatatypes) {
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if (isTargetCpu(CpuType.CPU65c02)) {
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if (isTargetCpu(CpuType.CPU65c02)) {
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when (reg.registerOrPair) {
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when (reg.registerOrPair) {
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RegisterOrPair.A -> out(" pla")
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RegisterOrPair.A -> out(" pla")
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@ -2950,7 +2945,16 @@ $repeatLabel lda $counterVar
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}
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}
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}
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}
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}
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}
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} else {
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}
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internal fun popCpuStack(dt: DataType, target: IPtVariable, scope: IPtSubroutine?) {
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// note: because A is pushed first so popped last, saving A is often not required here.
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val targetAsmSub = (target as PtNode).definingAsmSub()
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if(targetAsmSub != null) {
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val parameter = targetAsmSub.parameters.first { it.first.name==target.name }
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popCpuStack(targetAsmSub, parameter.first, parameter.second)
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return
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}
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val scopedName = when(target) {
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val scopedName = when(target) {
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is PtConstant -> target.scopedName
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is PtConstant -> target.scopedName
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is PtMemMapped -> target.scopedName
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is PtMemMapped -> target.scopedName
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@ -2969,7 +2973,6 @@ $repeatLabel lda $counterVar
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assignRegister(RegisterOrPair.AY, tgt)
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assignRegister(RegisterOrPair.AY, tgt)
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}
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}
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}
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}
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}
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internal fun popCpuStack(dt: DataType, targetAsmVarName: String) {
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internal fun popCpuStack(dt: DataType, targetAsmVarName: String) {
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when(dt) {
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when(dt) {
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@ -36,12 +36,12 @@ fun asmsub6502ArgsEvalOrder(sub: PtAsmSub): List<Int> {
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fun asmsub6502ArgsHaveRegisterClobberRisk(
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fun asmsub6502ArgsHaveRegisterClobberRisk(
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args: List<PtExpression>,
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args: List<PtExpression>,
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paramRegisters: List<Pair<PtSubroutineParameter, RegisterOrStatusflag>>
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params: List<Pair<PtSubroutineParameter, RegisterOrStatusflag>>
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): Boolean {
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): Boolean {
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fun isClobberRisk(expr: PtExpression): Boolean {
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fun isClobberRisk(expr: PtExpression): Boolean {
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when (expr) {
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when (expr) {
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is PtArrayIndexer -> {
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is PtArrayIndexer -> {
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return paramRegisters.any {
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return params.any {
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it.second.registerOrPair in listOf(RegisterOrPair.Y, RegisterOrPair.AY, RegisterOrPair.XY)
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it.second.registerOrPair in listOf(RegisterOrPair.Y, RegisterOrPair.AY, RegisterOrPair.XY)
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}
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}
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}
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}
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@ -131,9 +131,7 @@ internal class FunctionCallAsmGen(private val program: PtProgram, private val as
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}
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}
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argOrder.forEach {
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argOrder.forEach {
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val param = callee.parameters[it]
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val param = callee.parameters[it]
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TODO("pop cpu stack into asmsub param ${param.first.name} ${param.second}")
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asmgen.popCpuStack(callee, param.first, param.second)
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// val targetVar = callee.searchParameter(param.name)!!
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// asmgen.popCpuStack(param.first.type, targetVar, call.definingISub())
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}
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}
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}
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}
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