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https://github.com/irmen/prog8.git
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optimize postincrdecr on memory a bit
This commit is contained in:
Irmen de Jong
parent
b0f5b6925d
commit
abcdfd8e28
@ -98,7 +98,7 @@ private fun optimizeCommonSubExpressions(program: PtProgram, errors: IErrorRepor
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stmtContainer.children.add(stmtContainer.children.indexOf(stmt), tempassign)
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tempassign.parent = stmtContainer
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val tempvar = PtVariable(tempvarName, datatype, ZeropageWish.DONTCARE, null, null, binexpr.position)
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val tempvar = PtVariable(tempvarName, datatype, ZeropageWish.NOT_IN_ZEROPAGE, null, null, binexpr.position)
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stmtContainer.add(0, tempvar)
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tempvar.parent = stmtContainer
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@ -1192,7 +1192,7 @@ $repeatLabel""")
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return null
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}
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internal fun tryOptimizedPointerAccessWithA(addressExpr: PtExpression, operator: String, write: Boolean): Boolean {
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internal fun tryOptimizedPointerAccessWithA(addressExpr: PtBinaryExpression, write: Boolean): Boolean {
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// optimize pointer,indexregister if possible
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fun evalBytevalueWillClobberA(expr: PtExpression): Boolean {
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@ -1208,7 +1208,7 @@ $repeatLabel""")
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}
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}
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if(operator=="+") {
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if(addressExpr.operator=="+") {
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val ptrAndIndex = pointerViaIndexRegisterPossible(addressExpr)
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if(ptrAndIndex!=null) {
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val pointervar = ptrAndIndex.first as? PtIdentifier
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@ -2919,7 +2919,7 @@ $repeatLabel""")
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}
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is PtBinaryExpression -> {
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val addrExpr = expr.address as PtBinaryExpression
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if(!tryOptimizedPointerAccessWithA(addrExpr, addrExpr.operator, false)) {
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if(!tryOptimizedPointerAccessWithA(addrExpr, false)) {
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assignViaExprEval()
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}
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}
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@ -1,9 +1,6 @@
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package prog8.codegen.cpu6502
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import prog8.code.ast.PtIdentifier
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import prog8.code.ast.PtNumber
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import prog8.code.ast.PtPostIncrDecr
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import prog8.code.ast.PtProgram
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import prog8.code.ast.*
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import prog8.code.core.*
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@ -37,6 +34,55 @@ internal class PostIncrDecrAsmGen(private val program: PtProgram, private val as
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}
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}
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targetMemory!=null -> {
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fun incDecViaExprEval() {
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asmgen.assignExpressionToRegister(targetMemory.address, RegisterOrPair.AY)
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asmgen.out(" sta (+) + 1 | sty (+) + 2")
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if(incr)
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asmgen.out("+\tinc ${'$'}ffff\t; modified")
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else
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asmgen.out("+\tdec ${'$'}ffff\t; modified")
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}
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fun tryOptimizedPointerIncDec(address: PtBinaryExpression): Boolean {
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if(address.operator=="+") {
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val offset = address.right.asConstInteger()
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if(offset!=null && offset<256) {
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// we have @(ptr + 255) ++ , or @(ptr+255)--
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asmgen.assignExpressionToRegister(address.left, RegisterOrPair.AY, false)
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asmgen.out("""
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sta (+) + 1
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sty (+) + 2
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ldx #$offset""")
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if(incr)
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asmgen.out("+\tinc ${'$'}ffff,x\t; modified")
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else
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asmgen.out("+\tdec ${'$'}ffff,x\t; modified")
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return true
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} else if(address.right.type in ByteDatatypes) {
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// we have @(ptr + bytevar) ++ , or @(ptr+bytevar)--
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asmgen.assignExpressionToRegister(address.left, RegisterOrPair.AY, false)
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asmgen.out(" sta (+) + 1 | sty (+) + 2")
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asmgen.assignExpressionToRegister(address.right, RegisterOrPair.X, false)
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if(incr)
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asmgen.out("+\tinc ${'$'}ffff,x\t; modified")
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else
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asmgen.out("+\tdec ${'$'}ffff,x\t; modified")
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return true
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} else if((address.right as? PtTypeCast)?.value?.type in ByteDatatypes) {
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// we have @(ptr + bytevar) ++ , or @(ptr+bytevar)--
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asmgen.assignExpressionToRegister(address.left, RegisterOrPair.AY, false)
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asmgen.out(" sta (+) + 1 | sty (+) + 2")
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asmgen.assignExpressionToRegister((address.right as PtTypeCast).value, RegisterOrPair.X, false)
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if(incr)
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asmgen.out("+\tinc ${'$'}ffff,x\t; modified")
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else
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asmgen.out("+\tdec ${'$'}ffff,x\t; modified")
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return true
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}
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}
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return false
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}
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when (val addressExpr = targetMemory.address) {
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is PtNumber -> {
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val what = addressExpr.number.toHex()
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@ -50,13 +96,13 @@ internal class PostIncrDecrAsmGen(private val program: PtProgram, private val as
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else
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asmgen.out("+\tdec ${'$'}ffff\t; modified")
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}
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is PtBinaryExpression -> {
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if(!tryOptimizedPointerIncDec(addressExpr)) {
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incDecViaExprEval()
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}
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}
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else -> {
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asmgen.assignExpressionToRegister(addressExpr, RegisterOrPair.AY)
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asmgen.out(" sta (+) + 1 | sty (+) + 2")
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if(incr)
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asmgen.out("+\tinc ${'$'}ffff\t; modified")
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else
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asmgen.out("+\tdec ${'$'}ffff\t; modified")
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incDecViaExprEval()
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}
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}
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}
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@ -144,7 +144,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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}
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is PtBinaryExpression -> {
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val addrExpr = value.address as PtBinaryExpression
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if(asmgen.tryOptimizedPointerAccessWithA(addrExpr, addrExpr.operator, false)) {
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if(asmgen.tryOptimizedPointerAccessWithA(addrExpr, false)) {
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assignRegisterByte(assign.target, CpuRegister.A, false, true)
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} else {
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assignViaExprEval(value.address)
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@ -772,9 +772,21 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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return true
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}
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else -> {
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val leftMemByte = expr.left as? PtMemoryByte
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val rightMemByte = expr.right as? PtMemoryByte
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val leftArrayIndexer = expr.left as? PtArrayIndexer
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val rightArrayIndexer = expr.right as? PtArrayIndexer
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if(rightArrayIndexer!=null && rightArrayIndexer.type in ByteDatatypes && left.type in ByteDatatypes) {
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// special optimization for bytevalue +/- bytearr[y] : no need to use a tempvar, just use adc array,y or sbc array,y or adc (ptr),y / sbc (ptr),y
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if(expr.operator=="+" && leftArrayIndexer!=null && leftArrayIndexer.type in ByteDatatypes && right.type in ByteDatatypes) {
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// special optimization for bytearray[y] + bytevalue : no need to use a tempvar, just use adc array,y
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assignExpressionToRegister(right, RegisterOrPair.A, right.type==DataType.BYTE)
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if(!leftArrayIndexer.index.isSimple()) asmgen.out(" pha")
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asmgen.assignExpressionToRegister(leftArrayIndexer.index, RegisterOrPair.Y, false)
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if(!leftArrayIndexer.index.isSimple()) asmgen.out(" pla")
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val arrayvarname = asmgen.asmSymbolName(leftArrayIndexer.variable)
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asmgen.out(" clc | adc $arrayvarname,y")
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assignRegisterByte(target, CpuRegister.A, dt in SignedDatatypes, true)
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} else if(rightArrayIndexer!=null && rightArrayIndexer.type in ByteDatatypes && left.type in ByteDatatypes) {
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// special optimization for bytevalue +/- bytearray[y] : no need to use a tempvar, just use adc array,y or sbc array,y
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assignExpressionToRegister(left, RegisterOrPair.A, left.type==DataType.BYTE)
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if(!rightArrayIndexer.index.isSimple()) asmgen.out(" pha")
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asmgen.assignExpressionToRegister(rightArrayIndexer.index, RegisterOrPair.Y, false)
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@ -785,6 +797,12 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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else
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asmgen.out(" sec | sbc $arrayvarname,y")
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assignRegisterByte(target, CpuRegister.A, dt in SignedDatatypes, true)
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} else if(expr.operator=="+" && leftMemByte!=null && right.type in ByteDatatypes && optimizedPointerIndexPlusByteIntoA(leftMemByte, right)) {
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assignRegisterByte(target, CpuRegister.A, dt in SignedDatatypes, true)
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return true
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} else if(rightMemByte!=null && left.type in ByteDatatypes && optimizedPointerIndexPlusMinusByteIntoA(left, expr.operator, rightMemByte)) {
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assignRegisterByte(target, CpuRegister.A, dt in SignedDatatypes, true)
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return true
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} else {
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assignExpressionToRegister(left, RegisterOrPair.A, left.type==DataType.BYTE)
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if(directIntoY(right)) {
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@ -969,6 +987,32 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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return false
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}
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private fun optimizedPointerIndexPlusByteIntoA(mem: PtMemoryByte, value: PtExpression): Boolean {
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// special optimization for pointervar[y] + bytevalue (actually: @(address) + value)
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return false // TODO implement this optimization?
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}
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private fun optimizedPointerIndexPlusMinusByteIntoA(value: PtExpression, operator: String, mem: PtMemoryByte): Boolean {
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// special optimization for bytevalue +/- pointervar[y] (actually: bytevalue +/- @(address) )
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val address = mem.address as? PtBinaryExpression
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if(address is PtBinaryExpression) {
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val offset = address.right.asConstInteger()
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if(offset!=null && offset<256) {
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// we have value + @(ptr + 255), or value - @(ptr+255)
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// TODO()
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} else if(address.right.type in ByteDatatypes) {
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// we have @(ptr + bytevar) ++ , or @(ptr+bytevar)--
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// TODO()
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} else if((address.right as? PtTypeCast)?.value?.type in ByteDatatypes) {
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// we have @(ptr + bytevar) ++ , or @(ptr+bytevar)--
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// TODO()
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}
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}
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println("TODO: OPTIMIZE POINTER PLUSMINUS ${value.position}")
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return false
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}
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private fun optimizedBitwiseExpr(expr: PtBinaryExpression, target: AsmAssignTarget): Boolean {
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if (expr.left.type in ByteDatatypes && expr.right.type in ByteDatatypes) {
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if (expr.right.isSimple()) {
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@ -1993,7 +2037,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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}
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is PtBinaryExpression -> {
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val addrExpr = value.address as PtBinaryExpression
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if(asmgen.tryOptimizedPointerAccessWithA(addrExpr, addrExpr.operator, false)) {
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if(asmgen.tryOptimizedPointerAccessWithA(addrExpr, false)) {
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asmgen.out(" ldy #0")
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assignRegisterpairWord(target, RegisterOrPair.AY)
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} else {
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@ -3860,7 +3904,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
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}
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}
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}
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if(!asmgen.tryOptimizedPointerAccessWithA(addressExpr, addressExpr.operator, true))
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if(!asmgen.tryOptimizedPointerAccessWithA(addressExpr, true))
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storeViaExprEval()
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}
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else -> storeViaExprEval()
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@ -197,19 +197,16 @@ _after:
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val indexExpr = arrayIndexedExpression.indexer.indexExpr
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val arrayVar = arrayIndexedExpression.arrayvar.targetVarDecl(program)
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if(arrayVar!=null && arrayVar.datatype==DataType.UWORD) {
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val add: Expression =
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if(indexExpr.constValue(program)?.number==0.0)
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arrayIndexedExpression.arrayvar.copy()
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else
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BinaryExpression(arrayIndexedExpression.arrayvar.copy(), "+", indexExpr, arrayIndexedExpression.position)
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val wordIndex = TypecastExpression(indexExpr, DataType.UWORD, true, indexExpr.position)
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val address = BinaryExpression(arrayIndexedExpression.arrayvar.copy(), "+", wordIndex, arrayIndexedExpression.position)
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return if(parent is AssignTarget) {
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// assignment to array
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val memwrite = DirectMemoryWrite(add, arrayIndexedExpression.position)
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val memwrite = DirectMemoryWrite(address, arrayIndexedExpression.position)
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val newtarget = AssignTarget(null, null, memwrite, arrayIndexedExpression.position)
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listOf(IAstModification.ReplaceNode(parent, newtarget, parent.parent))
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} else {
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// read from array
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val memread = DirectMemoryRead(add, arrayIndexedExpression.position)
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val memread = DirectMemoryRead(address, arrayIndexedExpression.position)
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listOf(IAstModification.ReplaceNode(arrayIndexedExpression, memread, parent))
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}
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}
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@ -552,7 +552,7 @@ class IntermediateAstMaker(private val program: Program, private val errors: IEr
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private fun transform(srcArr: ArrayIndexedExpression): PtArrayIndexer {
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if(srcArr.arrayvar.targetVarDecl(program)!!.datatype !in ArrayDatatypes + DataType.STR)
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throw FatalAstException("array indexing can be used on array or string variables ${srcArr.position}")
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throw FatalAstException("array indexing can only be used on array or string variables ${srcArr.position}")
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val eltType = srcArr.inferType(program).getOrElse { throw FatalAstException("unknown dt") }
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val array = PtArrayIndexer(eltType, srcArr.position)
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array.add(transform(srcArr.arrayvar))
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@ -4,6 +4,8 @@ TODO
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petaxian is now a lot larger since pointer[idx] is rewritten into @(ptr+idx). Missing some optimized code somewhere now?
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VM textelite is now a lot larger too
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DO: "TODO implement this optimization"
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(after merge in boolean): move all "OperatorXinplace" from expressionGen to AssignmentGen, see if we can get rid of the Result return type.
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...
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@ -5,25 +5,22 @@
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%option no_sysinit
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main {
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sub derp(str arg) {
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arg[4] = '?'
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}
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sub start() {
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str msg = "hello"
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derp(msg)
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txt.chrout(msg[4]) ; ?
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txt.nl()
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; ubyte[10] az
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ubyte @shared offset=4
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uword @shared az = $4000
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@($4004) = 0
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az[4] |= $40
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txt.print_ub(@($4004)) ; 64
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ubyte @shared value = 22
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@($4004) = 99
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az[4]--
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@(az + offset)--
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txt.print_ub(@($4004))
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txt.nl()
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@(az+4) = 0
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@(az+4) |= $4f
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txt.print_ub(@($4004)) ; 79
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az[4]++
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@(az+offset)++
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txt.print_ub(@($4004))
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txt.nl()
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; cx16.r0L = az[4] + value*5
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; cx16.r1L = value*5 + az[4]
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; ubyte @shared idx = 1
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; txt.print_w(array[idx])
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