This commit is contained in:
Irmen de Jong
2022-05-22 23:11:22 +02:00
parent fd6eb47e68
commit ba614801ee
28 changed files with 64 additions and 56 deletions
@@ -28,11 +28,10 @@ internal class AssignmentGen(private val codeGen: CodeGen, private val expressio
val address = codeGen.allocations.get(ident.targetName)
assignSelfInMemory(address, assignment.value, assignment)
} else if(memory != null) {
if(memory.address is PtNumber) {
if(memory.address is PtNumber)
assignSelfInMemory((memory.address as PtNumber).number.toInt(), assignment.value, assignment)
} else {
else
fallbackAssign(assignment)
}
} else if(array!=null) {
// TODO in-place array element assignment?
fallbackAssign(assignment)
@@ -58,8 +57,8 @@ internal class AssignmentGen(private val codeGen: CodeGen, private val expressio
code // do nothing, mem=mem null assignment.
else {
// read and write a (i/o) memory location to itself.
code += VmCodeInstruction(Opcode.LOADM, vmDt, reg1 = 0, value = address)
code += VmCodeInstruction(Opcode.STOREM, vmDt, reg1 = 0, value = address)
code += VmCodeInstruction(Opcode.LOADM, vmDt, reg1 =0, value = address)
code += VmCodeInstruction(Opcode.STOREM, vmDt, reg1=0, value = address)
code
}
}
@@ -208,7 +208,7 @@ class CodeGen(internal val program: PtProgram,
// iterate over a zero-terminated string
code += VmCodeInstruction(Opcode.LOAD, VmDataType.BYTE, reg1=indexReg, value=0)
code += VmCodeLabel(loopLabel)
code += VmCodeInstruction(Opcode.LOADX, VmDataType.BYTE, reg1=0, reg2=indexReg, value = arrayAddress)
code += VmCodeInstruction(Opcode.LOADX, VmDataType.BYTE, reg1 = 0, reg2=indexReg, value = arrayAddress)
code += VmCodeInstruction(Opcode.BZ, VmDataType.BYTE, reg1=0, labelSymbol = endLabel)
code += VmCodeInstruction(Opcode.STOREM, VmDataType.BYTE, reg1=0, value = loopvarAddress)
code += translateNode(forLoop.statements)