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internal rename of romsub to extsub

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This commit is contained in:
Irmen de Jong 2024-11-06 21:42:16 +01:00
parent 77e376f6bf
commit c702c4a6df
12 changed files with 44 additions and 44 deletions
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14
codeCore/src/prog8/code/SymbolTable.kt
View File

@ -98,7 +98,7 @@ enum class StNodeType {
// MODULE, // not used with current scoping rules
BLOCK,
SUBROUTINE,
ROMSUB,
EXTSUB,
LABEL,
STATICVAR,
MEMVAR,
@ -257,17 +257,17 @@ class StSub(name: String, val parameters: List<StSubroutineParameter>, val retur
StNode(name, StNodeType.SUBROUTINE, astNode)
class StRomSub(name: String,
val address: PtAsmSub.Address?, // null in case of asmsub, specified in case of romsub.
val parameters: List<StRomSubParameter>,
val returns: List<StRomSubParameter>,
class StExtSub(name: String,
val address: PtAsmSub.Address?, // null in case of asmsub, specified in case of extsub.
val parameters: List<StExtSubParameter>,
val returns: List<StExtSubParameter>,
astNode: PtNode) :
StNode(name, StNodeType.ROMSUB, astNode)
StNode(name, StNodeType.EXTSUB, astNode)
class StSubroutineParameter(val name: String, val type: DataType)
class StRomSubParameter(val register: RegisterOrStatusflag, val type: DataType)
class StExtSubParameter(val register: RegisterOrStatusflag, val type: DataType)
class StArrayElement(val number: Double?, val addressOfSymbol: String?, val boolean: Boolean?) {
init {
if(number!=null) require(addressOfSymbol==null && boolean==null)

6
codeCore/src/prog8/code/SymbolTableMaker.kt
View File

@ -38,9 +38,9 @@ class SymbolTableMaker(private val program: PtProgram, private val options: Comp
private fun addToSt(node: PtNode, scope: ArrayDeque<StNode>) {
val stNode = when(node) {
is PtAsmSub -> {
val parameters = node.parameters.map { StRomSubParameter(it.first, it.second.type) }
val returns = node.returns.map { StRomSubParameter(it.first, it.second) }
StRomSub(node.name, node.address, parameters, returns, node)
val parameters = node.parameters.map { StExtSubParameter(it.first, it.second.type) }
val returns = node.returns.map { StExtSubParameter(it.first, it.second) }
StExtSub(node.name, node.address, parameters, returns, node)
}
is PtBlock -> {
StNode(node.name, StNodeType.BLOCK, node)

4
codeCore/src/prog8/code/optimize/Optimizer.kt
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@ -1,6 +1,6 @@
package prog8.code.optimize
import prog8.code.StRomSub
import prog8.code.StExtSub
import prog8.code.SymbolTable
import prog8.code.ast.*
import prog8.code.core.*
@ -39,7 +39,7 @@ private fun optimizeAssignTargets(program: PtProgram, st: SymbolTable, errors: I
}
if(functionName!=null) {
val stNode = st.lookup(functionName)
if (stNode is StRomSub) {
if (stNode is StExtSub) {
require(node.children.size==stNode.returns.size+1) {
"number of targets must match return values"
}

2
codeGenCpu6502/src/prog8/codegen/cpu6502/AsmGen.kt
View File

@ -202,7 +202,7 @@ private fun PtIdentifier.prefix(parent: PtNode, st: SymbolTable): PtIdentifier {
val prefixType = when(target!!.type) {
StNodeType.BLOCK -> 'b'
StNodeType.SUBROUTINE, StNodeType.ROMSUB -> 's'
StNodeType.SUBROUTINE, StNodeType.EXTSUB -> 's'
StNodeType.LABEL -> 'l'
StNodeType.STATICVAR, StNodeType.MEMVAR -> 'v'
StNodeType.CONSTANT -> 'c'

12
codeGenCpu6502/src/prog8/codegen/cpu6502/IfElseAsmGen.kt
View File

@ -1,6 +1,6 @@
package prog8.codegen.cpu6502
import prog8.code.StRomSub
import prog8.code.StExtSub
import prog8.code.SymbolTable
import prog8.code.ast.*
import prog8.code.core.*
@ -17,7 +17,7 @@ internal class IfElseAsmGen(private val program: PtProgram,
fun translate(stmt: PtIfElse) {
require(stmt.condition.type== DataType.BOOL)
checkNotRomsubReturnsStatusReg(stmt.condition)
checkNotExtsubReturnsStatusReg(stmt.condition)
val jumpAfterIf = stmt.ifScope.children.singleOrNull() as? PtJump
@ -46,7 +46,7 @@ internal class IfElseAsmGen(private val program: PtProgram,
if(stmt.hasElse())
throw AssemblyError("not prefix in ifelse should have been replaced by swapped if-else blocks")
else {
checkNotRomsubReturnsStatusReg(prefixCond.value)
checkNotExtsubReturnsStatusReg(prefixCond.value)
assignConditionValueToRegisterAndTest(prefixCond.value)
return if (jumpAfterIf != null)
translateJumpElseBodies("beq", "bne", jumpAfterIf, stmt.elseScope)
@ -136,11 +136,11 @@ internal class IfElseAsmGen(private val program: PtProgram,
}
}
private fun checkNotRomsubReturnsStatusReg(condition: PtExpression) {
private fun checkNotExtsubReturnsStatusReg(condition: PtExpression) {
val fcall = condition as? PtFunctionCall
if(fcall!=null && fcall.type==DataType.BOOL) {
val romsub = st.lookup(fcall.name) as? StRomSub
if(romsub!=null && romsub.returns.any { it.register.statusflag!=null }) {
val extsub = st.lookup(fcall.name) as? StExtSub
if(extsub!=null && extsub.returns.any { it.register.statusflag!=null }) {
throw AssemblyError("if romsub() that returns a status register boolean should have been changed into a Conditional branch such as if_cc")
}
}

18
codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt
View File

@ -1,8 +1,8 @@
package prog8.codegen.cpu6502.assignment
import prog8.code.StMemVar
import prog8.code.StRomSub
import prog8.code.StRomSubParameter
import prog8.code.StExtSub
import prog8.code.StExtSubParameter
import prog8.code.StStaticVariable
import prog8.code.ast.*
import prog8.code.core.*
@ -39,7 +39,7 @@ internal class AssignmentAsmGen(
val values = assignment.value as? PtFunctionCall
?: throw AssemblyError("only function calls can return multiple values in a multi-assign")
val sub = asmgen.symbolTable.lookup(values.name) as? StRomSub
val sub = asmgen.symbolTable.lookup(values.name) as? StExtSub
?: throw AssemblyError("only asmsubs can return multiple values")
require(sub.returns.size>=2)
@ -64,11 +64,11 @@ internal class AssignmentAsmGen(
}
private fun assignStatusFlagsAndRegistersResults(
statusFlagResults: List<Pair<StRomSubParameter, PtNode>>,
registersResults: List<Pair<StRomSubParameter, PtNode>>
statusFlagResults: List<Pair<StExtSubParameter, PtNode>>,
registersResults: List<Pair<StExtSubParameter, PtNode>>
) {
fun needsToSaveA(registersResults: List<Pair<StRomSubParameter, PtNode>>): Boolean =
fun needsToSaveA(registersResults: List<Pair<StExtSubParameter, PtNode>>): Boolean =
if(registersResults.isEmpty())
false
else if(registersResults.all { (it.second as PtAssignTarget).identifier!=null})
@ -91,12 +91,12 @@ internal class AssignmentAsmGen(
}
}
private fun assignOnlyTheStatusFlagsResults(saveA: Boolean, statusFlagResults: List<Pair<StRomSubParameter, PtNode>>) {
private fun assignOnlyTheStatusFlagsResults(saveA: Boolean, statusFlagResults: List<Pair<StExtSubParameter, PtNode>>) {
// assigning flags to their variables targets requires load-instructions that destroy flags
// so if there's more than 1, we need to save and restore the flags
val saveFlags = statusFlagResults.size>1
fun hasFlag(statusFlagResults: List<Pair<StRomSubParameter, PtNode>>, flag: Statusflag): PtAssignTarget? {
fun hasFlag(statusFlagResults: List<Pair<StExtSubParameter, PtNode>>, flag: Statusflag): PtAssignTarget? {
for ((returns, target) in statusFlagResults) {
if(returns.register.statusflag!! == flag)
return target as PtAssignTarget
@ -121,7 +121,7 @@ internal class AssignmentAsmGen(
if(saveA) asmgen.out(" pla")
}
private fun assignRegisterResults(registersResults: List<Pair<StRomSubParameter, PtNode>>) {
private fun assignRegisterResults(registersResults: List<Pair<StExtSubParameter, PtNode>>) {
registersResults.forEach { (returns, target) ->
target as PtAssignTarget
if(!target.void) {

8
codeGenIntermediate/src/prog8/codegen/intermediate/AssignmentGen.kt
View File

@ -1,7 +1,7 @@
package prog8.codegen.intermediate
import prog8.code.StRomSub
import prog8.code.StRomSubParameter
import prog8.code.StExtSub
import prog8.code.StExtSubParameter
import prog8.code.ast.*
import prog8.code.core.*
import prog8.intermediate.*
@ -14,7 +14,7 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
val values = assignment.value as? PtFunctionCall
?: throw AssemblyError("only function calls can return multiple values in a multi-assign")
val sub = codeGen.symbolTable.lookup(values.name) as? StRomSub
val sub = codeGen.symbolTable.lookup(values.name) as? StExtSub
?: throw AssemblyError("only asmsubs can return multiple values")
val result = mutableListOf<IRCodeChunkBase>()
@ -46,7 +46,7 @@ internal class AssignmentGen(private val codeGen: IRCodeGen, private val express
}
}
private fun assignCpuRegister(returns: StRomSubParameter, regNum: Int, target: PtAssignTarget): IRCodeChunks {
private fun assignCpuRegister(returns: StExtSubParameter, regNum: Int, target: PtAssignTarget): IRCodeChunks {
val result = mutableListOf<IRCodeChunkBase>()
val loadCpuRegInstr = when(returns.register.registerOrPair) {
RegisterOrPair.A -> IRInstruction(Opcode.LOADHA, IRDataType.BYTE, reg1=regNum)

10
codeGenIntermediate/src/prog8/codegen/intermediate/ExpressionGen.kt
View File

@ -1,7 +1,7 @@
package prog8.codegen.intermediate
import prog8.code.StNode
import prog8.code.StRomSub
import prog8.code.StExtSub
import prog8.code.StSub
import prog8.code.ast.*
import prog8.code.core.*
@ -588,7 +588,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
else
ExpressionCodeResult(result, returnRegSpec!!.dt, returnRegSpec.registerNum, -1)
}
is StRomSub -> {
is StExtSub -> {
val result = mutableListOf<IRCodeChunkBase>()
addInstr(result, IRInstruction(Opcode.PREPARECALL, immediate = callTarget.parameters.size), null)
// assign the arguments
@ -621,7 +621,7 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
}
if(callTarget.returns.size>1)
return callRomSubWithMultipleReturnValues(callTarget, fcall, argRegisters, result)
return callExtSubWithMultipleReturnValues(callTarget, fcall, argRegisters, result)
// return a single value (or nothing)
val returnRegSpec = if(fcall.void) null else {
@ -750,8 +750,8 @@ internal class ExpressionGen(private val codeGen: IRCodeGen) {
}
}
private fun callRomSubWithMultipleReturnValues(
callTarget: StRomSub,
private fun callExtSubWithMultipleReturnValues(
callTarget: StExtSub,
fcall: PtFunctionCall,
argRegisters: MutableList<FunctionCallArgs.ArgumentSpec>,
result: MutableList<IRCodeChunkBase>

4
codeGenIntermediate/test/TestVmCodeGen.kt
View File

@ -534,8 +534,8 @@ class TestVmCodeGen: FunSpec({
val codegen = VmCodeGen()
val program = PtProgram("test", DummyMemsizer, DummyStringEncoder)
val block = PtBlock("main", false, SourceCode.Generated("test"), PtBlock.Options(), Position.DUMMY)
val romsub = PtAsmSub("routine", PtAsmSub.Address(null, null, 0x5000u), setOf(CpuRegister.Y), emptyList(), emptyList(), false, Position.DUMMY)
block.add(romsub)
val extsub = PtAsmSub("routine", PtAsmSub.Address(null, null, 0x5000u), setOf(CpuRegister.Y), emptyList(), emptyList(), false, Position.DUMMY)
block.add(extsub)
val sub = PtSub("start", emptyList(), null, Position.DUMMY)
val call = PtFunctionCall("main.routine", true, DataType.UNDEFINED, Position.DUMMY)
sub.add(call)

6
compiler/test/TestCompilerOnCharLit.kt
View File

@ -34,7 +34,7 @@ class TestCompilerOnCharLit: FunSpec({
.singleOrNull { it.origin== AssignmentOrigin.VARINIT && it.target.identifier?.targetVarDecl(program) === vardecl }
test("testCharLitAsRomsubArg") {
test("testCharLitAsExtsubArg") {
val platform = Cx16Target()
val result = compileText(platform, false, """
main {
@ -57,7 +57,7 @@ class TestCompilerOnCharLit: FunSpec({
arg.number shouldBe platform.encodeString("\n", Encoding.PETSCII)[0].toDouble()
}
test("testCharVarAsRomsubArg") {
test("testCharVarAsExtsubArg") {
val platform = Cx16Target()
val result = compileText(platform, false, """
main {
@ -92,7 +92,7 @@ class TestCompilerOnCharLit: FunSpec({
initializerValue.number shouldBe platform.encodeString("\n", Encoding.PETSCII)[0].toDouble()
}
test("testCharConstAsRomsubArg") {
test("testCharConstAsExtsubArg") {
val platform = Cx16Target()
val result = compileText(platform, false, """
main {

2
compiler/test/ast/TestSubroutines.kt
View File

@ -170,7 +170,7 @@ main {
(a1_4.children[2] as PtAssignTarget).void shouldBe true
}
test("multi-assign from romsub") {
test("multi-assign from extsub") {
val src="""
main {
sub start() {

2
intermediate/src/prog8/intermediate/IRProgram.kt
View File

@ -147,7 +147,7 @@ class IRProgram(val name: String,
chunk.instructions.forEach {
if(it.opcode in OpcodesThatBranch && it.opcode!=Opcode.JUMPI && it.opcode!=Opcode.RETURN && it.opcode!=Opcode.RETURNR && it.opcode!=Opcode.RETURNI && it.labelSymbol!=null) {
if(it.labelSymbol.startsWith('$') || it.labelSymbol.first().isDigit()) {
// it's a call to an address (romsub most likely)
// it's a call to an address (extsub most likely)
requireNotNull(it.address)
} else {
it.branchTarget = labeledChunks.getValue(it.labelSymbol)