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tweaking multiple assignment targets
This commit is contained in:
Irmen de Jong
parent
fad74a6ae0
commit
c90230d33a
31
compiler/examples/swirl-novm.p8
Normal file
31
compiler/examples/swirl-novm.p8
Normal file
@ -0,0 +1,31 @@
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%import c64utils
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%option enable_floats
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~ main {
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const uword width = 320
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const uword height = 200
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sub start() {
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;vm_gfx_clearscr(0)
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float t
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ubyte color
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while(1) {
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float x = sin(t*1.01) + cos(t*1.1234)
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float y = cos(t) + sin(t*0.03456)
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;vm_gfx_pixel(screenx(x), screeny(y), color//16)
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t += 0.01
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color++
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}
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}
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sub screenx(x: float) -> word {
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return floor(x * flt(width)/4.1) + width // 2
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}
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sub screeny(y: float) -> word {
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return floor(y * flt(height)/4.1) + height // 2
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}
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}
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@ -16,7 +16,12 @@ sub start() {
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byte b1
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;v1=foo() ; @todo fix return type value error see sub
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;v1=foo()
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address =c64.MEMBOT(1, 40000.w) ; ok!
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address =c64.MEMBOT(1, address) ; ok!
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address =c64.MEMBOT(1, memaddr) ; ok!i
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;address =c64.MEMBOT(1, wordarray[1]) ; @todo nice error about loading X register from stack
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A, Y =c64.GETADR() ; ok!
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Y, A =c64.GETADR() ; ok!
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@ -24,7 +29,6 @@ sub start() {
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memaddr = c64flt.GETADRAY() ; ok!
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wordarray[1] = c64flt.GETADRAY() ; ok!
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v1, v2 =c64.GETADR() ; ok!
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address =c64.MEMBOT(1, 0.w) ; ok !
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address =c64.IOBASE() ; ok!
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A = c64.CHRIN() ; ok !
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X = c64.CHRIN() ; ok !
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@ -34,8 +38,8 @@ sub start() {
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}
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sub foo() -> ubyte {
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return 1 ; @todo not ubyte but byte (if sub returns byte)
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sub foo() -> byte {
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return 1 ; @todo fix error: '1' as byte literal (not ubyte)
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}
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@ -304,25 +304,27 @@ class AstChecker(private val namespace: INameScope,
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override fun process(assignment: Assignment): IStatement {
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// assigning from a functioncall COULD return multiple values (from an asm subroutine)
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val stmt = (assignment.value as FunctionCall).target.targetStatement(namespace)
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if(stmt is Subroutine && stmt.returntypes.size>1) {
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if(stmt.isAsmSubroutine) {
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if(stmt.returntypes.size != assignment.targets.size)
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checkResult.add(ExpressionError("number of return values doesn't match number of assignment targets", assignment.value.position))
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else {
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if(assignment.targets.all{it.register!=null}) {
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val returnRegisters = registerSet(stmt.asmReturnvaluesRegisters)
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val targetRegisters = assignment.targets.filter { it.register != null }.map { it.register }.toSet()
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if (returnRegisters != targetRegisters)
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checkResult.add(ExpressionError("asmsub return registers $returnRegisters don't match assignment target registers", assignment.position))
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if(assignment.value is FunctionCall) {
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val stmt = (assignment.value as FunctionCall).target.targetStatement(namespace)
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if (stmt is Subroutine && stmt.returntypes.size > 1) {
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if (stmt.isAsmSubroutine) {
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if (stmt.returntypes.size != assignment.targets.size)
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checkResult.add(ExpressionError("number of return values doesn't match number of assignment targets", assignment.value.position))
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else {
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if (assignment.targets.all { it.register != null }) {
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val returnRegisters = registerSet(stmt.asmReturnvaluesRegisters)
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val targetRegisters = assignment.targets.filter { it.register != null }.map { it.register }.toSet()
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if (returnRegisters != targetRegisters)
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checkResult.add(ExpressionError("asmsub return registers $returnRegisters don't match assignment target registers", assignment.position))
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}
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for (thing in stmt.returntypes.zip(assignment.targets)) {
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if (thing.second.determineDatatype(namespace, heap, assignment) != thing.first)
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checkResult.add(ExpressionError("return type mismatch for target ${thing.second.shortString()}", assignment.value.position))
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}
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}
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for(thing in stmt.returntypes.zip(assignment.targets)) {
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if(thing.second.determineDatatype(namespace, heap, assignment)!=thing.first)
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checkResult.add(ExpressionError("return type mismatch for target ${thing.second.shortString()}", assignment.value.position))
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}
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}
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} else
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checkResult.add(ExpressionError("only asmsub subroutines can return multiple values", assignment.value.position))
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} else
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checkResult.add(ExpressionError("only asmsub subroutines can return multiple values", assignment.value.position))
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}
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}
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var resultingAssignment = assignment
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@ -1,6 +1,8 @@
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package prog8.compiler
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import com.sun.org.apache.xalan.internal.xsltc.cmdline.Compile
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import prog8.ast.*
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import prog8.ast.RegisterOrPair.*
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import prog8.compiler.intermediate.IntermediateProgram
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import prog8.compiler.intermediate.Opcode
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import prog8.compiler.intermediate.Value
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@ -792,11 +794,109 @@ private class StatementTranslator(private val prog: IntermediateProgram,
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private fun translateSubroutineCall(subroutine: Subroutine, arguments: List<IExpression>, callPosition: Position) {
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// evaluate the arguments and assign them into the subroutine's argument variables.
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prog.line(callPosition)
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if(subroutine.asmParameterRegisters.isNotEmpty()) {
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if(subroutine.parameters.size!=subroutine.asmParameterRegisters.size)
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throw CompilerException("no support for mix of register and non-register subroutine arguments")
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// only register arguments (or status-flag bits)
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var carryParam: Boolean? = null
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for(arg in arguments.zip(subroutine.asmParameterRegisters)) {
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if(arg.second.statusflag!=null) {
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if(arg.second.statusflag==Statusflag.Pc)
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carryParam = arg.first.constValue(namespace, heap)!!.asBooleanValue
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else
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throw CompilerException("no support for status flag parameter: ${arg.second.statusflag}")
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} else {
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when (arg.second.registerOrPair!!) {
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A -> {
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val assign = Assignment(listOf(AssignTarget(Register.A, null, null, callPosition)), null, arg.first, callPosition)
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assign.linkParents(subroutine.parent)
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translate(assign)
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}
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X -> {
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// TODO: save X on stack & restore after call
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val assign = Assignment(listOf(AssignTarget(Register.X, null, null, callPosition)), null, arg.first, callPosition)
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assign.linkParents(subroutine.parent)
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translate(assign)
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}
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Y -> {
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val assign = Assignment(listOf(AssignTarget(Register.Y, null, null, callPosition)), null, arg.first, callPosition)
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assign.linkParents(subroutine.parent)
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translate(assign)
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}
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AX -> {
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// TODO: save X on stack & restore after call
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val valueA: IExpression
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val valueX: IExpression
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val paramDt = arg.first.resultingDatatype(namespace, heap)
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if(paramDt==DataType.UBYTE) {
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valueA=arg.first
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valueX=LiteralValue.optimalInteger(0, callPosition)
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val assignA = Assignment(listOf(AssignTarget(Register.A, null, null, callPosition)), null, valueA, callPosition)
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val assignX = Assignment(listOf(AssignTarget(Register.X, null, null, callPosition)), null, valueX, callPosition)
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assignA.linkParents(subroutine.parent)
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assignX.linkParents(subroutine.parent)
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translate(assignA)
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translate(assignX)
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} else if(paramDt==DataType.UWORD) {
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translate(arg.first)
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prog.instr(Opcode.POP_REGAX_WORD)
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} else
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throw CompilerException("don't know how to pass register parameter of type $paramDt")
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}
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AY -> {
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val valueA: IExpression
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val valueY: IExpression
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val paramDt = arg.first.resultingDatatype(namespace, heap)
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if(paramDt==DataType.UBYTE) {
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valueA=arg.first
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valueY=LiteralValue.optimalInteger(0, callPosition)
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val assignA = Assignment(listOf(AssignTarget(Register.A, null, null, callPosition)), null, valueA, callPosition)
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val assignY = Assignment(listOf(AssignTarget(Register.Y, null, null, callPosition)), null, valueY, callPosition)
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assignA.linkParents(subroutine.parent)
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assignY.linkParents(subroutine.parent)
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translate(assignA)
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translate(assignY)
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} else if(paramDt==DataType.UWORD) {
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translate(arg.first)
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prog.instr(Opcode.POP_REGAY_WORD)
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} else
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throw CompilerException("don't know how to pass register parameter of type $paramDt")
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}
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XY -> {
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// TODO: save X on stack & restore after call
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val valueX: IExpression
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val valueY: IExpression
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val paramDt = arg.first.resultingDatatype(namespace, heap)
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if(paramDt==DataType.UBYTE) {
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valueX=arg.first
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valueY=LiteralValue.optimalInteger(0, callPosition)
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val assignX = Assignment(listOf(AssignTarget(Register.X, null, null, callPosition)), null, valueX, callPosition)
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val assignY = Assignment(listOf(AssignTarget(Register.Y, null, null, callPosition)), null, valueY, callPosition)
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assignX.linkParents(subroutine.parent)
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assignY.linkParents(subroutine.parent)
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translate(assignX)
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translate(assignY)
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} else if(paramDt==DataType.UWORD) {
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translate(arg.first)
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prog.instr(Opcode.POP_REGXY_WORD)
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} else
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throw CompilerException("don't know how to pass register parameter of type $paramDt")
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}
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}
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}
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}
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// carry is set last, to avoid clobbering it when loading the other parameters
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when(carryParam) {
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true -> prog.instr(Opcode.SEC)
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false -> prog.instr(Opcode.CLC)
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}
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if(subroutine.asmReturnvaluesRegisters.isNotEmpty()) {
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TODO("call asmsub by loading registers instead")
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} else {
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prog.line(callPosition)
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// only regular (non-register) arguments
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for (arg in arguments.zip(subroutine.parameters)) {
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translate(arg.first)
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val opcode = opcodePopvar(arg.second.type)
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@ -1195,22 +1295,22 @@ private class StatementTranslator(private val prog: IntermediateProgram,
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if(registerOrStatus.statusflag!=null)
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return
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when(registerOrStatus.registerOrPair){
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RegisterOrPair.A -> {
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A -> {
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val assignment = Assignment(listOf(target), null, RegisterExpr(Register.A, target.position), target.position)
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assignment.linkParents(parent)
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translate(assignment)
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}
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RegisterOrPair.X -> {
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X -> {
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val assignment = Assignment(listOf(target), null, RegisterExpr(Register.X, target.position), target.position)
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assignment.linkParents(parent)
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translate(assignment)
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}
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RegisterOrPair.Y -> {
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Y -> {
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val assignment = Assignment(listOf(target), null, RegisterExpr(Register.Y, target.position), target.position)
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assignment.linkParents(parent)
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translate(assignment)
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}
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RegisterOrPair.AX -> {
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AX -> {
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// deal with register pair AX: target = A + X*256
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val targetDt = target.determineDatatype(namespace, heap, parent)
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if(targetDt!=DataType.UWORD)
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@ -1218,7 +1318,7 @@ private class StatementTranslator(private val prog: IntermediateProgram,
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prog.instr(Opcode.PUSH_REGAX_WORD)
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popValueIntoTarget(target, targetDt)
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}
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RegisterOrPair.AY -> {
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AY -> {
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// deal with register pair AY: target = A + Y*256
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val targetDt = target.determineDatatype(namespace, heap, parent)
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if(targetDt!=DataType.UWORD)
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@ -1226,7 +1326,7 @@ private class StatementTranslator(private val prog: IntermediateProgram,
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prog.instr(Opcode.PUSH_REGAY_WORD)
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popValueIntoTarget(target, targetDt)
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}
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RegisterOrPair.XY -> {
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XY -> {
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// deal with register pair XY: target = X + Y*256
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val targetDt = target.determineDatatype(namespace, heap, parent)
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if(targetDt!=DataType.UWORD)
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@ -28,6 +28,9 @@ enum class Opcode {
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POP_VAR_BYTE, // pop (u)byte value into variable
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POP_VAR_WORD, // pop (u)word value into variable
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POP_VAR_FLOAT, // pop float value into variable
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POP_REGAX_WORD, // pop uword from stack into A/X registers
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POP_REGAY_WORD, // pop uword from stack into A/Y registers
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POP_REGXY_WORD, // pop uword from stack into X/Y registers
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// numeric arithmetic
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ADD_UB,
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@ -462,6 +462,11 @@ class AsmGen(val options: CompilationOptions, val program: IntermediateProgram,
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Opcode.PUSH_REGAY_WORD -> {
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" sta ${ESTACK_LO.toHex()},x | tya | sta ${ESTACK_HI.toHex()},x | dex "
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}
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Opcode.POP_REGAX_WORD -> throw AssemblyError("cannot load X register from stack because it's used as the stack pointer itself")
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Opcode.POP_REGXY_WORD -> throw AssemblyError("cannot load X register from stack because it's used as the stack pointer itself")
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Opcode.POP_REGAY_WORD -> {
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" inx | lda ${ESTACK_LO.toHex()},x | ldy ${ESTACK_HI.toHex()},x "
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}
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Opcode.READ_INDEXED_VAR_BYTE -> { // @todo is this correct?
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"""
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@ -2440,13 +2445,6 @@ class AsmGen(val options: CompilationOptions, val program: IntermediateProgram,
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// ---------- some special operations ------------------
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// var word = AY register pair
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AsmPattern(listOf(Opcode.PUSH_REGAY_WORD, Opcode.POP_VAR_WORD)) { segment ->
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"""
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sta ${segment[1].callLabel}
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sty ${segment[1].callLabel}+1
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"""
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},
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// var word = AX register pair
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AsmPattern(listOf(Opcode.PUSH_REGAX_WORD, Opcode.POP_VAR_WORD)) { segment ->
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"""
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@ -2454,6 +2452,13 @@ class AsmGen(val options: CompilationOptions, val program: IntermediateProgram,
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stx ${segment[1].callLabel}+1
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"""
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},
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// var word = AY register pair
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AsmPattern(listOf(Opcode.PUSH_REGAY_WORD, Opcode.POP_VAR_WORD)) { segment ->
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"""
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sta ${segment[1].callLabel}
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sty ${segment[1].callLabel}+1
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"""
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},
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// var word = XY register pair
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AsmPattern(listOf(Opcode.PUSH_REGXY_WORD, Opcode.POP_VAR_WORD)) { segment ->
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"""
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@ -2461,13 +2466,6 @@ class AsmGen(val options: CompilationOptions, val program: IntermediateProgram,
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sty ${segment[1].callLabel}+1
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"""
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},
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// mem word = AY register pair
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AsmPattern(listOf(Opcode.PUSH_REGAY_WORD, Opcode.POP_MEM_WORD)) { segment ->
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"""
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sta ${hexVal(segment[1])}
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sty ${hexValPlusOne(segment[1])}
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"""
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},
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// mem word = AX register pair
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AsmPattern(listOf(Opcode.PUSH_REGAX_WORD, Opcode.POP_MEM_WORD)) { segment ->
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"""
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@ -2475,16 +2473,70 @@ class AsmGen(val options: CompilationOptions, val program: IntermediateProgram,
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stx ${hexValPlusOne(segment[1])}
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"""
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},
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// mem word = AY register pair
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AsmPattern(listOf(Opcode.PUSH_REGAY_WORD, Opcode.POP_MEM_WORD)) { segment ->
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"""
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sta ${hexVal(segment[1])}
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sty ${hexValPlusOne(segment[1])}
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"""
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},
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// mem word = XY register pair
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AsmPattern(listOf(Opcode.PUSH_REGXY_WORD, Opcode.POP_MEM_WORD)) { segment ->
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"""
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stx ${hexVal(segment[1])}
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sty ${hexValPlusOne(segment[1])}
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"""
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},
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// AX register pair = word value
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AsmPattern(listOf(Opcode.PUSH_WORD, Opcode.POP_REGAX_WORD)) { segment ->
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val value = hexVal(segment[0])
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" lda #<$value | ldx #>$value"
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},
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// AY register pair = word value
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AsmPattern(listOf(Opcode.PUSH_WORD, Opcode.POP_REGAY_WORD)) { segment ->
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val value = hexVal(segment[0])
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" lda #<$value | ldy #>$value"
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},
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// XY register pair = word value
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AsmPattern(listOf(Opcode.PUSH_WORD, Opcode.POP_REGXY_WORD)) { segment ->
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val value = hexVal(segment[0])
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" ldx #<$value | ldy #>$value"
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},
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// AX register pair = word var
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AsmPattern(listOf(Opcode.PUSH_VAR_WORD, Opcode.POP_REGAX_WORD)) { segment ->
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" lda #<${segment[0].callLabel} | ldx #>${segment[0].callLabel}"
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},
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// AY register pair = word var
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AsmPattern(listOf(Opcode.PUSH_VAR_WORD, Opcode.POP_REGAY_WORD)) { segment ->
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" lda #<${segment[0].callLabel} | ldy #>${segment[0].callLabel}"
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},
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// XY register pair = word var
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AsmPattern(listOf(Opcode.PUSH_VAR_WORD, Opcode.POP_REGXY_WORD)) { segment ->
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" ldx #<${segment[0].callLabel} | ldy #>${segment[0].callLabel}"
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},
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// AX register pair = mem word
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AsmPattern(
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listOf(Opcode.PUSH_MEM_UW, Opcode.POP_REGAX_WORD),
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listOf(Opcode.PUSH_MEM_W, Opcode.POP_REGAX_WORD)) { segment ->
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" lda ${hexVal(segment[0])} | ldx ${hexValPlusOne(segment[0])}"
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},
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// AY register pair = mem word
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AsmPattern(
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listOf(Opcode.PUSH_MEM_UW, Opcode.POP_REGAY_WORD),
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listOf(Opcode.PUSH_MEM_W, Opcode.POP_REGAY_WORD)) { segment ->
|
||||
" lda ${hexVal(segment[0])} | ldy ${hexValPlusOne(segment[0])}"
|
||||
},
|
||||
// XY register pair = mem word
|
||||
AsmPattern(
|
||||
listOf(Opcode.PUSH_MEM_UW, Opcode.POP_REGXY_WORD),
|
||||
listOf(Opcode.PUSH_MEM_W, Opcode.POP_REGXY_WORD)) { segment ->
|
||||
" ldx ${hexVal(segment[0])} | ldy ${hexValPlusOne(segment[0])}"
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
// // @todo assignment: floatarray[idxbyte] = float
|
||||
// AsmPattern(listOf(Opcode.PUSH_FLOAT, Opcode.PUSH_BYTE, Opcode.WRITE_INDEXED_VAR_FLOAT)) { segment ->
|
||||
// val floatConst = getFloatConst(segment[0].arg!!)
|
||||
|
||||
@ -777,6 +777,21 @@ class StackVm(private var traceOutputFile: String?) {
|
||||
val y=variables["Y"]!!.integerValue()
|
||||
evalstack.push(Value(DataType.UWORD, y*256+x))
|
||||
}
|
||||
Opcode.POP_REGAX_WORD -> {
|
||||
val value=evalstack.pop().integerValue()
|
||||
variables["A"] = Value(DataType.UBYTE, value and 255)
|
||||
variables["X"] = Value(DataType.UBYTE, value shr 8)
|
||||
}
|
||||
Opcode.POP_REGAY_WORD -> {
|
||||
val value=evalstack.pop().integerValue()
|
||||
variables["A"] = Value(DataType.UBYTE, value and 255)
|
||||
variables["Y"] = Value(DataType.UBYTE, value shr 8)
|
||||
}
|
||||
Opcode.POP_REGXY_WORD -> {
|
||||
val value=evalstack.pop().integerValue()
|
||||
variables["X"] = Value(DataType.UBYTE, value and 255)
|
||||
variables["Y"] = Value(DataType.UBYTE, value shr 8)
|
||||
}
|
||||
Opcode.POP_VAR_BYTE -> {
|
||||
val value = evalstack.pop()
|
||||
checkDt(value, DataType.UBYTE, DataType.BYTE)
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user