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vm: added math.mul16_last_upper()

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Irmen de Jong
2023-09-28 03:18:49 +02:00
parent 9b9e6f4af5
commit cd40088636
6 changed files with 104 additions and 67 deletions
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virtualmachine/src/prog8/vm/SysCalls.kt
+6 -1
View File
@@ -53,6 +53,7 @@ SYSCALLS:
43 = CLAMP_FLOAT
44 = ATAN
45 = STR_TO_FLOAT
46 = MUL16_LAST_UPPER
*/
enum class Syscall {
@@ -101,7 +102,8 @@ enum class Syscall {
CLAMP_UWORD,
CLAMP_FLOAT,
ATAN,
STR_TO_FLOAT
STR_TO_FLOAT,
MUL16_LAST_UPPER
;
companion object {
@@ -490,6 +492,9 @@ object SysCalls {
val result = floor(radians/2.0/PI*256.0)
returnValue(callspec.returns!!, result, vm)
}
Syscall.MUL16_LAST_UPPER -> {
returnValue(callspec.returns!!, vm.mul16_last_upper, vm)
}
}
}
}
virtualmachine/src/prog8/vm/VirtualMachine.kt
+25 -12
View File
@@ -47,6 +47,7 @@ class VirtualMachine(irProgram: IRProgram) {
var statusNegative = false
internal var randomGenerator = Random(0xa55a7653)
internal var randomGeneratorFloats = Random(0xc0d3dbad)
internal var mul16_last_upper = 0u
val cx16virtualregsBaseAddress: Int
init {
@@ -1447,10 +1448,14 @@ class VirtualMachine(irProgram: IRProgram) {
private fun plusMinusMultAnyWord(operator: String, reg1: Int, reg2: Int) {
val left = registers.getUW(reg1)
val right = registers.getUW(reg2)
val result = when(operator) {
"+" -> left + right
"-" -> left - right
"*" -> left * right
val result: UInt
when(operator) {
"+" -> result = left + right
"-" -> result = left - right
"*" -> {
result = left.toUInt() * right
mul16_last_upper = result shr 16
}
else -> throw IllegalArgumentException("operator word $operator")
}
registers.setUW(reg1, result.toUShort())
@@ -1458,10 +1463,14 @@ class VirtualMachine(irProgram: IRProgram) {
private fun plusMinusMultConstWord(operator: String, reg1: Int, value: UShort) {
val left = registers.getUW(reg1)
val result = when(operator) {
"+" -> left + value
"-" -> left - value
"*" -> left * value
val result: UInt
when(operator) {
"+" -> result = left + value
"-" -> result = left - value
"*" -> {
result = left.toUInt() * value
mul16_last_upper = result shr 16
}
else -> throw IllegalArgumentException("operator word $operator")
}
registers.setUW(reg1, result.toUShort())
@@ -1470,10 +1479,14 @@ class VirtualMachine(irProgram: IRProgram) {
private fun plusMinusMultAnyWordInplace(operator: String, reg1: Int, address: Int) {
val memvalue = memory.getUW(address)
val operand = registers.getUW(reg1)
val result = when(operator) {
"+" -> memvalue + operand
"-" -> memvalue - operand
"*" -> memvalue * operand
val result: UInt
when(operator) {
"+" -> result = memvalue + operand
"-" -> result = memvalue - operand
"*" -> {
result = memvalue.toUInt() * operand
mul16_last_upper = result shr 16
}
else -> throw IllegalArgumentException("operator word $operator")
}
memory.setUW(address, result.toUShort())