diff --git a/codeGenIntermediate/src/prog8/codegen/intermediate/IRCodeGen.kt b/codeGenIntermediate/src/prog8/codegen/intermediate/IRCodeGen.kt
index de34d1051..caa4204bb 100644
--- a/codeGenIntermediate/src/prog8/codegen/intermediate/IRCodeGen.kt
+++ b/codeGenIntermediate/src/prog8/codegen/intermediate/IRCodeGen.kt
@@ -1500,7 +1500,10 @@ class IRCodeGen(
         val result = mutableListOf<IRCodeChunkBase>()
         val countTr = expressionEval.translateExpression(repeat.count)
         addToResult(result, countTr, countTr.resultReg, -1)
-        addInstr(result, IRInstruction(Opcode.BEQ, irDt, reg1=countTr.resultReg, immediate = 0, labelSymbol = skipRepeatLabel), null)
+        if(constIntValue(repeat.count)==null) {
+            // check if the counter is already zero
+            addInstr(result, IRInstruction(Opcode.BEQ, irDt, reg1=countTr.resultReg, immediate = 0, labelSymbol = skipRepeatLabel), null)
+        }
         result += labelFirstChunk(translateNode(repeat.statements), repeatLabel)
         result += IRCodeChunk(null, null).also {
             it += IRInstruction(Opcode.DEC, irDt, reg1 = countTr.resultReg)
diff --git a/compiler/test/vm/TestCompilerVirtual.kt b/compiler/test/vm/TestCompilerVirtual.kt
index a9c6869c8..cd2d01d70 100644
--- a/compiler/test/vm/TestCompilerVirtual.kt
+++ b/compiler/test/vm/TestCompilerVirtual.kt
@@ -215,7 +215,7 @@ main {
         var result = compileText(target, true, src, writeAssembly = true)!!
         var virtfile = result.compilationOptions.outputDir.resolve(result.compilerAst.name + ".p8ir")
         VmRunner().runAndTestProgram(virtfile.readText()) { vm ->
-            vm.stepCount shouldBe 37
+            vm.stepCount shouldBe 36
         }
 
         result = compileText(target, false, src, writeAssembly = true)!!
@@ -363,4 +363,38 @@ main {
 }"""
         compileText(VMTarget(), false, text, writeAssembly = true) shouldNotBe null
     }
+
+    test("repeat counts") {
+        val src="""
+main {
+    sub start() {
+        cx16.r0 = 0
+        repeat 255 {
+            cx16.r0++
+        }
+        repeat 256 {
+            cx16.r0++
+        }
+        repeat 257 {
+            cx16.r0++
+        }
+        repeat 1023 {
+            cx16.r0++
+        }
+        repeat 1024 {
+            cx16.r0++
+        }
+        repeat 1025 {
+            cx16.r0++
+        }
+    }
+}"""
+        val result = compileText(VMTarget(), false, src, writeAssembly = true)!!
+        val start = result.codegenAst!!.entrypoint()!!
+        start.children.size shouldBe 8
+        val virtfile = result.compilationOptions.outputDir.resolve(result.compilerAst.name + ".p8ir")
+        VmRunner().runAndTestProgram(virtfile.readText()) { vm ->
+            vm.memory.getUW(vm.cx16virtualregsBaseAddress) shouldBe 3840u
+        }
+    }
 })
\ No newline at end of file
diff --git a/examples/test.p8 b/examples/test.p8
index 205947ffa..c7332d7e4 100644
--- a/examples/test.p8
+++ b/examples/test.p8
@@ -3,17 +3,49 @@
 
 main {
     sub start() {
-        byte[] foo = [ 1, 2, ; this comment is ok
-
-; but after this comment there's a syntax error
-
-
-               3 ]
-
-        byte bb
-        for bb in foo {
-            txt.print_b(bb)
-            txt.nl()
+        cx16.r0 = 0
+        repeat 255 {
+            cx16.r0++
         }
+        txt.print_uw(255)
+        txt.spc()
+        txt.print_uw(cx16.r0)
+        txt.nl()
+
+        repeat 256 {
+            cx16.r0++
+        }
+        txt.print_uw(255+256)
+        txt.spc()
+        txt.print_uw(cx16.r0)
+        txt.nl()
+        repeat 257 {
+            cx16.r0++
+        }
+        txt.print_uw(255+256+257)
+        txt.spc()
+        txt.print_uw(cx16.r0)
+        txt.nl()
+        repeat 1023 {
+            cx16.r0++
+        }
+        txt.print_uw(255+256+257+1023)
+        txt.spc()
+        txt.print_uw(cx16.r0)
+        txt.nl()
+        repeat 1024 {
+            cx16.r0++
+        }
+        txt.print_uw(255+256+257+1023+1024)
+        txt.spc()
+        txt.print_uw(cx16.r0)
+        txt.nl()
+        repeat 1025 {
+            cx16.r0++
+        }
+        txt.print_uw(255+256+257+1023+1024+1025)
+        txt.spc()
+        txt.print_uw(cx16.r0)
+        txt.nl()
     }
 }
diff --git a/virtualmachine/src/prog8/vm/VirtualMachine.kt b/virtualmachine/src/prog8/vm/VirtualMachine.kt
index 7076f5071..a1130ee28 100644
--- a/virtualmachine/src/prog8/vm/VirtualMachine.kt
+++ b/virtualmachine/src/prog8/vm/VirtualMachine.kt
@@ -47,7 +47,7 @@ class VirtualMachine(irProgram: IRProgram) {
     var statusNegative = false
     internal var randomGenerator = Random(0xa55a7653)
     internal var randomGeneratorFloats = Random(0xc0d3dbad)
-    private val cx16virtualregsBaseAddress: Int
+    val cx16virtualregsBaseAddress: Int
 
     init {
         program = VmProgramLoader().load(irProgram, memory)