Apple-2-SW/prog8
1
0
Fork 0
mirror of https://github.com/irmen/prog8.git synced 2025-02-25 04:29:36 +00:00
Code Issues Projects Releases Wiki Activity

optimize typecast expr

Browse Source
This commit is contained in:
Irmen de Jong 2023-05-08 03:30:14 +02:00
parent 6c233c6a0a
commit d5d6dd3614
3 changed files with 106 additions and 84 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

178
codeGenCpu6502/src/prog8/codegen/cpu6502/assignment/AssignmentAsmGen.kt
View File

@ -427,6 +427,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
return true return true
} }
} }
// TODO use utility function assignExpressionWordOperandsLeftAYRightScratchW1() etc.
assignExpressionToRegister(expr.left, RegisterOrPair.AY, false) assignExpressionToRegister(expr.left, RegisterOrPair.AY, false)
asmgen.saveRegisterStack(CpuRegister.A, false) asmgen.saveRegisterStack(CpuRegister.A, false)
asmgen.saveRegisterStack(CpuRegister.Y, false) asmgen.saveRegisterStack(CpuRegister.Y, false)
@ -472,6 +473,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
return true return true
} else if(expr.left.type in WordDatatypes && expr.right.type in WordDatatypes && } else if(expr.left.type in WordDatatypes && expr.right.type in WordDatatypes &&
expr.left.isSimple() && expr.right.isSimple()) { expr.left.isSimple() && expr.right.isSimple()) {
// TODO use utility function assignExpressionWordOperandsLeftAYRightScratchW1() etc.
assignExpressionToRegister(expr.left, RegisterOrPair.AY, false) assignExpressionToRegister(expr.left, RegisterOrPair.AY, false)
asmgen.saveRegisterStack(CpuRegister.A, false) asmgen.saveRegisterStack(CpuRegister.A, false)
asmgen.saveRegisterStack(CpuRegister.Y, false) asmgen.saveRegisterStack(CpuRegister.Y, false)
@ -543,6 +545,36 @@ internal class AssignmentAsmGen(private val program: PtProgram,
} }
} }
} else if(dt in WordDatatypes) { } else if(dt in WordDatatypes) {
fun doAddOrSubWordExpr() {
// TODO use utility function assignExpressionWordOperandsLeftAYRightScratchW1() etc.
assignExpressionToRegister(left, RegisterOrPair.AY, dt==DataType.WORD)
asmgen.saveRegisterStack(CpuRegister.A, false)
asmgen.saveRegisterStack(CpuRegister.Y, false)
assignExpressionToVariable(right, "P8ZP_SCRATCH_W2", dt)
asmgen.restoreRegisterStack(CpuRegister.Y, false)
asmgen.restoreRegisterStack(CpuRegister.A, false)
if(expr.operator=="+")
asmgen.out("""
clc
adc P8ZP_SCRATCH_W2
pha
tya
adc P8ZP_SCRATCH_W2+1
tay
pla""")
else
asmgen.out("""
sec
sbc P8ZP_SCRATCH_W2
pha
tya
sbc P8ZP_SCRATCH_W2+1
tay
pla""")
assignRegisterpairWord(assign.target, RegisterOrPair.AY)
}
when (right) { when (right) {
is PtAddressOf -> { is PtAddressOf -> {
assignExpressionToRegister(left, RegisterOrPair.AY, dt==DataType.WORD) assignExpressionToRegister(left, RegisterOrPair.AY, dt==DataType.WORD)
@ -618,51 +650,35 @@ internal class AssignmentAsmGen(private val program: PtProgram,
} }
is PtTypeCast -> { is PtTypeCast -> {
val castedValue = right.value val castedValue = right.value
if(right.type in WordDatatypes && castedValue.type in ByteDatatypes) { if(right.type in WordDatatypes && castedValue.type in ByteDatatypes && castedValue is PtIdentifier) {
if(castedValue is PtIdentifier) { val castedSymname = asmgen.asmVariableName(castedValue)
val castedSymname = asmgen.asmVariableName(castedValue) assignExpressionToRegister(left, RegisterOrPair.AY, dt == DataType.WORD)
assignExpressionToRegister(left, RegisterOrPair.AY, dt==DataType.WORD) if (expr.operator == "+")
if(expr.operator=="+") asmgen.out(
asmgen.out(""" """
clc clc
adc $castedSymname adc $castedSymname
bcc + bcc +
iny iny
+""") +"""
else )
asmgen.out(""" else
sec asmgen.out(
sbc $castedSymname """
bcs + sec
dey sbc $castedSymname
+""") bcs +
assignRegisterpairWord(assign.target, RegisterOrPair.AY) dey
return true +"""
} )
assignRegisterpairWord(assign.target, RegisterOrPair.AY)
return true
} }
doAddOrSubWordExpr()
return true
} }
else -> { else -> {
assignExpressionToVariable(right, "P8ZP_SCRATCH_W2", right.type) doAddOrSubWordExpr()
assignExpressionToRegister(left, RegisterOrPair.AY, left.type==DataType.WORD)
if(expr.operator=="+")
asmgen.out("""
clc
adc P8ZP_SCRATCH_W2
pha
tya
adc P8ZP_SCRATCH_W2+1
tay
pla""")
else
asmgen.out("""
sec
sbc P8ZP_SCRATCH_W2
pha
tya
sbc P8ZP_SCRATCH_W2+1
tay
pla""")
assignRegisterpairWord(assign.target, RegisterOrPair.AY)
return true return true
} }
} }
@ -733,6 +749,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
return true return true
} }
in WordDatatypes -> { in WordDatatypes -> {
// TODO use utility function assignExpressionWordOperandsLeftAYRightScratchW1() etc.
assignExpressionToVariable(expr.left, "P8ZP_SCRATCH_W1", expr.type) assignExpressionToVariable(expr.left, "P8ZP_SCRATCH_W1", expr.type)
assignExpressionToRegister(expr.right, RegisterOrPair.AY, expr.type in SignedDatatypes) assignExpressionToRegister(expr.right, RegisterOrPair.AY, expr.type in SignedDatatypes)
asmgen.out(""" asmgen.out("""
@ -794,6 +811,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
return true return true
} }
DataType.UWORD -> { DataType.UWORD -> {
// TODO use utility function assignExpressionWordOperandsLeftAYRightScratchW1() etc.
assignExpressionToVariable(expr.left, "P8ZP_SCRATCH_W1", DataType.UWORD) assignExpressionToVariable(expr.left, "P8ZP_SCRATCH_W1", DataType.UWORD)
assignExpressionToRegister(expr.right, RegisterOrPair.AY, false) assignExpressionToRegister(expr.right, RegisterOrPair.AY, false)
asmgen.out(" jsr math.divmod_uw_asm") asmgen.out(" jsr math.divmod_uw_asm")
@ -801,6 +819,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
return true return true
} }
DataType.WORD -> { DataType.WORD -> {
// TODO use utility function assignExpressionWordOperandsLeftAYRightScratchW1() etc.
assignExpressionToVariable(expr.left, "P8ZP_SCRATCH_W1", DataType.WORD) assignExpressionToVariable(expr.left, "P8ZP_SCRATCH_W1", DataType.WORD)
assignExpressionToRegister(expr.right, RegisterOrPair.AY, true) assignExpressionToRegister(expr.right, RegisterOrPair.AY, true)
asmgen.out(" jsr math.divmod_w_asm") asmgen.out(" jsr math.divmod_w_asm")
@ -824,6 +843,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
return true return true
} }
DataType.UWORD -> { DataType.UWORD -> {
// TODO use utility function assignExpressionWordOperandsLeftAYRightScratchW1() etc.
assignExpressionToVariable(expr.left, "P8ZP_SCRATCH_W1", DataType.UWORD) assignExpressionToVariable(expr.left, "P8ZP_SCRATCH_W1", DataType.UWORD)
assignExpressionToRegister(expr.right, RegisterOrPair.AY, false) assignExpressionToRegister(expr.right, RegisterOrPair.AY, false)
asmgen.out(" jsr math.divmod_uw_asm") asmgen.out(" jsr math.divmod_uw_asm")
@ -966,35 +986,9 @@ internal class AssignmentAsmGen(private val program: PtProgram,
private fun assignOptimizedComparisonWords(expr: PtBinaryExpression, assign: AsmAssignment): Boolean { private fun assignOptimizedComparisonWords(expr: PtBinaryExpression, assign: AsmAssignment): Boolean {
val signed = expr.left.type == DataType.WORD || expr.right.type == DataType.WORD val signed = expr.left.type == DataType.WORD || expr.right.type == DataType.WORD
fun assignExpressionOperandsLeftScratchRightAY() {
if(expr.right.isSimple()) {
assignExpressionToVariable(expr.left, "P8ZP_SCRATCH_W1", expr.left.type)
assignExpressionToRegister(expr.right, RegisterOrPair.AY, signed)
} else {
assignExpressionToRegister(expr.right, RegisterOrPair.AY, signed)
asmgen.saveRegisterStack(CpuRegister.A, false)
asmgen.saveRegisterStack(CpuRegister.Y, false)
assignExpressionToVariable(expr.left, "P8ZP_SCRATCH_W1", expr.left.type)
asmgen.restoreRegisterStack(CpuRegister.Y, false)
asmgen.restoreRegisterStack(CpuRegister.A, false)
}
}
fun assignExpressionOperandsLeftAYRightScratch() {
if(expr.left.isSimple()) {
assignExpressionToVariable(expr.right, "P8ZP_SCRATCH_W1", expr.left.type)
assignExpressionToRegister(expr.left, RegisterOrPair.AY, signed)
} else {
assignExpressionToRegister(expr.left, RegisterOrPair.AY, signed)
asmgen.saveRegisterStack(CpuRegister.A, false)
asmgen.saveRegisterStack(CpuRegister.Y, false)
assignExpressionToVariable(expr.right, "P8ZP_SCRATCH_W1", expr.left.type)
asmgen.restoreRegisterStack(CpuRegister.Y, false)
asmgen.restoreRegisterStack(CpuRegister.A, false)
}
}
when(expr.operator) { when(expr.operator) {
"==" -> { "==" -> {
assignExpressionOperandsLeftScratchRightAY() assignExpressionWordOperandsLeftScratchW1RightAY(expr)
asmgen.out(""" asmgen.out("""
cmp P8ZP_SCRATCH_W1 cmp P8ZP_SCRATCH_W1
bne + bne +
@ -1006,7 +1000,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
+""") +""")
} }
"!=" -> { "!=" -> {
assignExpressionOperandsLeftScratchRightAY() assignExpressionWordOperandsLeftScratchW1RightAY(expr)
asmgen.out(""" asmgen.out("""
cmp P8ZP_SCRATCH_W1 cmp P8ZP_SCRATCH_W1
bne + bne +
@ -1019,7 +1013,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
} }
"<" -> { "<" -> {
if(signed) { if(signed) {
assignExpressionOperandsLeftAYRightScratch() assignExpressionWordOperandsLeftAYRightScratchW1(expr)
asmgen.out(""" asmgen.out("""
cmp P8ZP_SCRATCH_W1 cmp P8ZP_SCRATCH_W1
tya tya
@ -1033,7 +1027,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
+""") +""")
} }
else { else {
assignExpressionOperandsLeftAYRightScratch() assignExpressionWordOperandsLeftAYRightScratchW1(expr)
asmgen.out(""" asmgen.out("""
cpy P8ZP_SCRATCH_W1+1 cpy P8ZP_SCRATCH_W1+1
bcc + bcc +
@ -1048,7 +1042,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
} }
"<=" -> { "<=" -> {
if(signed) { if(signed) {
assignExpressionOperandsLeftScratchRightAY() assignExpressionWordOperandsLeftScratchW1RightAY(expr)
asmgen.out(""" asmgen.out("""
cmp P8ZP_SCRATCH_W1 cmp P8ZP_SCRATCH_W1
tya tya
@ -1062,7 +1056,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
+""") +""")
} }
else { else {
assignExpressionOperandsLeftScratchRightAY() assignExpressionWordOperandsLeftScratchW1RightAY(expr)
asmgen.out(""" asmgen.out("""
cpy P8ZP_SCRATCH_W1+1 cpy P8ZP_SCRATCH_W1+1
bcc ++ bcc ++
@ -1077,7 +1071,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
} }
">" -> { ">" -> {
if(signed) { if(signed) {
assignExpressionOperandsLeftScratchRightAY() assignExpressionWordOperandsLeftScratchW1RightAY(expr)
asmgen.out(""" asmgen.out("""
cmp P8ZP_SCRATCH_W1 cmp P8ZP_SCRATCH_W1
tya tya
@ -1091,7 +1085,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
+""") +""")
} }
else { else {
assignExpressionOperandsLeftScratchRightAY() assignExpressionWordOperandsLeftScratchW1RightAY(expr)
asmgen.out(""" asmgen.out("""
cpy P8ZP_SCRATCH_W1+1 cpy P8ZP_SCRATCH_W1+1
bcc + bcc +
@ -1106,7 +1100,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
} }
">=" -> { ">=" -> {
if(signed) { if(signed) {
assignExpressionOperandsLeftAYRightScratch() assignExpressionWordOperandsLeftAYRightScratchW1(expr)
asmgen.out(""" asmgen.out("""
cmp P8ZP_SCRATCH_W1 cmp P8ZP_SCRATCH_W1
tya tya
@ -1120,7 +1114,7 @@ internal class AssignmentAsmGen(private val program: PtProgram,
+""") +""")
} }
else { else {
assignExpressionOperandsLeftAYRightScratch() assignExpressionWordOperandsLeftAYRightScratchW1(expr)
asmgen.out(""" asmgen.out("""
cpy P8ZP_SCRATCH_W1+1 cpy P8ZP_SCRATCH_W1+1
bcc ++ bcc ++
@ -1308,6 +1302,34 @@ internal class AssignmentAsmGen(private val program: PtProgram,
} }
} }
private fun assignExpressionWordOperandsLeftScratchW1RightAY(expr: PtBinaryExpression) {
if(expr.right.isSimple()) {
assignExpressionToVariable(expr.left, "P8ZP_SCRATCH_W1", expr.left.type)
assignExpressionToRegister(expr.right, RegisterOrPair.AY, expr.right.type in SignedDatatypes)
} else {
assignExpressionToRegister(expr.right, RegisterOrPair.AY, expr.right.type in SignedDatatypes)
asmgen.saveRegisterStack(CpuRegister.A, false)
asmgen.saveRegisterStack(CpuRegister.Y, false)
assignExpressionToVariable(expr.left, "P8ZP_SCRATCH_W1", expr.left.type)
asmgen.restoreRegisterStack(CpuRegister.Y, false)
asmgen.restoreRegisterStack(CpuRegister.A, false)
}
}
private fun assignExpressionWordOperandsLeftAYRightScratchW1(expr: PtBinaryExpression) {
if(expr.left.isSimple()) {
assignExpressionToVariable(expr.right, "P8ZP_SCRATCH_W1", expr.left.type)
assignExpressionToRegister(expr.left, RegisterOrPair.AY, expr.left.type in SignedDatatypes)
} else {
assignExpressionToRegister(expr.left, RegisterOrPair.AY, expr.left.type in SignedDatatypes)
asmgen.saveRegisterStack(CpuRegister.A, false)
asmgen.saveRegisterStack(CpuRegister.Y, false)
assignExpressionToVariable(expr.right, "P8ZP_SCRATCH_W1", expr.left.type)
asmgen.restoreRegisterStack(CpuRegister.Y, false)
asmgen.restoreRegisterStack(CpuRegister.A, false)
}
}
private fun assignStatusFlagByte(target: AsmAssignTarget, statusflag: Statusflag) { private fun assignStatusFlagByte(target: AsmAssignTarget, statusflag: Statusflag) {
when(statusflag) { when(statusflag) {
Statusflag.Pc -> { Statusflag.Pc -> {

2
docs/source/todo.rst
View File

@ -3,7 +3,9 @@ TODO
For next minor release For next minor release
^^^^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^^^^
- AssignmentAsmGen: TODO use utility function <- do that
- fix crash: uword remainder = seconds_uword % $0003 ==0 - fix crash: uword remainder = seconds_uword % $0003 ==0
- fix VM: void string.copy(".prg", &output_filename + string.length(output_filename))
- try to optimize newexpr a bit more - try to optimize newexpr a bit more
... ...

10
examples/test.p8
View File

@ -1,15 +1,13 @@
%import textio %import textio
%import string
%zeropage basicsafe %zeropage basicsafe
main { main {
word[5] dx = [111,222,333,444,555]
sub start() { sub start() {
uword hit_x = 999 str output_filename = "?????????\x00????????????"
cx16.r0=2 void string.copy(".prg", &output_filename + string.length(output_filename))
uword new_head_x = hit_x + dx[cx16.r0L] as uword txt.print(output_filename)
txt.print_uw(new_head_x)
} }
} }