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gfx_lores now has drawmode_eor() (used by Paint, for example)
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commit
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@ -22,6 +22,7 @@ gfx_lores {
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cx16.VERA_L1_MAPBASE = 0
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cx16.VERA_L1_TILEBASE = 0
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clear_screen(0)
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drawmode_eor(false)
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}
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sub text_mode() {
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@ -31,6 +32,13 @@ gfx_lores {
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cx16.VERA_DC_VIDEO = (cx16.VERA_DC_VIDEO & %11111000) | cx16.r15L
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}
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sub drawmode_eor(bool enabled) {
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; with EOR drawing mode you can have non destructive drawing (2*EOR=restore original)
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eor_mode = enabled
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}
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bool eor_mode
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sub clear_screen(ubyte color) {
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if verafx.available() {
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; use verafx cache writes to quicly clear the screen
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@ -151,27 +159,50 @@ gfx_lores {
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sub horizontal_line(uword xx, ubyte yy, uword length, ubyte color) {
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if length==0
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return
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plot(xx, yy, color) ; set starting position by reusing plot routine
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position(xx, yy)
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; set vera auto-increment to 1 pixel
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cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & %00000111 | (1<<4)
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%asm {{
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lda p8v_color
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ldx p8v_length+1
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beq +
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ldy #0
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- sta cx16.VERA_DATA0
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iny
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bne -
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dex
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bne -
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+ ldy p8v_length ; remaining
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beq +
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- sta cx16.VERA_DATA0
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dey
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bne -
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if eor_mode {
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cx16.vaddr_clone(0) ; also setup port 1, for reading
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%asm {{
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ldx p8v_length+1
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beq +
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ldy #0
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- lda p8v_color
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eor cx16.VERA_DATA1
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sta cx16.VERA_DATA0
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iny
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bne -
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dex
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bne -
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+ ldy p8v_length ; remaining
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beq +
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- lda p8v_color
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eor cx16.VERA_DATA1
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sta cx16.VERA_DATA0
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dey
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bne -
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+
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}}
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}}
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} else {
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%asm {{
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lda p8v_color
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ldx p8v_length+1
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beq +
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ldy #0
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- sta cx16.VERA_DATA0
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iny
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bne -
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dex
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bne -
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+ ldy p8v_length ; remaining
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beq +
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- sta cx16.VERA_DATA0
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dey
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bne -
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+
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}}
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}
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}
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sub safe_horizontal_line(uword xx, ubyte yy, uword length, ubyte color) {
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@ -195,16 +226,30 @@ gfx_lores {
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sub vertical_line(uword xx, ubyte yy, ubyte lheight, ubyte color) {
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if lheight==0
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return
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plot(xx, yy, color) ; set starting position by reusing plot routine
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position(xx, yy)
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; set vera auto-increment to 320 pixel increment (=next line)
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cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & %00000111 | (14<<4)
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%asm {{
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ldy p8v_lheight
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lda p8v_color
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- sta cx16.VERA_DATA0
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dey
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bne -
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}}
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if eor_mode {
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cx16.vaddr_clone(0) ; also setup port 1, for reading
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%asm {{
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ldy p8v_lheight
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beq +
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- lda p8v_color
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eor cx16.VERA_DATA1
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sta cx16.VERA_DATA0
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dey
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bne -
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+
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}}
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} else {
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%asm {{
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ldy p8v_lheight
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lda p8v_color
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- sta cx16.VERA_DATA0
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dey
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bne -
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}}
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}
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}
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sub safe_vertical_line(uword xx, ubyte yy, ubyte lheight, ubyte color) {
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@ -339,9 +384,16 @@ gfx_lores {
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lda #0
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adc times320_hi,y
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sta cx16.VERA_ADDR_H
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lda p8v_eor_mode
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bne +
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lda p8v_color
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sta cx16.VERA_DATA0
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rts
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+ lda p8v_color
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eor cx16.VERA_DATA0
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sta cx16.VERA_DATA0
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rts
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}}
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}
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}
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@ -544,9 +596,16 @@ gfx_lores {
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lda #0
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adc times320_hi,y
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sta cx16.VERA_ADDR_H
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lda p8v_eor_mode
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bne +
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lda cx16.r0L
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sta cx16.VERA_DATA0
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rts
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+ lda cx16.r0L
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eor cx16.VERA_DATA0
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sta cx16.VERA_DATA0
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rts
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}}
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}
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@ -737,8 +737,7 @@ asmsub vaddr(ubyte bank @A, uword address @R0, ubyte addrsel @R1, byte autoIncrO
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; -- setup the VERA's data address register 0 or 1
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; with optional auto increment or decrement of 1.
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; Note that the vaddr_autoincr() and vaddr_autodecr() routines allow to set all possible strides, not just 1.
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; Note also that the actually selected Vera port is reset to 0 on exit, even if you set port #1's address!
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; (you'll have to set ADDRSEL to 1 manually again to use that port)
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; Note also that Vera's addrset is reset to 0 on exit, even if you set port #1's address.
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%asm {{
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pha
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lda cx16.r1
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@ -1,8 +1,6 @@
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TODO
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====
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Add a eor mode to gfx_lores / gfx_hires. Once that's done in gfx_lores, convert Paint to use this module
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Improve register load order in subroutine call args assignments:
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in certain situations, the "wrong" order of evaluation of function call arguments is done which results
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in overwriting registers that already got their value, which requires a lot of stack juggling (especially on plain 6502 cpu!)
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