gfx_lores now has drawmode_eor() (used by Paint, for example)

This commit is contained in:
Irmen de Jong 2024-10-31 01:28:29 +01:00
parent 4ce130dc8b
commit df6a43c7f0
3 changed files with 86 additions and 30 deletions

View File

@ -22,6 +22,7 @@ gfx_lores {
cx16.VERA_L1_MAPBASE = 0
cx16.VERA_L1_TILEBASE = 0
clear_screen(0)
drawmode_eor(false)
}
sub text_mode() {
@ -31,6 +32,13 @@ gfx_lores {
cx16.VERA_DC_VIDEO = (cx16.VERA_DC_VIDEO & %11111000) | cx16.r15L
}
sub drawmode_eor(bool enabled) {
; with EOR drawing mode you can have non destructive drawing (2*EOR=restore original)
eor_mode = enabled
}
bool eor_mode
sub clear_screen(ubyte color) {
if verafx.available() {
; use verafx cache writes to quicly clear the screen
@ -151,27 +159,50 @@ gfx_lores {
sub horizontal_line(uword xx, ubyte yy, uword length, ubyte color) {
if length==0
return
plot(xx, yy, color) ; set starting position by reusing plot routine
position(xx, yy)
; set vera auto-increment to 1 pixel
cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & %00000111 | (1<<4)
%asm {{
lda p8v_color
ldx p8v_length+1
beq +
ldy #0
- sta cx16.VERA_DATA0
iny
bne -
dex
bne -
+ ldy p8v_length ; remaining
beq +
- sta cx16.VERA_DATA0
dey
bne -
if eor_mode {
cx16.vaddr_clone(0) ; also setup port 1, for reading
%asm {{
ldx p8v_length+1
beq +
ldy #0
- lda p8v_color
eor cx16.VERA_DATA1
sta cx16.VERA_DATA0
iny
bne -
dex
bne -
+ ldy p8v_length ; remaining
beq +
- lda p8v_color
eor cx16.VERA_DATA1
sta cx16.VERA_DATA0
dey
bne -
+
}}
}}
} else {
%asm {{
lda p8v_color
ldx p8v_length+1
beq +
ldy #0
- sta cx16.VERA_DATA0
iny
bne -
dex
bne -
+ ldy p8v_length ; remaining
beq +
- sta cx16.VERA_DATA0
dey
bne -
+
}}
}
}
sub safe_horizontal_line(uword xx, ubyte yy, uword length, ubyte color) {
@ -195,16 +226,30 @@ gfx_lores {
sub vertical_line(uword xx, ubyte yy, ubyte lheight, ubyte color) {
if lheight==0
return
plot(xx, yy, color) ; set starting position by reusing plot routine
position(xx, yy)
; set vera auto-increment to 320 pixel increment (=next line)
cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & %00000111 | (14<<4)
%asm {{
ldy p8v_lheight
lda p8v_color
- sta cx16.VERA_DATA0
dey
bne -
}}
if eor_mode {
cx16.vaddr_clone(0) ; also setup port 1, for reading
%asm {{
ldy p8v_lheight
beq +
- lda p8v_color
eor cx16.VERA_DATA1
sta cx16.VERA_DATA0
dey
bne -
+
}}
} else {
%asm {{
ldy p8v_lheight
lda p8v_color
- sta cx16.VERA_DATA0
dey
bne -
}}
}
}
sub safe_vertical_line(uword xx, ubyte yy, ubyte lheight, ubyte color) {
@ -339,9 +384,16 @@ gfx_lores {
lda #0
adc times320_hi,y
sta cx16.VERA_ADDR_H
lda p8v_eor_mode
bne +
lda p8v_color
sta cx16.VERA_DATA0
rts
+ lda p8v_color
eor cx16.VERA_DATA0
sta cx16.VERA_DATA0
rts
}}
}
}
@ -544,9 +596,16 @@ gfx_lores {
lda #0
adc times320_hi,y
sta cx16.VERA_ADDR_H
lda p8v_eor_mode
bne +
lda cx16.r0L
sta cx16.VERA_DATA0
rts
+ lda cx16.r0L
eor cx16.VERA_DATA0
sta cx16.VERA_DATA0
rts
}}
}

View File

@ -737,8 +737,7 @@ asmsub vaddr(ubyte bank @A, uword address @R0, ubyte addrsel @R1, byte autoIncrO
; -- setup the VERA's data address register 0 or 1
; with optional auto increment or decrement of 1.
; Note that the vaddr_autoincr() and vaddr_autodecr() routines allow to set all possible strides, not just 1.
; Note also that the actually selected Vera port is reset to 0 on exit, even if you set port #1's address!
; (you'll have to set ADDRSEL to 1 manually again to use that port)
; Note also that Vera's addrset is reset to 0 on exit, even if you set port #1's address.
%asm {{
pha
lda cx16.r1

View File

@ -1,8 +1,6 @@
TODO
====
Add a eor mode to gfx_lores / gfx_hires. Once that's done in gfx_lores, convert Paint to use this module
Improve register load order in subroutine call args assignments:
in certain situations, the "wrong" order of evaluation of function call arguments is done which results
in overwriting registers that already got their value, which requires a lot of stack juggling (especially on plain 6502 cpu!)