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https://github.com/irmen/prog8.git
synced 2024-11-25 19:31:36 +00:00
removed a problematic asm optimization step that could result in dysfunctional code when writing to I/O addresses
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92276b5769
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@ -17,11 +17,13 @@ class SymbolTable(astProgram: PtProgram) : StNode(astProgram.name, StNodeType.GL
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val flat: Map<String, StNode> by lazy {
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val result = mutableMapOf<String, StNode>()
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fun flatten(node: StNode) {
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result[node.scopedName] = node
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node.children.values.forEach { flatten(it) }
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fun collect(node: StNode) {
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for(child in node.children) {
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result[child.value.scopedName] = child.value
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collect(child.value)
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}
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}
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children.values.forEach { flatten(it) }
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collect(this)
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result
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}
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@ -51,13 +51,6 @@ internal fun optimizeAssembly(lines: MutableList<String>, machine: IMachineDefin
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}
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var linesByFourteen = getLinesBy(lines, 14)
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mods = optimizeSameAssignments(linesByFourteen, machine, symbolTable)
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if(mods.isNotEmpty()) {
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apply(mods, lines)
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linesByFourteen = getLinesBy(lines, 14)
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numberOfOptimizations++
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}
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mods = optimizeSamePointerIndexing(linesByFourteen)
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if(mods.isNotEmpty()) {
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apply(mods, lines)
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@ -128,208 +121,6 @@ private fun optimizeUselessStackByteWrites(linesByFour: List<List<IndexedValue<S
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return mods
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}
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private fun optimizeSameAssignments(
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linesByFourteen: List<List<IndexedValue<String>>>,
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machine: IMachineDefinition,
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symbolTable: SymbolTable
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): List<Modification> {
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// Optimize sequential assignments of the same value to various targets (bytes, words, floats)
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// the float one is the one that requires 2*7=14 lines of code to check...
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// The better place to do this is in the Compiler instead and never create these types of assembly, but hey
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val mods = mutableListOf<Modification>()
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for (lines in linesByFourteen) {
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val first = lines[0].value.trimStart()
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val second = lines[1].value.trimStart()
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val third = lines[2].value.trimStart()
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val fourth = lines[3].value.trimStart()
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val fifth = lines[4].value.trimStart()
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val sixth = lines[5].value.trimStart()
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val seventh = lines[6].value.trimStart()
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val eighth = lines[7].value.trimStart()
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if(first.startsWith("lda") && second.startsWith("ldy") && third.startsWith("sta") && fourth.startsWith("sty") &&
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fifth.startsWith("lda") && sixth.startsWith("ldy") && seventh.startsWith("sta") && eighth.startsWith("sty")) {
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val firstvalue = first.substring(4)
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val secondvalue = second.substring(4)
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val thirdvalue = fifth.substring(4)
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val fourthvalue = sixth.substring(4)
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if(firstvalue==thirdvalue && secondvalue==fourthvalue) {
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// lda/ldy sta/sty twice the same word --> remove second lda/ldy pair (fifth and sixth lines)
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val address1 = getAddressArg(first, symbolTable)
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val address2 = getAddressArg(second, symbolTable)
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if(address1==null || address2==null || (!machine.isIOAddress(address1) && !machine.isIOAddress(address2))) {
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mods.add(Modification(lines[4].index, true, null))
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mods.add(Modification(lines[5].index, true, null))
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}
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}
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}
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if(first.startsWith("lda") && second.startsWith("sta") && third.startsWith("lda") && fourth.startsWith("sta")) {
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val firstvalue = first.substring(4)
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val secondvalue = third.substring(4)
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if(firstvalue==secondvalue) {
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// lda value / sta ? / lda same-value / sta ? -> remove second lda (third line)
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val address = getAddressArg(first, symbolTable)
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if(address==null || !machine.isIOAddress(address))
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mods.add(Modification(lines[2].index, true, null))
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}
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}
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if(first.startsWith("lda") && second.startsWith("ldy") && third.startsWith("sta") && fourth.startsWith("sty") &&
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fifth.startsWith("lda") && sixth.startsWith("ldy") &&
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(seventh.startsWith("jsr floats.copy_float") || seventh.startsWith("jsr cx16flt.copy_float"))) {
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val nineth = lines[8].value.trimStart()
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val tenth = lines[9].value.trimStart()
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val eleventh = lines[10].value.trimStart()
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val twelveth = lines[11].value.trimStart()
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val thirteenth = lines[12].value.trimStart()
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val fourteenth = lines[13].value.trimStart()
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if(eighth.startsWith("lda") && nineth.startsWith("ldy") && tenth.startsWith("sta") && eleventh.startsWith("sty") &&
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twelveth.startsWith("lda") && thirteenth.startsWith("ldy") &&
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(fourteenth.startsWith("jsr floats.copy_float") || fourteenth.startsWith("jsr cx16flt.copy_float"))) {
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if(first.substring(4) == eighth.substring(4) && second.substring(4)==nineth.substring(4)) {
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// identical float init
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mods.add(Modification(lines[7].index, true, null))
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mods.add(Modification(lines[8].index, true, null))
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mods.add(Modification(lines[9].index, true, null))
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mods.add(Modification(lines[10].index, true, null))
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}
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}
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}
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var overlappingMods = false
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/*
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sta prog8_lib.retval_intermX ; remove
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sty prog8_lib.retval_intermY ; remove
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lda prog8_lib.retval_intermX ; remove
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ldy prog8_lib.retval_intermY ; remove
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sta A1
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sty A2
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*/
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if(first.isStoreReg() && second.isStoreReg()
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&& third.isLoadReg() && fourth.isLoadReg()
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&& fifth.isStoreReg() && sixth.isStoreReg()) {
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val reg1 = first[2]
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val reg2 = second[2]
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val reg3 = third[2]
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val reg4 = fourth[2]
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val reg5 = fifth[2]
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val reg6 = sixth[2]
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if (reg1 == reg3 && reg1 == reg5 && reg2 == reg4 && reg2 == reg6) {
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val firstvalue = first.substring(4)
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val secondvalue = second.substring(4)
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val thirdvalue = third.substring(4)
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val fourthvalue = fourth.substring(4)
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if(firstvalue.contains("prog8_lib.retval_interm") && secondvalue.contains("prog8_lib.retval_interm")
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&& firstvalue==thirdvalue && secondvalue==fourthvalue) {
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mods.add(Modification(lines[0].index, true, null))
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mods.add(Modification(lines[1].index, true, null))
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mods.add(Modification(lines[2].index, true, null))
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mods.add(Modification(lines[3].index, true, null))
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overlappingMods = true
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}
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}
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}
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/*
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sta A1
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sty A2
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lda A1 ; can be removed
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ldy A2 ; can be removed if not followed by a branch instuction
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*/
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if(!overlappingMods && first.isStoreReg() && second.isStoreReg()
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&& third.isLoadReg() && fourth.isLoadReg()) {
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val reg1 = first[2]
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val reg2 = second[2]
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val reg3 = third[2]
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val reg4 = fourth[2]
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if(reg1==reg3 && reg2==reg4) {
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val firstvalue = first.substring(4)
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val secondvalue = second.substring(4)
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val thirdvalue = third.substring(4)
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val fourthvalue = fourth.substring(4)
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if(firstvalue==thirdvalue && secondvalue == fourthvalue) {
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val address = getAddressArg(first, symbolTable)
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if(address==null || !machine.isIOAddress(address)) {
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overlappingMods = true
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mods.add(Modification(lines[2].index, true, null))
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if (!fifth.startsWith('b'))
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mods.add(Modification(lines[3].index, true, null))
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}
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}
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}
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}
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/*
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sta A1
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sty A2 ; ... or stz
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lda A1 ; can be removed if not followed by a branch instruction
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*/
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if(!overlappingMods && first.isStoreReg() && second.isStoreRegOrZero()
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&& third.isLoadReg() && !fourth.isBranch()) {
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val reg1 = first[2]
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val reg3 = third[2]
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if(reg1==reg3) {
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val firstvalue = first.substring(4)
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val thirdvalue = third.substring(4)
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if(firstvalue==thirdvalue) {
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val address = getAddressArg(first, symbolTable)
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if(address==null || !machine.isIOAddress(address)) {
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overlappingMods = true
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mods.add(Modification(lines[2].index, true, null))
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}
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}
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}
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}
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/*
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sta A1
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ldy A1 ; make tay
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sta A1 ; remove
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*/
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if(!overlappingMods && first.startsWith("sta") && second.isLoadReg()
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&& third.startsWith("sta") && second.length>4) {
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val firstvalue = first.substring(4)
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val secondvalue = second.substring(4)
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val thirdvalue = third.substring(4)
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if(firstvalue==secondvalue && firstvalue==thirdvalue) {
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val address = getAddressArg(first, symbolTable)
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if(address==null || !machine.isIOAddress(address)) {
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overlappingMods = true
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val reg2 = second[2]
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mods.add(Modification(lines[1].index, false, " ta$reg2"))
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mods.add(Modification(lines[2].index, true, null))
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}
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}
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}
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/*
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sta A ; or stz double store, remove this first one
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sta A ; or stz
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*/
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if(!overlappingMods && first.isStoreRegOrZero() && second.isStoreRegOrZero()) {
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if(first[2]==second[2]) {
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val firstvalue = first.substring(4)
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val secondvalue = second.substring(4)
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if(firstvalue==secondvalue) {
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val address = getAddressArg(first, symbolTable)
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if(address==null || !machine.isIOAddress(address)) {
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overlappingMods = true
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mods.add(Modification(lines[0].index, true, null))
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}
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}
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}
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}
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}
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return mods
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}
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private fun optimizeSamePointerIndexing(linesByFourteen: List<List<IndexedValue<String>>>): List<Modification> {
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// Optimize same pointer indexing where for instance we load and store to the same ptr index in Y
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@ -3,8 +3,6 @@ TODO
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For next minor release
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^^^^^^^^^^^^^^^^^^^^^^
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- IR: animals and textelite take more registers now than with 8.10 (code *is* smaller) see test.p8
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...
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