support custom m68k targets: select the codegen by CpuType and allow a per-target link.ld

codeCore/src/prog8/code/target/Amiga1200Target.kt

@@ -2,6 +2,7 @@ package prog8.code.target
 
 import prog8.code.core.*
 import prog8.code.target.encodings.Encoder
+import prog8.code.target.zp.M68kZeropage
 import java.nio.file.Path
 
 
@@ -88,20 +89,6 @@ class Amiga1200Target: ICompilationTarget,
         address in 0xe80000u..0xefffffu                // Zorro II autoconfig space
 
     override fun initializeMemoryAreas(compilerOptions: CompilationOptions) {
-        zeropage = Amiga1200Zeropage(compilerOptions)
+        zeropage = M68kZeropage(compilerOptions)
     }
 }
-
-
-private class Amiga1200Zeropage(options: CompilationOptions): Zeropage(options) {
-    override val SCRATCH_B1: UInt
-        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
-    override val SCRATCH_REG: UInt
-        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
-    override val SCRATCH_W1: UInt
-        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
-    override val SCRATCH_W2: UInt
-        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
-    override val SCRATCH_PTR: UInt
-        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
-}

codeCore/src/prog8/code/target/Amiga500Target.kt

@@ -2,6 +2,7 @@ package prog8.code.target
 
 import prog8.code.core.*
 import prog8.code.target.encodings.Encoder
+import prog8.code.target.zp.M68kZeropage
 import java.nio.file.Path
 
 
@@ -128,20 +129,6 @@ class Amiga500Target: ICompilationTarget,
         address in 0xe80000u..0xefffffu                // Zorro II autoconfig space
 
     override fun initializeMemoryAreas(compilerOptions: CompilationOptions) {
-        zeropage = AmigaZeropage(compilerOptions)
+        zeropage = M68kZeropage(compilerOptions)
     }
 }
-
-
-private class AmigaZeropage(options: CompilationOptions): Zeropage(options) {
-    override val SCRATCH_B1: UInt
-        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
-    override val SCRATCH_REG: UInt
-        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
-    override val SCRATCH_W1: UInt
-        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
-    override val SCRATCH_W2: UInt
-        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
-    override val SCRATCH_PTR: UInt
-        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
-}

codeCore/src/prog8/code/target/ConfigFileTarget.kt

@@ -4,6 +4,7 @@ import prog8.code.core.*
 import prog8.code.source.ImportFileSystem.expandTilde
 import prog8.code.target.encodings.Encoder
 import prog8.code.target.zp.ConfigurableZeropage
+import prog8.code.target.zp.M68kZeropage
 import java.io.IOException
 import java.nio.file.Path
 import java.util.*
@@ -109,9 +110,12 @@ class ConfigFileTarget(
                 CpuType.valueOf("CPU$cpuString")
             }
             val ioAddresses = parseAddressRanges("io_regions", props)
-            val zpFullsafe = parseAddressRanges("zp_fullsafe", props)
-            val zpKernalsafe = parseAddressRanges("zp_kernalsafe", props)
-            val zpBasicsafe = parseAddressRanges("zp_basicsafe", props)
+            // The m68k has no zero page, so the zeropage settings below don't apply to an m68k
+            // target and are not required in its config file.
+            fun zpSetting(name: String) = if(cpuType.is68k) 0u else props.getInteger(name)
+            val zpFullsafe = if(cpuType.is68k) emptyList() else parseAddressRanges("zp_fullsafe", props)
+            val zpKernalsafe = if(cpuType.is68k) emptyList() else parseAddressRanges("zp_kernalsafe", props)
+            val zpBasicsafe = if(cpuType.is68k) emptyList() else parseAddressRanges("zp_basicsafe", props)
 
             val libraryPath = expandTilde(Path(props.getString("library")))
             if(!libraryPath.isDirectory())
@@ -153,12 +157,12 @@ class ConfigFileTarget(
                 if(assemblerOptionsStr=="") emptyList() else assemblerOptionsStr.split(" "),
                 varsAddress,
                 ioAddresses,
-                props.getInteger("zp_scratch_b1"),
-                props.getInteger("zp_scratch_reg"),
-                props.getInteger("zp_scratch_w1"),
-                props.getInteger("zp_scratch_w2"),
-                props.getInteger("zp_scratch_ptr"),
-                props.getInteger("virtual_registers"),
+                zpSetting("zp_scratch_b1"),
+                zpSetting("zp_scratch_reg"),
+                zpSetting("zp_scratch_w1"),
+                zpSetting("zp_scratch_w2"),
+                zpSetting("zp_scratch_ptr"),
+                zpSetting("virtual_registers"),
                 zpFullsafe,
                 zpKernalsafe,
                 zpBasicsafe,
@@ -185,7 +189,8 @@ class ConfigFileTarget(
     override fun isIOAddress(address: UInt): Boolean = ioAddresses.any { address in it }
 
     override fun initializeMemoryAreas(compilerOptions: CompilationOptions) {
-        zeropage = ConfigurableZeropage(
+        // the m68k has no zero page, so the zp scratch addresses in the config file don't apply there
+        zeropage = if(cpu.is68k) M68kZeropage(compilerOptions) else ConfigurableZeropage(
             zpScratchB1, zpScratchReg, zpScratchW1, zpScratchW2, zpScratchPtr,
             virtualregistersStart,
             zpBasicsafe,

codeCore/src/prog8/code/target/Qemu68kTarget.kt

@@ -2,6 +2,7 @@ package prog8.code.target
 
 import prog8.code.core.*
 import prog8.code.target.encodings.Encoder
+import prog8.code.target.zp.M68kZeropage
 import java.nio.file.Path
 
 /**
@@ -110,16 +111,3 @@ class Qemu68kTarget: ICompilationTarget,
     }
 }
 
-
-private class M68kZeropage(options: CompilationOptions): Zeropage(options) {
-    override val SCRATCH_B1: UInt
-        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
-    override val SCRATCH_REG: UInt
-        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
-    override val SCRATCH_W1: UInt
-        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
-    override val SCRATCH_W2: UInt
-        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
-    override val SCRATCH_PTR: UInt
-        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
-}

codeCore/src/prog8/code/target/zp/M68kZeropage.kt

@@ -0,0 +1,21 @@
+package prog8.code.target.zp
+
+import prog8.code.core.CompilationOptions
+import prog8.code.core.Zeropage
+
+/**
+ * The m68k has no zero page, so there are no scratch locations to hand out.
+ * Any attempt to use one is a bug in the code generator.
+ */
+class M68kZeropage(options: CompilationOptions): Zeropage(options) {
+    override val SCRATCH_B1: UInt
+        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
+    override val SCRATCH_REG: UInt
+        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
+    override val SCRATCH_W1: UInt
+        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
+    override val SCRATCH_W2: UInt
+        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
+    override val SCRATCH_PTR: UInt
+        get() = throw IllegalStateException("m68k shouldn't use this zeropage variable")
+}