Apple-2-SW/prog8
1
0
Fork 0
mirror of https://github.com/irmen/prog8.git synced 2025-01-11 13:29:45 +00:00
Code Issues Projects Releases Wiki Activity

fix break as indirect jump

Browse Source 
fix subroutine param scoped name
This commit is contained in:
Irmen de Jong 2023-02-11 00:30:13 +01:00
parent f83752f43b
commit ed68d604d6
3 changed files with 7 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
codeCore/src/prog8/code/ast/AstStatements.kt
View File

@ -42,7 +42,7 @@ class PtSub(
}
class PtSubroutineParameter(val name: String, val type: DataType, position: Position): PtNode(position) {
class PtSubroutineParameter(name: String, val type: DataType, position: Position): PtNamedNode(name, position) {
override fun printProperties() {
print("$type $name")
}

5
codeGenCpu6502/src/prog8/codegen/cpu6502/AsmGen.kt
View File

@ -1,6 +1,7 @@
package prog8.codegen.cpu6502
import com.github.michaelbull.result.fold
import prog8.code.StNodeType
import prog8.code.SymbolTable
import prog8.code.ast.*
import prog8.code.core.*
@ -823,8 +824,8 @@ $repeatLabel lda $counterVar
ident!=null -> {
// can be a label, or a pointer variable
val symbol = symbolTable.lookup(ident.name)
if(symbol!=null)
Pair(asmSymbolName(ident), true) // indirect
if(symbol?.type in arrayOf(StNodeType.STATICVAR, StNodeType.MEMVAR, StNodeType.CONSTANT))
Pair(asmSymbolName(ident), true) // indirect jump if the jump symbol is a variable
else
Pair(asmSymbolName(ident), false)
}

6
codeGenCpu6502/src/prog8/codegen/cpu6502/ProgramAndVarsGen.kt
View File

@ -312,7 +312,7 @@ internal class ProgramAndVarsGen(
asmgen.out("; simple int arg(s) passed via register(s)")
if(sub.parameters.size==1) {
val dt = sub.parameters[0].type
val target = AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, dt, sub, variableAsmName = sub.parameters[0].name)
val target = AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, dt, sub, variableAsmName = sub.parameters[0].scopedName)
if(dt in ByteDatatypes)
asmgen.assignRegister(RegisterOrPair.A, target)
else
@ -320,8 +320,8 @@ internal class ProgramAndVarsGen(
} else {
require(sub.parameters.size==2)
// 2 simple byte args, first in A, second in Y
val target1 = AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, sub.parameters[0].type, sub, variableAsmName = sub.parameters[0].name)
val target2 = AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, sub.parameters[1].type, sub, variableAsmName = sub.parameters[1].name)
val target1 = AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, sub.parameters[0].type, sub, variableAsmName = sub.parameters[0].scopedName)
val target2 = AsmAssignTarget(TargetStorageKind.VARIABLE, asmgen, sub.parameters[1].type, sub, variableAsmName = sub.parameters[1].scopedName)
asmgen.assignRegister(RegisterOrPair.A, target1)
asmgen.assignRegister(RegisterOrPair.Y, target2)
}