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fix IR loader for romsub calls (calls to an address)
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commit
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@ -1,13 +1,6 @@
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TODO
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TODO
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====
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====
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- fix IR loading of romsubs
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romsub $FFD2 = chrout(ubyte ch @ A)
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sub start() {
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ubyte ch = '\n'
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chrout(ch)
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}
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...
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...
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@ -2,10 +2,9 @@
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%zeropage basicsafe
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%zeropage basicsafe
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main {
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main {
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romsub $FFD2 = chrout(ubyte ch @ A)
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romsub $FFD2 = chrout(ubyte ch @ A)
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sub start() {
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sub start() {
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ubyte ch = '\n'
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ubyte ch = '2'
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chrout(ch)
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chrout(ch)
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}
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}
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}
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}
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@ -138,9 +138,14 @@ class IRProgram(val name: String,
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// link all jump and branching instructions to their target
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// link all jump and branching instructions to their target
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chunk.instructions.forEach {
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chunk.instructions.forEach {
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if(it.opcode in OpcodesThatBranch && it.opcode!=Opcode.RETURN && it.opcode!=Opcode.RETURNR && it.labelSymbol!=null)
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if(it.opcode in OpcodesThatBranch && it.opcode!=Opcode.RETURN && it.opcode!=Opcode.RETURNR && it.labelSymbol!=null) {
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it.branchTarget = labeledChunks.getValue(it.labelSymbol)
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if(it.labelSymbol.startsWith('$') || it.labelSymbol.first().isDigit()) {
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// note: branches with an address value cannot be linked to something...
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// it's a call to an address (romsub most likely)
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require(it.address!=null)
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} else {
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it.branchTarget = labeledChunks.getValue(it.labelSymbol)
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}
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}
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}
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}
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}
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}
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is IRInlineAsmChunk -> {
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is IRInlineAsmChunk -> {
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@ -199,8 +204,10 @@ class IRProgram(val name: String,
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require(!chunk.isIR) { "inline IR-asm should have been converted into regular code chunk"}
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require(!chunk.isIR) { "inline IR-asm should have been converted into regular code chunk"}
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}
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}
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chunk.instructions.forEach {
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chunk.instructions.forEach {
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if(it.labelSymbol!=null && it.opcode in OpcodesThatBranch)
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if(it.labelSymbol!=null && it.opcode in OpcodesThatBranch) {
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require(it.branchTarget != null) { "branching instruction to label should have branchTarget set" }
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if(!it.labelSymbol.startsWith('$') && !it.labelSymbol.first().isDigit())
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require(it.branchTarget != null) { "branching instruction to label should have branchTarget set" }
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}
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}
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}
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}
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}
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}
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}
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@ -131,11 +131,11 @@ fun parseIRCodeLine(line: String): Either<IRInstruction, String> {
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}
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}
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if(format.sysCall) {
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if(format.sysCall) {
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val call = parseCall(rest)
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val call = parseCall(rest)
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val syscallNum = parseIRValue(call.target).toInt()
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val syscallNum = call.address ?: parseIRValue(call.target ?: "").toInt()
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return left(IRInstruction(Opcode.SYSCALL, immediate = syscallNum, fcallArgs = FunctionCallArgs(call.args, call.returns)))
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return left(IRInstruction(Opcode.SYSCALL, immediate = syscallNum, fcallArgs = FunctionCallArgs(call.args, call.returns)))
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} else if (format.funcCall) {
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} else if (format.funcCall) {
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val call = parseCall(rest)
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val call = parseCall(rest)
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return left(IRInstruction(Opcode.CALL, labelSymbol = call.target, fcallArgs = FunctionCallArgs(call.args, call.returns)))
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return left(IRInstruction(Opcode.CALL, address = call.address, labelSymbol = call.target, fcallArgs = FunctionCallArgs(call.args, call.returns)))
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} else {
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} else {
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operands.forEach { oper ->
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operands.forEach { oper ->
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if (oper[0] == '&')
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if (oper[0] == '&')
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@ -222,7 +222,8 @@ fun parseIRCodeLine(line: String): Either<IRInstruction, String> {
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}
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}
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private class ParsedCall(
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private class ParsedCall(
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val target: String,
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val target: String?,
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val address: Int?,
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val args: List<FunctionCallArgs.ArgumentSpec>,
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val args: List<FunctionCallArgs.ArgumentSpec>,
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val returns: FunctionCallArgs.RegSpec?
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val returns: FunctionCallArgs.RegSpec?
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)
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)
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@ -266,8 +267,17 @@ private fun parseCall(rest: String): ParsedCall {
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val args = match.groups["arglist"]!!.value
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val args = match.groups["arglist"]!!.value
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val arguments = parseArgs(args)
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val arguments = parseArgs(args)
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val returns = match.groups["returns"]?.value
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val returns = match.groups["returns"]?.value
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var address: Int? = null
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var actualTarget: String? = target
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if(target.startsWith('$') || target[0].isDigit()) {
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address = parseIRValue(target).toInt()
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actualTarget = null
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}
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return ParsedCall(
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return ParsedCall(
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target,
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actualTarget,
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address,
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arguments,
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arguments,
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if(returns==null) null else parseRegspec(returns)
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if(returns==null) null else parseRegspec(returns)
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)
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)
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@ -179,7 +179,7 @@ class VmProgramLoader {
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if(arg.address!=null)
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if(arg.address!=null)
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arg
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arg
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else {
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else {
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val address = variableAddresses.getValue(ins.labelSymbol + "." + arg.name)
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val address = ins.address ?: variableAddresses.getValue(ins.labelSymbol + "." + arg.name)
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FunctionCallArgs.ArgumentSpec(arg.name, address, arg.reg)
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FunctionCallArgs.ArgumentSpec(arg.name, address, arg.reg)
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}
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}
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}
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}
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