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removing redundant compares
This commit is contained in:
Irmen de Jong
parent
09d506194f
commit
ff8de8e42d
@ -17,6 +17,8 @@ internal class ExpressionCodeResult(val chunks: IRCodeChunks, val dt: IRDataType
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if(resultReg!=-1) require(resultFpReg==-1)
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if(resultFpReg!=-1) require(resultReg==-1)
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}
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fun lastInstruction() = chunks.last().instructions.last()
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}
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internal class ExpressionGen(private val codeGen: IRCodeGen) {
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@ -470,7 +470,6 @@ class IRCodeGen(
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addInstr(result, IRInstruction(Opcode.LOAD, IRDataType.BYTE, reg1 = indexReg, immediate = 0), null)
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result += IRCodeChunk(loopLabel, null).also {
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it += IRInstruction(Opcode.LOADX, IRDataType.BYTE, reg1 = tmpReg, reg2 = indexReg, labelSymbol = iterable.name)
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it += IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1 = tmpReg, immediate = 0)
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it += IRInstruction(Opcode.BSTEQ, labelSymbol = endLabel)
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it += IRInstruction(Opcode.STOREM, IRDataType.BYTE, reg1 = tmpReg, labelSymbol = loopvarSymbol)
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}
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@ -499,7 +498,10 @@ class IRCodeGen(
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result += translateNode(forLoop.statements)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.INC, IRDataType.BYTE, reg1=indexReg)
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it += IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1=indexReg, immediate = if(iterableLength==256) 0 else iterableLength)
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if(iterableLength!=256) {
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// for length 256, the compare is actually against 0, which doesn't require a separate CMP instruction
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it += IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1=indexReg, immediate = iterableLength)
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}
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it += IRInstruction(Opcode.BSTNE, labelSymbol = loopLabel)
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}
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}
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@ -516,7 +518,10 @@ class IRCodeGen(
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result += translateNode(forLoop.statements)
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result += addConstReg(IRDataType.BYTE, indexReg, elementSize)
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1=indexReg, immediate = if(lengthBytes==256) 0 else lengthBytes)
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if(lengthBytes!=256) {
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// for length 256, the compare is actually against 0, which doesn't require a separate CMP instruction
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it += IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1=indexReg, immediate = lengthBytes)
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}
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it += IRInstruction(Opcode.BSTNE, labelSymbol = loopLabel)
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}
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}
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@ -976,7 +981,6 @@ class IRCodeGen(
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fpReg2 = rightTr.resultFpReg
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)
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when(condition.operator) {
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// TODO: the converted list of operators
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"==" -> {
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it += IRInstruction(Opcode.CMPI, IRDataType.BYTE, reg1 = compResultReg, immediate = 0)
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it += branchInstr(goto, Opcode.BSTEQ)
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@ -986,7 +990,6 @@ class IRCodeGen(
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it += branchInstr(goto, Opcode.BSTNE)
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}
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else -> {
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// TODO: the old list of operators, still to be converted
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val gotoOpcode = when (condition.operator) {
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"<" -> Opcode.BLTS
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">" -> Opcode.BGTS
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@ -1016,7 +1019,7 @@ class IRCodeGen(
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}
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}
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// TODO use this everywhere
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// TODO use this everywhere a PtJump is used
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private fun branchInstr(goto: PtJump, branchOpcode: Opcode) = if (goto.address != null)
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IRInstruction(branchOpcode, address = goto.address?.toInt())
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else if (goto.generatedLabel != null)
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@ -1034,18 +1037,19 @@ class IRCodeGen(
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val condition = ifElse.condition as PtBinaryExpression
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val leftTr = expressionEval.translateExpression(condition.left)
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addToResult(result, leftTr, leftTr.resultReg, -1)
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val requireCompareZero = leftTr.lastInstruction().opcode !in OpcodesThatSetStatusbits
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when(condition.operator) {
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// TODO: converted list of operators
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"==" -> {
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addInstr(result, IRInstruction(Opcode.CMPI, irDtLeft, reg1 = leftTr.resultReg, immediate = 0), null)
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if(requireCompareZero)
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addInstr(result, IRInstruction(Opcode.CMPI, irDtLeft, reg1 = leftTr.resultReg, immediate = 0), null)
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addInstr(result, branchInstr(goto, Opcode.BSTEQ), null)
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}
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"!=" -> {
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addInstr(result, IRInstruction(Opcode.CMPI, irDtLeft, reg1 = leftTr.resultReg, immediate = 0), null)
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if(requireCompareZero)
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addInstr(result, IRInstruction(Opcode.CMPI, irDtLeft, reg1 = leftTr.resultReg, immediate = 0), null)
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addInstr(result, branchInstr(goto, Opcode.BSTNE), null)
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}
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else -> {
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// TODO: to-be converted operators
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val opcode = when (condition.operator) {
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"<" -> if (signed) Opcode.BLTS else Opcode.BLT
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">" -> if (signed) Opcode.BGTS else Opcode.BGT
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@ -1072,12 +1076,13 @@ class IRCodeGen(
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) {
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val condition = ifElse.condition as? PtBinaryExpression
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if(condition==null) {
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val tr = expressionEval.translateExpression(ifElse.condition)
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result += tr.chunks
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.CMPI, irDtLeft, reg1 = tr.resultReg, immediate = 0)
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it += branchInstr(goto, Opcode.BSTNE)
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}
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throw AssemblyError("expected condition")
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// val tr = expressionEval.translateExpression(ifElse.condition)
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// result += tr.chunks
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// result += IRCodeChunk(null, null).also {
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// it += IRInstruction(Opcode.CMPI, irDtLeft, reg1 = tr.resultReg, immediate = 0) // was redundant CMP most likely
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// it += branchInstr(goto, Opcode.BSTNE)
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// }
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} else {
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val leftTr = expressionEval.translateExpression(condition.left)
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addToResult(result, leftTr, leftTr.resultReg, -1)
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@ -1085,7 +1090,6 @@ class IRCodeGen(
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if(number!=null) {
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val firstReg = leftTr.resultReg
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when(condition.operator) {
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// TODO: the converted operators
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"==" -> {
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addInstr(result, IRInstruction(Opcode.CMPI, irDtLeft, reg1 = firstReg, immediate = number), null)
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addInstr(result, branchInstr(goto, Opcode.BSTEQ), null)
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@ -1095,7 +1099,6 @@ class IRCodeGen(
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addInstr(result, branchInstr(goto, Opcode.BSTNE), null)
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}
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else -> {
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// TODO: to-be converted operators
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val opcode = when (condition.operator) {
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"<" -> if(signed) Opcode.BLTS else Opcode.BLT
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">" -> if(signed) Opcode.BGTS else Opcode.BGT
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@ -1267,33 +1270,6 @@ class IRCodeGen(
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val condition = ifElse.condition as? PtBinaryExpression
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if(condition==null) {
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throw AssemblyError("if-else condition is not a binaryexpression, should have been converted?")
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// if(irDtLeft==IRDataType.FLOAT)
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// throw AssemblyError("condition value should not be float")
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// val tr = expressionEval.translateExpression(ifElse.condition)
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// result += tr.chunks
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// if(ifElse.elseScope.children.isNotEmpty()) {
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// val elseLabel = createLabelName()
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// result += IRCodeChunk(null, null).also {
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// it += IRInstruction(Opcode.CMPI, irDtLeft, reg1=tr.resultReg, immediate = 0)
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// it += IRInstruction(Opcode.BSTEQ, labelSymbol = elseLabel)
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// TODO("test this")
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// }
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// result += translateNode(ifElse.ifScope)
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// val afterIfLabel = createLabelName()
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// addInstr(result, IRInstruction(Opcode.JUMP, labelSymbol = afterIfLabel), null)
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// result += labelFirstChunk(translateNode(ifElse.elseScope), elseLabel)
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// result += IRCodeChunk(afterIfLabel, null)
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// } else {
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// val afterIfLabel = createLabelName()
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// result += IRCodeChunk(null, null).also {
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// it += IRInstruction(Opcode.CMPI, irDtLeft, reg1=tr.resultReg, immediate = 0)
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// it += IRInstruction(Opcode.BSTEQ, labelSymbol = afterIfLabel)
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// TODO("test this")
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// }
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// result += translateNode(ifElse.ifScope)
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// result += IRCodeChunk(afterIfLabel, null)
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// }
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// return result
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} else {
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if (irDtLeft == IRDataType.FLOAT) {
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val leftTr = expressionEval.translateExpression(condition.left)
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@ -1641,10 +1617,7 @@ class IRCodeGen(
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addToResult(result, countTr, countTr.resultReg, -1)
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if(constIntValue(repeat.count)==null) {
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// check if the counter is already zero
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result += IRCodeChunk(null, null).also {
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it += IRInstruction(Opcode.CMPI, irDt, reg1=countTr.resultReg, immediate = 0)
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it += IRInstruction(Opcode.BSTEQ, labelSymbol = skipRepeatLabel)
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}
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addInstr(result, IRInstruction(Opcode.BSTEQ, labelSymbol = skipRepeatLabel), null)
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}
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result += labelFirstChunk(translateNode(repeat.statements), repeatLabel)
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result += IRCodeChunk(null, null).also {
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@ -2,7 +2,7 @@
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TODO
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====
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- IR: reduce amount of CMP/CMPI after instructions that set the status bits correctly (LOADs? INC? Bitwise operations, etc), but only after setting the status bits is verified!
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- IR: use branchInstr() everywhere a PtGoto is used in IRCodeGen
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- [on branch: shortcircuit] investigate McCarthy evaluation again? this may also reduce code size perhaps for things like if a>4 or a<2 ....
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...
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@ -1,19 +1,12 @@
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%zeropage basicsafe
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%import textio
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txt {
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%option merge
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sub println(uword string) {
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txt.print(string)
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main {
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sub start() {
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ubyte xx=12
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if xx==12
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txt.print("gottem")
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txt.nl()
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}
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}
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main {
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sub start() {
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txt.lowercase()
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txt.println("Hello, world1")
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txt.println("Hello, world2")
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txt.println("Hello, world3")
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}
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}
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@ -437,6 +437,7 @@ val OpcodesThatSetStatusbitsButNotCarry = setOf(
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Opcode.DEC,
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Opcode.DECM
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)
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val OpcodesThatSetStatusbits = OpcodesThatSetStatusbitsButNotCarry + OpcodesThatSetStatusbitsIncludingCarry
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enum class IRDataType {
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