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527 lines
14 KiB
Lua
527 lines
14 KiB
Lua
; Prog8 definitions for the Commodore PET
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; Including memory registers, I/O registers, Basic and Kernal subroutines.
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; see: https://www.pagetable.com/?p=926 , http://www.zimmers.net/cbmpics/cbm/PETx/petmem.txt
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%option no_symbol_prefixing
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cbm {
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; Commodore (CBM) common variables, vectors and kernal routines
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&ubyte TIME_HI = $8d ; software jiffy clock, hi byte
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&ubyte TIME_MID = $8e ; .. mid byte
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&ubyte TIME_LO = $8f ; .. lo byte. Updated by IRQ every 1/60 sec
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&ubyte STATUS = $96 ; kernal status variable for I/O
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&uword CINV = $0090 ; IRQ vector (in ram)
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&uword CBINV = $0092 ; BRK vector (in ram)
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&uword NMINV = $0094 ; NMI vector (in ram)
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&uword NMI_VEC = $FFFA ; 6502 nmi vector, determined by the kernal if banked in
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&uword RESET_VEC = $FFFC ; 6502 reset vector, determined by the kernal if banked in
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&uword IRQ_VEC = $FFFE ; 6502 interrupt vector, determined by the kernal if banked in
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; the default addresses for the character screen chars and colors
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const uword Screen = $8000 ; to have this as an array[40*25] the compiler would have to support array size > 255
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romsub $FFC6 = CHKIN(ubyte logical @ X) clobbers(A,X) -> bool @Pc ; define an input channel
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romsub $FFC9 = CHKOUT(ubyte logical @ X) clobbers(A,X) ; define an output channel
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romsub $FFCC = CLRCHN() clobbers(A,X) ; restore default devices
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romsub $FFCF = CHRIN() clobbers(X, Y) -> ubyte @ A ; input a character (for keyboard, read a whole line from the screen) A=byte read.
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romsub $FFD2 = CHROUT(ubyte character @ A) ; output a character
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romsub $FFE1 = STOP() clobbers(X) -> bool @ Pz, ubyte @ A ; check the STOP key (and some others in A)
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romsub $FFE4 = GETIN() clobbers(X,Y) -> bool @Pc, ubyte @ A ; get a character
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romsub $FFE7 = CLALL() clobbers(A,X) ; close all files
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romsub $FFEA = UDTIM() clobbers(A,X) ; update the software clock
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asmsub STOP2() clobbers(X) -> ubyte @A {
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; -- check if STOP key was pressed, returns true if so. More convenient to use than STOP() because that only sets the carry status flag.
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%asm {{
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jsr cbm.STOP
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beq +
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lda #0
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rts
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+ lda #1
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rts
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}}
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}
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asmsub SETTIM(ubyte low @ A, ubyte middle @ X, ubyte high @ Y) {
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; PET stub to set the software clock
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%asm {{
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sty TIME_HI
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stx TIME_MID
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sta TIME_LO
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rts
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}}
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}
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asmsub RDTIM() -> ubyte @ A, ubyte @ X, ubyte @ Y {
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; PET stub to read the software clock (A=lo,X=mid,Y=high)
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%asm {{
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ldy TIME_HI
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ldx TIME_MID
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lda TIME_LO
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rts
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}}
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}
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asmsub RDTIM16() clobbers(X) -> uword @AY {
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; -- like RDTIM() but only returning the lower 16 bits in AY for convenience
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%asm {{
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lda TIME_LO
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ldy TIME_MID
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rts
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}}
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}
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}
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sys {
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; ------- lowlevel system routines --------
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const ubyte target = 32 ; compilation target specifier. 64 = C64, 128 = C128, 16 = CommanderX16, 32=PET
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asmsub init_system() {
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; Initializes the machine to a sane starting state.
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; Called automatically by the loader program logic.
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; Uppercase charset is activated.
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%asm {{
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sei
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cld
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lda #142
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jsr cbm.CHROUT ; uppercase
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lda #147
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jsr cbm.CHROUT ; clear screen
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clc
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clv
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cli
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rts
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}}
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}
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asmsub init_system_phase2() {
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%asm {{
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rts ; no phase 2 steps on the PET
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}}
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}
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asmsub cleanup_at_exit() {
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; executed when the main subroutine does rts
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%asm {{
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rts
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}}
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}
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asmsub reset_system() {
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; Soft-reset the system back to initial power-on Basic prompt.
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%asm {{
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sei
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jmp (cbm.RESET_VEC)
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}}
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}
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asmsub waitvsync() clobbers(A) {
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; --- busy wait till the next vsync has occurred (approximately), without depending on custom irq handling.
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; Note: on PET this simply waits until the next jiffy clock update, I don't know if a true vsync is possible there
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%asm {{
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lda #1
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ldy #0
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jmp wait
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}}
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}
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asmsub wait(uword jiffies @AY) {
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; --- wait approximately the given number of jiffies (1/60th seconds) (N or N+1)
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; note: the system irq handler has to be active for this to work as it depends on the system jiffy clock
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%asm {{
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stx P8ZP_SCRATCH_B1
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sta P8ZP_SCRATCH_W1
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sty P8ZP_SCRATCH_W1+1
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_loop lda P8ZP_SCRATCH_W1
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ora P8ZP_SCRATCH_W1+1
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bne +
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ldx P8ZP_SCRATCH_B1
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rts
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+ lda cbm.TIME_LO
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sta P8ZP_SCRATCH_B1
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- lda cbm.TIME_LO
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cmp P8ZP_SCRATCH_B1
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beq -
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lda P8ZP_SCRATCH_W1
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bne +
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dec P8ZP_SCRATCH_W1+1
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+ dec P8ZP_SCRATCH_W1
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jmp _loop
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}}
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}
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asmsub internal_stringcopy(uword source @R0, uword target @AY) clobbers (A,Y) {
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; Called when the compiler wants to assign a string value to another string.
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%asm {{
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sta P8ZP_SCRATCH_W1
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sty P8ZP_SCRATCH_W1+1
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lda cx16.r0
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ldy cx16.r0+1
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jmp prog8_lib.strcpy
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}}
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}
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asmsub memcopy(uword source @R0, uword target @R1, uword count @AY) clobbers(A,X,Y) {
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; note: only works for NON-OVERLAPPING memory regions!
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; note: can't be inlined because is called from asm as well
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%asm {{
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ldx cx16.r0
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stx P8ZP_SCRATCH_W1 ; source in ZP
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ldx cx16.r0+1
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stx P8ZP_SCRATCH_W1+1
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ldx cx16.r1
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stx P8ZP_SCRATCH_W2 ; target in ZP
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ldx cx16.r1+1
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stx P8ZP_SCRATCH_W2+1
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cpy #0
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bne _longcopy
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; copy <= 255 bytes
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tay
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bne _copyshort
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rts ; nothing to copy
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_copyshort
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; decrease source and target pointers so we can simply index by Y
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lda P8ZP_SCRATCH_W1
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bne +
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dec P8ZP_SCRATCH_W1+1
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+ dec P8ZP_SCRATCH_W1
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lda P8ZP_SCRATCH_W2
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bne +
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dec P8ZP_SCRATCH_W2+1
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+ dec P8ZP_SCRATCH_W2
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- lda (P8ZP_SCRATCH_W1),y
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sta (P8ZP_SCRATCH_W2),y
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dey
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bne -
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rts
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_longcopy
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sta P8ZP_SCRATCH_B1 ; lsb(count) = remainder in last page
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tya
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tax ; x = num pages (1+)
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ldy #0
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- lda (P8ZP_SCRATCH_W1),y
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sta (P8ZP_SCRATCH_W2),y
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iny
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bne -
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inc P8ZP_SCRATCH_W1+1
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inc P8ZP_SCRATCH_W2+1
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dex
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bne -
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ldy P8ZP_SCRATCH_B1
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bne _copyshort
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rts
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}}
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}
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asmsub memset(uword mem @R0, uword numbytes @R1, ubyte value @A) clobbers(A,X,Y) {
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%asm {{
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ldy cx16.r0
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sty P8ZP_SCRATCH_W1
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ldy cx16.r0+1
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sty P8ZP_SCRATCH_W1+1
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ldx cx16.r1
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ldy cx16.r1+1
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jmp prog8_lib.memset
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}}
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}
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asmsub memsetw(uword mem @R0, uword numwords @R1, uword value @AY) clobbers(A,X,Y) {
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%asm {{
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ldx cx16.r0
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stx P8ZP_SCRATCH_W1
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ldx cx16.r0+1
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stx P8ZP_SCRATCH_W1+1
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ldx cx16.r1
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stx P8ZP_SCRATCH_W2
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ldx cx16.r1+1
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stx P8ZP_SCRATCH_W2+1
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jmp prog8_lib.memsetw
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}}
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}
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inline asmsub read_flags() -> ubyte @A {
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%asm {{
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php
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pla
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}}
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}
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inline asmsub clear_carry() {
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%asm {{
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clc
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}}
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}
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inline asmsub set_carry() {
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%asm {{
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sec
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}}
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}
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inline asmsub clear_irqd() {
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%asm {{
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cli
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}}
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}
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inline asmsub set_irqd() {
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%asm {{
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sei
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}}
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}
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inline asmsub irqsafe_set_irqd() {
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%asm {{
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php
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sei
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}}
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}
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inline asmsub irqsafe_clear_irqd() {
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%asm {{
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plp
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}}
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}
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sub disable_caseswitch() {
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; PET doesn't have a key to swap case, so no-op
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}
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sub enable_caseswitch() {
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; PET doesn't have a key to swap case, so no-op
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}
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asmsub save_prog8_internals() {
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%asm {{
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lda P8ZP_SCRATCH_B1
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sta save_SCRATCH_ZPB1
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lda P8ZP_SCRATCH_REG
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sta save_SCRATCH_ZPREG
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lda P8ZP_SCRATCH_W1
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sta save_SCRATCH_ZPWORD1
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lda P8ZP_SCRATCH_W1+1
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sta save_SCRATCH_ZPWORD1+1
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lda P8ZP_SCRATCH_W2
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sta save_SCRATCH_ZPWORD2
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lda P8ZP_SCRATCH_W2+1
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sta save_SCRATCH_ZPWORD2+1
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rts
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save_SCRATCH_ZPB1 .byte 0
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save_SCRATCH_ZPREG .byte 0
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save_SCRATCH_ZPWORD1 .word 0
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save_SCRATCH_ZPWORD2 .word 0
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}}
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}
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asmsub restore_prog8_internals() {
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%asm {{
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lda save_prog8_internals.save_SCRATCH_ZPB1
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sta P8ZP_SCRATCH_B1
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lda save_prog8_internals.save_SCRATCH_ZPREG
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sta P8ZP_SCRATCH_REG
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lda save_prog8_internals.save_SCRATCH_ZPWORD1
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sta P8ZP_SCRATCH_W1
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lda save_prog8_internals.save_SCRATCH_ZPWORD1+1
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sta P8ZP_SCRATCH_W1+1
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lda save_prog8_internals.save_SCRATCH_ZPWORD2
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sta P8ZP_SCRATCH_W2
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lda save_prog8_internals.save_SCRATCH_ZPWORD2+1
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sta P8ZP_SCRATCH_W2+1
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rts
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}}
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}
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inline asmsub exit(ubyte returnvalue @A) {
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; -- immediately exit the program with a return code in the A register
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%asm {{
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ldx prog8_lib.orig_stackpointer
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txs
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rts ; return to original caller
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}}
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}
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inline asmsub progend() -> uword @AY {
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%asm {{
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lda #<prog8_program_end
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ldy #>prog8_program_end
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}}
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}
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inline asmsub push(ubyte value @A) {
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%asm {{
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pha
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}}
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}
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inline asmsub pushw(uword value @AY) {
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%asm {{
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pha
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tya
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pha
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}}
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}
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inline asmsub pop() -> ubyte @A {
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%asm {{
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pla
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}}
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}
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inline asmsub popw() -> uword @AY {
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%asm {{
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pla
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tay
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pla
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}}
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}
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}
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cx16 {
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; the sixteen virtual 16-bit registers that the CX16 has defined in the zeropage
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; they are simulated on the PET as well but their location in memory is different
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; (because there's no room for them in the zeropage)
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; we select the top page of RAM (assume 32Kb)
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&uword r0 = $7fe0
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&uword r1 = $7fe2
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&uword r2 = $7fe4
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&uword r3 = $7fe6
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&uword r4 = $7fe8
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&uword r5 = $7fea
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&uword r6 = $7fec
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&uword r7 = $7fee
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&uword r8 = $7ff0
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&uword r9 = $7ff2
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&uword r10 = $7ff4
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&uword r11 = $7ff6
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&uword r12 = $7ff8
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&uword r13 = $7ffa
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&uword r14 = $7ffc
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&uword r15 = $7ffe
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&word r0s = $7fe0
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&word r1s = $7fe2
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&word r2s = $7fe4
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&word r3s = $7fe6
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&word r4s = $7fe8
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&word r5s = $7fea
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&word r6s = $7fec
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&word r7s = $7fee
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&word r8s = $7ff0
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&word r9s = $7ff2
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&word r10s = $7ff4
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&word r11s = $7ff6
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&word r12s = $7ff8
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&word r13s = $7ffa
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&word r14s = $7ffc
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&word r15s = $7ffe
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&ubyte r0L = $7fe0
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&ubyte r1L = $7fe2
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&ubyte r2L = $7fe4
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&ubyte r3L = $7fe6
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&ubyte r4L = $7fe8
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&ubyte r5L = $7fea
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&ubyte r6L = $7fec
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&ubyte r7L = $7fee
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&ubyte r8L = $7ff0
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&ubyte r9L = $7ff2
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&ubyte r10L = $7ff4
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&ubyte r11L = $7ff6
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&ubyte r12L = $7ff8
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&ubyte r13L = $7ffa
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&ubyte r14L = $7ffc
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&ubyte r15L = $7ffe
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&ubyte r0H = $7fe1
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&ubyte r1H = $7fe3
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&ubyte r2H = $7fe5
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&ubyte r3H = $7fe7
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&ubyte r4H = $7fe9
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&ubyte r5H = $7feb
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&ubyte r6H = $7fed
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&ubyte r7H = $7fef
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&ubyte r8H = $7ff1
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&ubyte r9H = $7ff3
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&ubyte r10H = $7ff5
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&ubyte r11H = $7ff7
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&ubyte r12H = $7ff9
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&ubyte r13H = $7ffb
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&ubyte r14H = $7ffd
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&ubyte r15H = $7fff
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&byte r0sL = $7fe0
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&byte r1sL = $7fe2
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&byte r2sL = $7fe4
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&byte r3sL = $7fe6
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&byte r4sL = $7fe8
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&byte r5sL = $7fea
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&byte r6sL = $7fec
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&byte r7sL = $7fee
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&byte r8sL = $7ff0
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&byte r9sL = $7ff2
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&byte r10sL = $7ff4
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&byte r11sL = $7ff6
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&byte r12sL = $7ff8
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&byte r13sL = $7ffa
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&byte r14sL = $7ffc
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&byte r15sL = $7ffe
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&byte r0sH = $7fe1
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&byte r1sH = $7fe3
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&byte r2sH = $7fe5
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&byte r3sH = $7fe7
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&byte r4sH = $7fe9
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&byte r5sH = $7feb
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&byte r6sH = $7fed
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&byte r7sH = $7fef
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&byte r8sH = $7ff1
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&byte r9sH = $7ff3
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&byte r10sH = $7ff5
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&byte r11sH = $7ff7
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&byte r12sH = $7ff9
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&byte r13sH = $7ffb
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&byte r14sH = $7ffd
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&byte r15sH = $7fff
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asmsub save_virtual_registers() clobbers(A,Y) {
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%asm {{
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ldy #31
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- lda cx16.r0,y
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sta _cx16_vreg_storage,y
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dey
|
|
bpl -
|
|
rts
|
|
|
|
_cx16_vreg_storage
|
|
.word 0,0,0,0,0,0,0,0
|
|
.word 0,0,0,0,0,0,0,0
|
|
}}
|
|
}
|
|
|
|
asmsub restore_virtual_registers() clobbers(A,Y) {
|
|
%asm {{
|
|
ldy #31
|
|
- lda save_virtual_registers._cx16_vreg_storage,y
|
|
sta cx16.r0,y
|
|
dey
|
|
bpl -
|
|
rts
|
|
}}
|
|
}
|
|
}
|