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https://github.com/irmen/prog8.git
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990 lines
33 KiB
Lua
990 lines
33 KiB
Lua
; Bitmap pixel graphics routines for the CommanderX16
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; Custom routines to use the full-screen 640x480 and 320x240 screen modes.
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; (These modes are not supported by the documented GRAPH_xxxx kernal routines)
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;
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; No text layer is currently shown, text can be drawn as part of the bitmap itself.
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; Note: for similar graphics routines that also work on the C-64, use the "graphics" module instead.
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; Note: for color palette manipulation, use the "palette" module or write Vera registers yourself.
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; Note: this library implements code for various resolutions and color depths. This takes up memory.
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; If you're memory constrained you should probably not use this built-in library,
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; but make a copy in your project only containing the code for the required resolution.
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;
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;
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; SCREEN MODE LIST:
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; mode 0 = reset back to default text mode
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; mode 1 = bitmap 320 x 240 monochrome
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; mode 2 = bitmap 320 x 240 x 4c (TODO not yet implemented)
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; mode 3 = bitmap 320 x 240 x 16c (TODO not yet implemented)
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; mode 4 = bitmap 320 x 240 x 256c
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; mode 5 = bitmap 640 x 480 monochrome
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; mode 6 = bitmap 640 x 480 x 4c
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; higher color dephts in highres are not supported due to lack of VRAM
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; TODO can we make a FB vector table and emulation routines for the Cx16s' GRAPH_init() call? to replace the builtin 320x200 fb driver?
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gfx2 {
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; read-only control variables:
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ubyte active_mode = 0
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uword width = 0
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uword height = 0
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ubyte bpp = 0
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ubyte monochrome_dont_stipple_flag = false ; set to false to enable stippling mode in monochrome displaymodes
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sub screen_mode(ubyte mode) {
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when mode {
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1 -> {
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; lores monochrome
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cx16.VERA_DC_VIDEO = (cx16.VERA_DC_VIDEO & %11001111) | %00100000 ; enable only layer 1
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cx16.VERA_DC_HSCALE = 64
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cx16.VERA_DC_VSCALE = 64
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cx16.VERA_L1_CONFIG = %00000100
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cx16.VERA_L1_MAPBASE = 0
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cx16.VERA_L1_TILEBASE = 0
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width = 320
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height = 240
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bpp = 1
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}
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; TODO modes 2, 3 not yet implemented
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4 -> {
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; lores 256c
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cx16.VERA_DC_VIDEO = (cx16.VERA_DC_VIDEO & %11001111) | %00100000 ; enable only layer 1
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cx16.VERA_DC_HSCALE = 64
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cx16.VERA_DC_VSCALE = 64
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cx16.VERA_L1_CONFIG = %00000111
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cx16.VERA_L1_MAPBASE = 0
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cx16.VERA_L1_TILEBASE = 0
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width = 320
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height = 240
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bpp = 8
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}
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5 -> {
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; highres monochrome
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cx16.VERA_DC_VIDEO = (cx16.VERA_DC_VIDEO & %11001111) | %00100000 ; enable only layer 1
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cx16.VERA_DC_HSCALE = 128
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cx16.VERA_DC_VSCALE = 128
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cx16.VERA_L1_CONFIG = %00000100
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cx16.VERA_L1_MAPBASE = 0
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cx16.VERA_L1_TILEBASE = %00000001
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width = 640
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height = 480
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bpp = 1
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}
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6 -> {
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; highres 4c
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cx16.VERA_DC_VIDEO = (cx16.VERA_DC_VIDEO & %11001111) | %00100000 ; enable only layer 1
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cx16.VERA_DC_HSCALE = 128
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cx16.VERA_DC_VSCALE = 128
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cx16.VERA_L1_CONFIG = %00000101
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cx16.VERA_L1_MAPBASE = 0
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cx16.VERA_L1_TILEBASE = %00000001
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width = 640
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height = 480
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bpp = 2
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}
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else -> {
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; back to default text mode and colors
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cx16.VERA_CTRL = %10000000 ; reset VERA and palette
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c64.CINT() ; back to text mode
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width = 0
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height = 0
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bpp = 0
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mode = 0
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}
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}
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active_mode = mode
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if bpp
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clear_screen()
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}
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sub clear_screen() {
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monochrome_stipple(false)
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position(0, 0)
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when active_mode {
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1 -> {
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; lores monochrome
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repeat 240/2/8
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cs_innerloop640()
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}
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; TODO mode 2, 3
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4 -> {
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; lores 256c
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repeat 240/2
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cs_innerloop640()
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}
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5 -> {
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; highres monochrome
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repeat 480/8
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cs_innerloop640()
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}
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6 -> {
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; highres 4c
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repeat 480/4
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cs_innerloop640()
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}
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; modes 7 and 8 not supported due to lack of VRAM
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}
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position(0, 0)
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}
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sub monochrome_stipple(ubyte enable) {
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monochrome_dont_stipple_flag = not enable
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}
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sub rect(uword x, uword y, uword width, uword height, ubyte color) {
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if width==0 or height==0
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return
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horizontal_line(x, y, width, color)
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if height==1
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return
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horizontal_line(x, y+height-1, width, color)
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vertical_line(x, y+1, height-2, color)
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if width==1
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return
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vertical_line(x+width-1, y+1, height-2, color)
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}
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sub fillrect(uword x, uword y, uword width, uword height, ubyte color) {
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if width==0
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return
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repeat height {
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horizontal_line(x, y, width, color)
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y++
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}
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}
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sub horizontal_line(uword x, uword y, uword length, ubyte color) {
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if length==0
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return
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when active_mode {
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1, 5 -> {
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; monochrome modes, either resolution
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ubyte separate_pixels = (8-lsb(x)) & 7
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if separate_pixels as uword > length
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separate_pixels = lsb(length)
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repeat separate_pixels {
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; TODO optimize this by writing a masked byte in 1 go
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plot(x, y, color)
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x++
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}
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length -= separate_pixels
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if length {
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position(x, y)
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separate_pixels = lsb(length) & 7
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x += length & $fff8
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%asm {{
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lsr length+1
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ror length
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lsr length+1
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ror length
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lsr length+1
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ror length
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lda color
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bne +
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ldy #0 ; black
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bra _loop
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+ lda monochrome_dont_stipple_flag
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beq _stipple
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ldy #255 ; don't stipple
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bra _loop
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_stipple lda y
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and #1 ; determine stipple pattern to use
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bne +
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ldy #%01010101
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bra _loop
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+ ldy #%10101010
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_loop lda length
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ora length+1
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beq _done
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sty cx16.VERA_DATA0
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lda length
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bne +
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dec length+1
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+ dec length
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bra _loop
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_done
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}}
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repeat separate_pixels {
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; TODO optimize this by writing a masked byte in 1 go
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plot(x, y, color)
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x++
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}
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}
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cx16.VERA_ADDR_H &= %00000111 ; vera auto-increment off again
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}
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4 -> {
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; lores 256c
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position(x, y)
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%asm {{
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lda color
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phx
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ldx length+1
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beq +
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ldy #0
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- sta cx16.VERA_DATA0
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iny
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bne -
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dex
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bne -
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+ ldy length ; remaining
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beq +
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- sta cx16.VERA_DATA0
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dey
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bne -
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+ plx
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}}
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}
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6 -> {
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; highres 4c
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; TODO also mostly usable for lores 4c?
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color &= 3
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ubyte[4] colorbits
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ubyte ii
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for ii in 3 downto 0 {
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colorbits[ii] = color
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color <<= 2
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}
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void addr_mul_24_for_highres_4c(y, x) ; 24 bits result is in r0 and r1L (highest byte)
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%asm {{
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lda cx16.VERA_ADDR_H
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and #%00000111 ; no auto advance
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sta cx16.VERA_ADDR_H
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stz cx16.VERA_CTRL ; setup vera addr 0
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lda cx16.r1
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and #1
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sta cx16.VERA_ADDR_H
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lda cx16.r0
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sta cx16.VERA_ADDR_L
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lda cx16.r0+1
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sta cx16.VERA_ADDR_M
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phx
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ldx x
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}}
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repeat length {
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%asm {{
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txa
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and #3
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tay
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lda cx16.VERA_DATA0
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and gfx2.plot.mask4c,y
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ora colorbits,y
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sta cx16.VERA_DATA0
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cpy #%00000011 ; next vera byte?
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bne ++
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inc cx16.VERA_ADDR_L
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bne ++
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inc cx16.VERA_ADDR_M
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+ bne +
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inc cx16.VERA_ADDR_H
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+ inx ; next pixel
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}}
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}
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%asm {{
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plx
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}}
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}
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}
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}
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sub vertical_line(uword x, uword y, uword height, ubyte color) {
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when active_mode {
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1, 5 -> {
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; monochrome, lo-res
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cx16.r15L = gfx2.plot.bits[x as ubyte & 7] ; bitmask
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if color {
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if monochrome_dont_stipple_flag {
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; draw continuous line.
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position2(x,y,true)
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if active_mode==1
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set_both_strides(11) ; 40 increment = 1 line in 320 px monochrome
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else
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set_both_strides(12) ; 80 increment = 1 line in 640 px monochrome
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repeat height {
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%asm {{
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lda cx16.VERA_DATA0
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ora cx16.r15L
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sta cx16.VERA_DATA1
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}}
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}
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} else {
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; draw stippled line.
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if x&1 {
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y++
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height--
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}
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position2(x,y,true)
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if active_mode==1
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set_both_strides(12) ; 80 increment = 2 line in 320 px monochrome
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else
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set_both_strides(13) ; 160 increment = 2 line in 640 px monochrome
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repeat height/2 {
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%asm {{
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lda cx16.VERA_DATA0
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ora cx16.r15L
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sta cx16.VERA_DATA1
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}}
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}
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}
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} else {
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position2(x,y,true)
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cx16.r15 = ~cx16.r15 ; erase pixels
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if active_mode==1
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set_both_strides(11) ; 40 increment = 1 line in 320 px monochrome
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else
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set_both_strides(12) ; 80 increment = 1 line in 640 px monochrome
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repeat height {
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%asm {{
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lda cx16.VERA_DATA0
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and cx16.r15L
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sta cx16.VERA_DATA1
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}}
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}
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}
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}
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4 -> {
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; lores 256c
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; set vera auto-increment to 320 pixel increment (=next line)
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position(x,y)
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cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & %00000111 | (14<<4)
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%asm {{
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ldy height
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beq +
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lda color
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- sta cx16.VERA_DATA0
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dey
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bne -
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+
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}}
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}
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6 -> {
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; highres 4c
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; use TWO vera adress pointers simultaneously one for reading, one for writing, so auto-increment is possible
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if height==0
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return
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position2(x,y,true)
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set_both_strides(13) ; 160 increment = 1 line in 640 px 4c mode
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color &= 3
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color <<= gfx2.plot.shift4c[lsb(x) & 3]
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ubyte mask = gfx2.plot.mask4c[lsb(x) & 3]
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repeat height {
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%asm {{
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lda cx16.VERA_DATA0
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and mask
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ora color
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sta cx16.VERA_DATA1
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}}
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}
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}
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}
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sub set_both_strides(ubyte stride) {
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stride <<= 4
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cx16.VERA_CTRL = 0
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cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & %00000111 | stride
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cx16.VERA_CTRL = 1
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cx16.VERA_ADDR_H = cx16.VERA_ADDR_H & %00000111 | stride
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}
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}
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sub line(uword @zp x1, uword @zp y1, uword @zp x2, uword @zp y2, ubyte color) {
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; Bresenham algorithm.
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; This code special-cases various quadrant loops to allow simple ++ and -- operations.
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if y1>y2 {
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; make sure dy is always positive to have only 4 instead of 8 special cases
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swap(x1, x2)
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swap(y1, y2)
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}
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word @zp dx = (x2 as word)-x1
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word @zp dy = (y2 as word)-y1
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if dx==0 {
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vertical_line(x1, y1, abs(dy) as uword +1, color)
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return
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}
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if dy==0 {
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if x1>x2
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x1=x2
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horizontal_line(x1, y1, abs(dx) as uword +1, color)
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return
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}
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word @zp d = 0
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cx16.r13 = true ; 'positive_ix'
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if dx < 0 {
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dx = -dx
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cx16.r13 = false
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}
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word @zp dx2 = dx*2
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word @zp dy2 = dy*2
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cx16.r14 = x1 ; internal plot X
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if dx >= dy {
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if cx16.r13 {
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repeat {
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plot(cx16.r14, y1, color)
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if cx16.r14==x2
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return
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cx16.r14++
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d += dy2
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if d > dx {
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y1++
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d -= dx2
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}
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}
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} else {
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repeat {
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plot(cx16.r14, y1, color)
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if cx16.r14==x2
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return
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cx16.r14--
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d += dy2
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if d > dx {
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y1++
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d -= dx2
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}
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}
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}
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}
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else {
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if cx16.r13 {
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repeat {
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plot(cx16.r14, y1, color)
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if y1 == y2
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return
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y1++
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d += dx2
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if d > dy {
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cx16.r14++
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d -= dy2
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}
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}
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} else {
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repeat {
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plot(cx16.r14, y1, color)
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if y1 == y2
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return
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y1++
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d += dx2
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if d > dy {
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cx16.r14--
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d -= dy2
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}
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}
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}
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}
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}
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sub circle(uword @zp xcenter, uword @zp ycenter, ubyte radius, ubyte color) {
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; Midpoint algorithm.
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if radius==0
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return
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ubyte @zp xx = radius
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ubyte @zp yy = 0
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word @zp decisionOver2 = (1 as word)-xx
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; R14 = internal plot X
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; R15 = internal plot Y
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while xx>=yy {
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cx16.r14 = xcenter + xx
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cx16.r15 = ycenter + yy
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plot(cx16.r14, cx16.r15, color)
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cx16.r14 = xcenter - xx
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plot(cx16.r14, cx16.r15, color)
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cx16.r14 = xcenter + xx
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cx16.r15 = ycenter - yy
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plot(cx16.r14, cx16.r15, color)
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cx16.r14 = xcenter - xx
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plot(cx16.r14, cx16.r15, color)
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cx16.r14 = xcenter + yy
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cx16.r15 = ycenter + xx
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plot(cx16.r14, cx16.r15, color)
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cx16.r14 = xcenter - yy
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plot(cx16.r14, cx16.r15, color)
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cx16.r14 = xcenter + yy
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cx16.r15 = ycenter - xx
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plot(cx16.r14, cx16.r15, color)
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cx16.r14 = xcenter - yy
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plot(cx16.r14, cx16.r15, color)
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yy++
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if decisionOver2<=0
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decisionOver2 += (yy as word)*2+1
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else {
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xx--
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decisionOver2 += (yy as word -xx)*2+1
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}
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}
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}
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sub disc(uword @zp xcenter, uword @zp ycenter, ubyte @zp radius, ubyte color) {
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; Midpoint algorithm, filled
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if radius==0
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return
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ubyte @zp yy = 0
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word @zp decisionOver2 = (1 as word)-radius
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while radius>=yy {
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horizontal_line(xcenter-radius, ycenter+yy, radius*$0002+1, color)
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horizontal_line(xcenter-radius, ycenter-yy, radius*$0002+1, color)
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horizontal_line(xcenter-yy, ycenter+radius, yy*$0002+1, color)
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horizontal_line(xcenter-yy, ycenter-radius, yy*$0002+1, color)
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yy++
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if decisionOver2<=0
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decisionOver2 += (yy as word)*2+1
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else {
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radius--
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decisionOver2 += (yy as word -radius)*2+1
|
|
}
|
|
}
|
|
}
|
|
|
|
sub plot(uword @zp x, uword y, ubyte color) {
|
|
ubyte[8] bits = [128, 64, 32, 16, 8, 4, 2, 1]
|
|
ubyte[4] mask4c = [%00111111, %11001111, %11110011, %11111100]
|
|
ubyte[4] shift4c = [6,4,2,0]
|
|
|
|
when active_mode {
|
|
1 -> {
|
|
; lores monochrome
|
|
%asm {{
|
|
lda x
|
|
eor y
|
|
ora monochrome_dont_stipple_flag
|
|
and #1
|
|
}}
|
|
if_nz {
|
|
cx16.r0L = lsb(x) & 7 ; xbits
|
|
x /= 8
|
|
x += y*(320/8)
|
|
%asm {{
|
|
stz cx16.VERA_CTRL
|
|
stz cx16.VERA_ADDR_H
|
|
lda x+1
|
|
sta cx16.VERA_ADDR_M
|
|
lda x
|
|
sta cx16.VERA_ADDR_L
|
|
ldy cx16.r0L ; xbits
|
|
lda bits,y
|
|
ldy color
|
|
beq +
|
|
tsb cx16.VERA_DATA0
|
|
bra ++
|
|
+ trb cx16.VERA_DATA0
|
|
+
|
|
}}
|
|
}
|
|
}
|
|
; TODO mode 2,3
|
|
4 -> {
|
|
; lores 256c
|
|
void addr_mul_24_for_lores_256c(y, x) ; 24 bits result is in r0 and r1L (highest byte)
|
|
%asm {{
|
|
stz cx16.VERA_CTRL
|
|
lda cx16.r1
|
|
ora #%00010000 ; enable auto-increment so next_pixel() can be used after this
|
|
sta cx16.VERA_ADDR_H
|
|
lda cx16.r0+1
|
|
sta cx16.VERA_ADDR_M
|
|
lda cx16.r0
|
|
sta cx16.VERA_ADDR_L
|
|
lda color
|
|
sta cx16.VERA_DATA0
|
|
}}
|
|
}
|
|
5 -> {
|
|
; highres monochrome
|
|
%asm {{
|
|
lda x
|
|
eor y
|
|
ora monochrome_dont_stipple_flag
|
|
and #1
|
|
}}
|
|
if_nz {
|
|
cx16.r0L = lsb(x) & 7 ; xbits
|
|
x /= 8
|
|
x += y*(640/8)
|
|
%asm {{
|
|
stz cx16.VERA_CTRL
|
|
stz cx16.VERA_ADDR_H
|
|
lda x+1
|
|
sta cx16.VERA_ADDR_M
|
|
lda x
|
|
sta cx16.VERA_ADDR_L
|
|
ldy cx16.r0L ; xbits
|
|
lda bits,y
|
|
ldy color
|
|
beq +
|
|
tsb cx16.VERA_DATA0
|
|
bra ++
|
|
+ trb cx16.VERA_DATA0
|
|
+
|
|
}}
|
|
}
|
|
}
|
|
6 -> {
|
|
; highres 4c
|
|
; TODO also mostly usable for lores 4c?
|
|
void addr_mul_24_for_highres_4c(y, x) ; 24 bits result is in r0 and r1L (highest byte)
|
|
cx16.r2L = lsb(x) & 3 ; xbits
|
|
color &= 3
|
|
color <<= shift4c[cx16.r2L]
|
|
%asm {{
|
|
stz cx16.VERA_CTRL
|
|
lda cx16.r1L
|
|
sta cx16.VERA_ADDR_H
|
|
lda cx16.r0H
|
|
sta cx16.VERA_ADDR_M
|
|
lda cx16.r0L
|
|
sta cx16.VERA_ADDR_L
|
|
ldy cx16.r2L ; xbits
|
|
lda mask4c,y
|
|
and cx16.VERA_DATA0
|
|
ora color
|
|
sta cx16.VERA_DATA0
|
|
}}
|
|
}
|
|
}
|
|
}
|
|
|
|
sub position(uword @zp x, uword y) {
|
|
ubyte bank
|
|
when active_mode {
|
|
1 -> {
|
|
; lores monochrome
|
|
cx16.r0 = y*(320/8) + x/8
|
|
cx16.vaddr(0, cx16.r0, 0, 1)
|
|
}
|
|
; TODO modes 2,3
|
|
4 -> {
|
|
; lores 256c
|
|
void addr_mul_24_for_lores_256c(y, x) ; 24 bits result is in r0 and r1L (highest byte)
|
|
bank = lsb(cx16.r1)
|
|
cx16.vaddr(bank, cx16.r0, 0, 1)
|
|
}
|
|
5 -> {
|
|
; highres monochrome
|
|
cx16.r0 = y*(640/8) + x/8
|
|
cx16.vaddr(0, cx16.r0, 0, 1)
|
|
}
|
|
6 -> {
|
|
; highres 4c
|
|
void addr_mul_24_for_highres_4c(y, x) ; 24 bits result is in r0 and r1L (highest byte)
|
|
bank = lsb(cx16.r1)
|
|
cx16.vaddr(bank, cx16.r0, 0, 1)
|
|
}
|
|
}
|
|
}
|
|
|
|
sub position2(uword @zp x, uword y, ubyte also_port_1) {
|
|
position(x, y)
|
|
if also_port_1 {
|
|
when active_mode {
|
|
1, 5 -> cx16.vaddr(0, cx16.r0, 1, 1)
|
|
; TODO modes 2, 3
|
|
4, 6 -> {
|
|
ubyte bank = lsb(cx16.r1)
|
|
cx16.vaddr(bank, cx16.r0, 1, 1)
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
inline asmsub next_pixel(ubyte color @A) {
|
|
; -- sets the next pixel byte to the graphics chip.
|
|
; for 8 bpp screens this will plot 1 pixel.
|
|
; for 1 bpp screens it will plot 8 pixels at once (color = bit pattern).
|
|
; for 2 bpp screens it will plot 4 pixels at once (color = bit pattern).
|
|
%asm {{
|
|
sta cx16.VERA_DATA0
|
|
}}
|
|
}
|
|
|
|
asmsub next_pixels(uword pixels @AY, uword amount @R0) clobbers(A, Y) {
|
|
; -- sets the next bunch of pixels from a prepared array of bytes.
|
|
; for 8 bpp screens this will plot 1 pixel per byte.
|
|
; for 1 bpp screens it will plot 8 pixels at once (colors are the bit patterns per byte).
|
|
; for 2 bpp screens it will plot 4 pixels at once (colors are the bit patterns per byte).
|
|
%asm {{
|
|
phx
|
|
sta P8ZP_SCRATCH_W1
|
|
sty P8ZP_SCRATCH_W1+1
|
|
ldx cx16.r0+1
|
|
beq +
|
|
ldy #0
|
|
- lda (P8ZP_SCRATCH_W1),y
|
|
sta cx16.VERA_DATA0
|
|
iny
|
|
bne -
|
|
inc P8ZP_SCRATCH_W1+1 ; next page of 256 pixels
|
|
dex
|
|
bne -
|
|
|
|
+ ldx cx16.r0 ; remaining pixels
|
|
beq +
|
|
ldy #0
|
|
- lda (P8ZP_SCRATCH_W1),y
|
|
sta cx16.VERA_DATA0
|
|
iny
|
|
dex
|
|
bne -
|
|
+ plx
|
|
}}
|
|
}
|
|
|
|
asmsub set_8_pixels_from_bits(ubyte bits @R0, ubyte oncolor @A, ubyte offcolor @Y) {
|
|
; this is only useful in 256 color mode where one pixel equals one byte value.
|
|
%asm {{
|
|
phx
|
|
ldx #8
|
|
- asl cx16.r0
|
|
bcc +
|
|
sta cx16.VERA_DATA0
|
|
bra ++
|
|
+ sty cx16.VERA_DATA0
|
|
+ dex
|
|
bne -
|
|
plx
|
|
rts
|
|
}}
|
|
}
|
|
|
|
const ubyte charset_orig_bank = $0
|
|
const uword charset_orig_addr = $f800 ; in bank 0, so $0f800
|
|
const ubyte charset_bank = $1
|
|
const uword charset_addr = $f000 ; in bank 1, so $1f000
|
|
|
|
sub text_charset(ubyte charset) {
|
|
; -- make a copy of the selected character set to use with text()
|
|
; the charset number is the same as for the cx16.screen_set_charset() ROM function.
|
|
; 1 = ISO charset, 2 = PETSCII uppercase+graphs, 3= PETSCII uppercase+lowercase.
|
|
cx16.screen_set_charset(charset, 0)
|
|
cx16.vaddr(charset_orig_bank, charset_orig_addr, 0, 1)
|
|
cx16.vaddr(charset_bank, charset_addr, 1, 1)
|
|
repeat 256*8 {
|
|
cx16.VERA_DATA1 = cx16.VERA_DATA0
|
|
}
|
|
}
|
|
|
|
sub text(uword @zp x, uword y, ubyte color, uword sctextptr) {
|
|
; -- Write some text at the given pixel position. The text string must be in screencode encoding (not petscii!).
|
|
; You must also have called text_charset() first to select and prepare the character set to use.
|
|
; NOTE: in monochrome (1bpp) screen modes, x position is currently constrained to multiples of 8 ! TODO allow per-pixel horizontal positioning
|
|
uword chardataptr
|
|
when active_mode {
|
|
1, 5 -> {
|
|
; monochrome mode, either resolution
|
|
cx16.r2 = 40
|
|
if active_mode==5
|
|
cx16.r2 = 80
|
|
while @(sctextptr) {
|
|
chardataptr = charset_addr + (@(sctextptr) as uword)*8
|
|
cx16.vaddr(charset_bank, chardataptr, 1, 1)
|
|
position(x,y)
|
|
%asm {{
|
|
lda cx16.VERA_ADDR_H
|
|
and #%111 ; don't auto-increment, we have to do that manually because of the ora
|
|
sta cx16.VERA_ADDR_H
|
|
lda color
|
|
sta P8ZP_SCRATCH_B1
|
|
ldy #8
|
|
- lda P8ZP_SCRATCH_B1
|
|
bne + ; white color, plot normally
|
|
lda cx16.VERA_DATA1
|
|
eor #255 ; black color, keep only the other pixels
|
|
and cx16.VERA_DATA0
|
|
bra ++
|
|
+ lda cx16.VERA_DATA0
|
|
ora cx16.VERA_DATA1
|
|
+ sta cx16.VERA_DATA0
|
|
lda cx16.VERA_ADDR_L
|
|
clc
|
|
adc cx16.r2
|
|
sta cx16.VERA_ADDR_L
|
|
bcc +
|
|
inc cx16.VERA_ADDR_M
|
|
+ lda x
|
|
clc
|
|
adc #1
|
|
sta x
|
|
bcc +
|
|
inc x+1
|
|
+ dey
|
|
bne -
|
|
}}
|
|
sctextptr++
|
|
}
|
|
}
|
|
4 -> {
|
|
; lores 256c
|
|
while @(sctextptr) {
|
|
chardataptr = charset_addr + (@(sctextptr) as uword)*8
|
|
cx16.vaddr(charset_bank, chardataptr, 1, 1)
|
|
repeat 8 {
|
|
; TODO rewrite this inner loop fully in assembly
|
|
position(x,y)
|
|
y++
|
|
%asm {{
|
|
phx
|
|
ldx #1
|
|
lda cx16.VERA_DATA1
|
|
sta P8ZP_SCRATCH_B1
|
|
ldy #8
|
|
- asl P8ZP_SCRATCH_B1
|
|
bcc +
|
|
stx cx16.VERA_DATA0 ; write a pixel
|
|
bra ++
|
|
+ lda cx16.VERA_DATA0 ; don't write a pixel, but do advance to the next address
|
|
+ dey
|
|
bne -
|
|
plx
|
|
}}
|
|
}
|
|
x+=8
|
|
y-=8
|
|
sctextptr++
|
|
}
|
|
}
|
|
6 -> {
|
|
; hires 4c
|
|
while @(sctextptr) {
|
|
chardataptr = charset_addr + (@(sctextptr) as uword)*8
|
|
repeat 8 {
|
|
; TODO rewrite this inner loop fully in assembly
|
|
ubyte charbits = cx16.vpeek(charset_bank, chardataptr)
|
|
repeat 8 {
|
|
charbits <<= 1
|
|
if_cs
|
|
plot(x, y, color)
|
|
x++
|
|
}
|
|
x-=8
|
|
chardataptr++
|
|
y++
|
|
}
|
|
x+=8
|
|
y-=8
|
|
sctextptr++
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
asmsub cs_innerloop640() clobbers(Y) {
|
|
%asm {{
|
|
ldy #80
|
|
- stz cx16.VERA_DATA0
|
|
stz cx16.VERA_DATA0
|
|
stz cx16.VERA_DATA0
|
|
stz cx16.VERA_DATA0
|
|
stz cx16.VERA_DATA0
|
|
stz cx16.VERA_DATA0
|
|
stz cx16.VERA_DATA0
|
|
stz cx16.VERA_DATA0
|
|
dey
|
|
bne -
|
|
rts
|
|
}}
|
|
}
|
|
|
|
asmsub addr_mul_24_for_highres_4c(uword yy @R2, uword xx @R3) clobbers(A, Y) -> uword @R0, uword @R1 {
|
|
; yy * 160 + xx/4 (24 bits calculation)
|
|
; 24 bits result is in r0 and r1L (highest byte)
|
|
%asm {{
|
|
ldy #5
|
|
- asl cx16.r2
|
|
rol cx16.r2+1
|
|
dey
|
|
bne -
|
|
lda cx16.r2
|
|
sta cx16.r0
|
|
lda cx16.r2+1
|
|
sta cx16.r0+1
|
|
asl cx16.r0
|
|
rol cx16.r0+1
|
|
asl cx16.r0
|
|
rol cx16.r0+1
|
|
|
|
; xx >>= 2 (xx=R3)
|
|
lsr cx16.r3+1
|
|
ror cx16.r3
|
|
lsr cx16.r3+1
|
|
ror cx16.r3
|
|
|
|
; add r2 and xx (r3) to r0 (24-bits)
|
|
stz cx16.r1
|
|
clc
|
|
lda cx16.r0
|
|
adc cx16.r2
|
|
sta cx16.r0
|
|
lda cx16.r0+1
|
|
adc cx16.r2+1
|
|
sta cx16.r0+1
|
|
bcc +
|
|
inc cx16.r1
|
|
+ clc
|
|
lda cx16.r0
|
|
adc cx16.r3
|
|
sta cx16.r0
|
|
lda cx16.r0+1
|
|
adc cx16.r3+1
|
|
sta cx16.r0+1
|
|
bcc +
|
|
inc cx16.r1
|
|
+
|
|
rts
|
|
}}
|
|
}
|
|
|
|
asmsub addr_mul_24_for_lores_256c(uword yy @R0, uword xx @AY) clobbers(A) -> uword @R0, ubyte @R1 {
|
|
; yy * 320 + xx (24 bits calculation)
|
|
%asm {{
|
|
sta P8ZP_SCRATCH_W1
|
|
sty P8ZP_SCRATCH_W1+1
|
|
lda cx16.r0
|
|
sta P8ZP_SCRATCH_B1
|
|
lda cx16.r0+1
|
|
sta cx16.r1
|
|
sta P8ZP_SCRATCH_REG
|
|
lda cx16.r0
|
|
asl a
|
|
rol P8ZP_SCRATCH_REG
|
|
asl a
|
|
rol P8ZP_SCRATCH_REG
|
|
asl a
|
|
rol P8ZP_SCRATCH_REG
|
|
asl a
|
|
rol P8ZP_SCRATCH_REG
|
|
asl a
|
|
rol P8ZP_SCRATCH_REG
|
|
asl a
|
|
rol P8ZP_SCRATCH_REG
|
|
sta cx16.r0
|
|
lda P8ZP_SCRATCH_B1
|
|
clc
|
|
adc P8ZP_SCRATCH_REG
|
|
sta cx16.r0+1
|
|
bcc +
|
|
inc cx16.r1
|
|
+ ; now add the value to this 24-bits number
|
|
lda cx16.r0
|
|
clc
|
|
adc P8ZP_SCRATCH_W1
|
|
sta cx16.r0
|
|
lda cx16.r0+1
|
|
adc P8ZP_SCRATCH_W1+1
|
|
sta cx16.r0+1
|
|
bcc +
|
|
inc cx16.r1
|
|
+ lda cx16.r1
|
|
rts
|
|
}}
|
|
}
|
|
|
|
}
|