mirror of
https://github.com/irmen/prog8.git
synced 2024-12-26 14:29:35 +00:00
196 lines
7.8 KiB
Lua
196 lines
7.8 KiB
Lua
; Partial Vera FX support:
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; - fast 32 bit cached writes (clear, copy)
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; - transparent write setting
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; - hardware 16 bits multiplications
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;
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; Docs:
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; https://github.com/X16Community/x16-docs/blob/fb63156cca2d6de98be0577aacbe4ddef458f896/X16%20Reference%20-%2010%20-%20VERA%20FX%20Reference.md
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; https://docs.google.com/document/d/1q34uWOiM3Be2pnaHRVgSdHySI-qsiQWPTo_gfE54PTg
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verafx {
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%option no_symbol_prefixing, ignore_unused
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sub available() -> bool {
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; returns true if Vera FX is available (Vera V0.3.1 or later), false if not.
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cx16.r0L = cx16.VERA_CTRL
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cx16.r0H = 0
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cx16.VERA_CTRL = $7e
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if cx16.VERA_DC_VER0 == $56 {
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; Vera version number is valid. Vera fx is available on Vera version 0.3.1 and later.
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if cx16.VERA_DC_VER1>0
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cx16.r0H = 1
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else
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cx16.r0H = mkword(cx16.VERA_DC_VER2, cx16.VERA_DC_VER3) >= $0301 as ubyte
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}
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cx16.VERA_CTRL = cx16.r0L
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return cx16.r0H as bool
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}
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sub clear(ubyte vbank, uword vaddr, ubyte data, uword num_longwords) {
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; use cached 4-byte write to quickly clear a portion of the video memory to a given byte value
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; this routine is around 3 times faster as gfx_hires/gfx_lores.clear_screen()
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cx16.VERA_CTRL = 0
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cx16.VERA_ADDR_H = vbank | %00110000 ; 4-byte increment
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cx16.VERA_ADDR_M = msb(vaddr)
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cx16.VERA_ADDR_L = lsb(vaddr)
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cx16.VERA_CTRL = 6<<1 ; dcsel = 6, fill the 32 bits cache
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cx16.VERA_FX_CACHE_L = data
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cx16.VERA_FX_CACHE_M = data
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cx16.VERA_FX_CACHE_H = data
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cx16.VERA_FX_CACHE_U = data
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cx16.VERA_CTRL = 2<<1 ; dcsel = 2
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cx16.VERA_FX_MULT = 0
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cx16.VERA_FX_CTRL = %01000000 ; cache write enable
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if (num_longwords & %1111110000000011) == 0 {
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repeat lsb(num_longwords >> 2)
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unroll 4 cx16.VERA_DATA0=0 ; write 4*4 bytes at a time, unrolled
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}
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else if (num_longwords & %1111111000000001) == 0 {
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repeat lsb(num_longwords >> 1)
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unroll 2 cx16.VERA_DATA0=0 ; write 2*4 bytes at a time, unrolled
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}
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else if (lsb(num_longwords) & 3) == 0 {
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repeat num_longwords >> 2
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unroll 4 cx16.VERA_DATA0=0 ; write 4*4 bytes at a time, unrolled
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}
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else if (lsb(num_longwords) & 1) == 0 {
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repeat num_longwords >> 1
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unroll 2 cx16.VERA_DATA0=0 ; write 2*4 bytes at a time, unrolled
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}
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else {
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repeat num_longwords
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cx16.VERA_DATA0=0 ; write 4 bytes at a time
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}
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cx16.VERA_FX_CTRL = 0 ; cache write disable
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cx16.VERA_CTRL = 0
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}
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sub copy(ubyte srcbank, uword srcaddr, ubyte tgtbank, uword tgtaddr, uword num_longwords) {
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; use cached 4-byte writes to quickly copy a portion of the video memory to somewhere else
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; this routine is about 50% faster as a plain byte-by-byte copy
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cx16.VERA_CTRL = 1
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cx16.VERA_ADDR_H = srcbank | %00010000 ; source: 1-byte increment
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cx16.VERA_ADDR_M = msb(srcaddr)
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cx16.VERA_ADDR_L = lsb(srcaddr)
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cx16.VERA_CTRL = 0
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cx16.VERA_ADDR_H = tgtbank | %00110000 ; target: 4-byte increment
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cx16.VERA_ADDR_M = msb(tgtaddr)
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cx16.VERA_ADDR_L = lsb(tgtaddr)
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cx16.VERA_CTRL = 2<<1 ; dcsel = 2
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cx16.VERA_FX_MULT = 0
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cx16.VERA_FX_CTRL = %01100000 ; cache write enable + cache fill enable
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cx16.r0 = num_longwords
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if (cx16.r0L & 1) == 0 {
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repeat cx16.r0>>1 {
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%asm {{
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lda cx16.VERA_DATA1 ; fill cache with 4 source bytes...
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lda cx16.VERA_DATA1
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lda cx16.VERA_DATA1
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lda cx16.VERA_DATA1
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stz cx16.VERA_DATA0 ; write 4 bytes at once.
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lda cx16.VERA_DATA1 ; fill cache with 4 source bytes...
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lda cx16.VERA_DATA1
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lda cx16.VERA_DATA1
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lda cx16.VERA_DATA1
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stz cx16.VERA_DATA0 ; write 4 bytes at once.
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}}
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}
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} else {
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repeat cx16.r0 {
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%asm {{
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lda cx16.VERA_DATA1 ; fill cache with 4 source bytes...
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lda cx16.VERA_DATA1
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lda cx16.VERA_DATA1
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lda cx16.VERA_DATA1
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stz cx16.VERA_DATA0 ; write 4 bytes at once.
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}}
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}
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}
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cx16.VERA_FX_CTRL = 0 ; cache write disable
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cx16.VERA_CTRL = 0
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}
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asmsub mult16(uword value1 @R0, uword value2 @R1) clobbers(X) -> uword @AY {
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; Returns the 16 bits unsigned result of R0*R1 in AY.
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; Note: only the lower 16 bits! (the upper 16 bits are not valid for unsigned word multiplications, only for signed)
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; Verafx doesn't support unsigned values like this for full 32 bit result.
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%asm {{
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lda cx16.r0
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sta P8ZP_SCRATCH_W1
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lda cx16.r0+1
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sta P8ZP_SCRATCH_W1+1
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jsr verafx.muls
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ldx P8ZP_SCRATCH_W1
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stx cx16.r0
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ldx P8ZP_SCRATCH_W1+1
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stx cx16.r0+1
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rts
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}}
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}
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asmsub muls(word value1 @R0, word value2 @R1) clobbers(X) -> word @AY, word @R0 {
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; Returns the 32 bits signed result in AY and R0 (lower word, upper word).
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; Vera Fx multiplication support only works on signed values!
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%asm {{
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lda #(2 << 1)
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sta cx16.VERA_CTRL ; $9F25
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stz cx16.VERA_FX_CTRL ; $9F29 (mainly to reset Addr1 Mode to 0)
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lda #%00010000
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sta cx16.VERA_FX_MULT ; $9F2C
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lda #(6 << 1)
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sta cx16.VERA_CTRL ; $9F25
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lda cx16.r0
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sta cx16.VERA_FX_CACHE_L ; $9F29
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lda cx16.r0+1
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sta cx16.VERA_FX_CACHE_M ; $9F2A
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lda cx16.r1
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sta cx16.VERA_FX_CACHE_H ; $9F2B
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lda cx16.r1+1
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sta cx16.VERA_FX_CACHE_U ; $9F2C
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lda cx16.VERA_FX_ACCUM_RESET ; $9F29 (DCSEL=6)
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; Set the ADDR0 pointer to $1f9bc and write our multiplication result there
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; (these are the 4 bytes just before the PSG registers start)
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lda #(2 << 1)
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sta cx16.VERA_CTRL
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lda #%01000000 ; Cache Write Enable
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sta cx16.VERA_FX_CTRL
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lda #$bc
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sta cx16.VERA_ADDR_L
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lda #$f9
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sta cx16.VERA_ADDR_M
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lda #$01
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sta cx16.VERA_ADDR_H ; no increment
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stz cx16.VERA_DATA0 ; multiply and write out result
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lda #%00010001 ; $01 with Increment 1
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sta cx16.VERA_ADDR_H ; so we can read out the result
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lda cx16.VERA_DATA0 ; store the lower 16 bits of the result in AY
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ldy cx16.VERA_DATA0
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ldx cx16.VERA_DATA0 ; store the upper 16 bits of the result in R0
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stx cx16.r0s
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ldx cx16.VERA_DATA0
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stx cx16.r0s+1
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stz cx16.VERA_FX_CTRL ; Cache write disable
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stz cx16.VERA_FX_MULT ; $9F2C reset multiply bit
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stz cx16.VERA_CTRL ; reset DCSEL
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rts
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}}
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}
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sub transparency(bool enable) {
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; Set transparent write mode for VeraFX cached writes and also for normal writes to DATA0/DATA.
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; If enabled, pixels with value 0 do not modify VRAM when written (so they are "transparent")
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cx16.VERA_CTRL = 2<<1 ; dcsel = 2
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if enable
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cx16.VERA_FX_CTRL |= %10000000
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else
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cx16.VERA_FX_CTRL &= %01111111
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cx16.VERA_CTRL = 0
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}
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}
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