mirror of
https://github.com/irmen/prog8.git
synced 2025-01-19 19:33:52 +00:00
88 lines
1.9 KiB
Lua
88 lines
1.9 KiB
Lua
%import textio
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%zeropage basicsafe
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%option no_sysinit
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main {
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sub start() {
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cx16.r0L = %11111110
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while cx16.r0L &32 == 32 {
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cx16.r0L <<= 1
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txt.print_ubbin(cx16.r0L, true)
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txt.nl()
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}
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txt.nl()
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cx16.r0L = %11111110
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while cx16.r0L &32 != 0 {
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cx16.r0L <<= 1
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txt.print_ubbin(cx16.r0L, true)
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txt.nl()
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}
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txt.nl()
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; this one must not be changed and stop after 3 iterations instead of 5!
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cx16.r0L = %11111110
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while cx16.r0L &40 == 40 {
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cx16.r0L <<= 1
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txt.print_ubbin(cx16.r0L, true)
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txt.nl()
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}
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txt.nl()
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txt.nl()
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cx16.r0L = %11111110
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do {
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cx16.r0L <<= 1
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txt.print_ubbin(cx16.r0L, true)
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txt.nl()
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} until cx16.r0L &32 != 32
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txt.nl()
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cx16.r0L = %11111110
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do {
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cx16.r0L <<= 1
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txt.print_ubbin(cx16.r0L, true)
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txt.nl()
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} until cx16.r0L &32 == 0
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txt.nl()
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; this one must not be changed and stop after 3 iterations instead of 5!
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cx16.r0L = %11111110
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do {
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cx16.r0L <<= 1
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txt.print_ubbin(cx16.r0L, true)
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txt.nl()
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} until cx16.r0L &40 != 40
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txt.nl()
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; while cx16.r0L & cx16.r1L == 0 {
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; cx16.r0L++
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; }
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;
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; while cx16.r0L & cx16.r1L == cx16.r1L {
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; cx16.r0L++
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; }
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/*
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sys.set_irqd()
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cx16.VERA_IEN = 1 ; only vsync irqs
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repeat {
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while (cx16.VERA_ISR & 1)==0 {
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; wait for vsync
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}
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cx16.VERA_ISR = 1 ; clear vsync irq status
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palette.set_color(6, $ff0)
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repeat 2000 {
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cx16.r0++
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}
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palette.set_color(6, $00f)
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}
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*/
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}
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}
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