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418 lines
14 KiB
Kotlin
418 lines
14 KiB
Kotlin
package prog8tests.codegeneration
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import io.kotest.assertions.throwables.shouldThrow
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import io.kotest.core.spec.style.FunSpec
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import io.kotest.matchers.collections.shouldNotBeEmpty
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import io.kotest.matchers.longs.shouldBeLessThan
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import io.kotest.matchers.shouldBe
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import io.kotest.matchers.shouldNotBe
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import prog8.code.target.Cx16Target
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import prog8tests.helpers.CapturingSerialIO
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import prog8tests.helpers.compileText
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import prog8tests.helpers.simulate
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import razorvine.ksim65.Disassembler
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import java.nio.file.Files
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/**
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* These tests execute the compiled 6502 code in the ksim65 simulator.
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* To interface correctly with the simulator, the following directives are required in the Prog8 source:
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*
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* - %option no_sysinit: Prevents the inclusion of the standard system initialization code which is not needed here.
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* - %launcher none: No need for a program launcher.
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* - %address $1000: The program should be loaded at $1000, which is where the simulator starts execution.
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* - You can use memory-mapped variables to easily read their values after execution.
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* - Best practice is to cleanly power off the simulator by writing to the poweroff register at $f203.
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* - The Disassembler class can be used to disassemble the code loaded into the simulator's memory.
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* That is an alternative way to see what assembly code is generated by Prog8. (the usual way is to load the 64tass-generated .asm file)
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* A big benefit of using the Disassembler could be that the resulting assembly source code is much more compact BUT it has NO SYMBOLS WHATSOEVER.
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*
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* Simulator hardware interface registers:
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* - $f000-$f003: Programmable Timer (4 registers).
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* - $f100-$f109: Real Time Clock (10 registers).
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* - $f200: Serial input register (read a byte from it).
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* - $f201: Serial output register (write a byte to output it).
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* - $f202: Reset register (writing any value triggers a CPU reset).
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* - $f203: Power-off register (writing any value stops the simulator).
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*/
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class TestExecution6502 : FunSpec({
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val outputDir = Files.createTempDirectory("prog8test")
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test("simple addition") {
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val src = $$"""
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%option no_sysinit
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%launcher none
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%address $1000
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main {
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&ubyte poweroff = $f203
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&ubyte result = $02 ; result is stored in memory at $02
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sub start() {
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ubyte @shared a = 10
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ubyte @shared b = 20
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result = a + b + 12
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poweroff = 1 ; power off the simulator
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}
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}
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""".trimIndent()
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val compileResult = compileText(Cx16Target(), false, src, outputDir)
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val machine = compileResult!!.simulate()
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machine.assertMemory(0x02, 42)
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}
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test("serial output") {
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val src = $$"""
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%encoding iso
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%option no_sysinit
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%launcher none
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%address $1000
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main {
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&ubyte poweroff = $f203
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sub start() {
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serial.print("HELLO!")
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poweroff = 1 ; power off the simulator
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}
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}
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serial {
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&ubyte serial_out = $f201
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sub print(str message) {
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repeat {
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cx16.r0L = @(message)
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if_z
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return
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serial_out = cx16.r0L
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message++
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}
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}
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}
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""".trimIndent()
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val compileResult = compileText(Cx16Target(), false, src, outputDir)
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compileResult shouldNotBe null
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val serialIO = CapturingSerialIO()
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val machine = compileResult!!.simulate(serialAndPower = serialIO)
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serialIO.assertOutput("HELLO!")
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println(machine.cpu.snapshot())
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}
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test("poweroff register") {
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val src = $$"""
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%option no_sysinit
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%launcher none
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%address $1000
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main {
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&ubyte poweroff = $f203
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sub start() {
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poweroff = 1 ; power off the simulator
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}
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}
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""".trimIndent()
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val compileResult = compileText(Cx16Target(), false, src, outputDir)
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val machine = compileResult!!.simulate(1000)
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machine.cpu.totalCycles shouldBeLessThan 200
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}
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test("long repeat loops") {
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val src = $$"""
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%option no_sysinit
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%launcher none
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%address $1000
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main {
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&ubyte poweroff = $f203
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&long result = $02 ; result is stored in memory at $02
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sub start() {
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long @shared qq = 0
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repeat 70000 {
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qq++
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}
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result = qq
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long @shared iters = 70000
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repeat iters {
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qq++
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}
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result = qq
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poweroff = 1
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}
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}
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""".trimIndent()
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val compileResult = compileText(Cx16Target(), false, src, outputDir)
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// 140000 iterations * ~40 cycles = 5.6 million. Let's use 10 million to be safe.
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val machine = compileResult!!.simulate(maxCycles = 10000000L)
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machine.assertMemory(0x02, (140000L and 0xff).toInt())
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machine.assertMemory(0x03, ((140000L shr 8) and 0xff).toInt())
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machine.assertMemory(0x04, ((140000L shr 16) and 0xff).toInt())
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machine.assertMemory(0x05, ((140000L shr 24) and 0xff).toInt())
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}
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test("top level RTS exits simulator") {
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val src = $$"""
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%option no_sysinit
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%launcher none
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%address $1000
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main {
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sub start() {
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; do nothing just RTS
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}
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}
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""".trimIndent()
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val compileResult = compileText(Cx16Target(), false, src, outputDir)
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val machine = compileResult!!.simulate(1000)
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machine.cpu.totalCycles shouldBeLessThan 250
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}
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test("reset register") {
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val src = $$"""
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%option no_sysinit
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%launcher none
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%address $1000
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main {
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&ubyte reset_reg = $f202
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&ubyte counter = $02
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sub start() {
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counter++
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if counter == 1 {
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reset_reg = 1
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}
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}
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}
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""".trimIndent()
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val compileResult = compileText(Cx16Target(), false, src, outputDir)
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val machine = compileResult!!.simulate()
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machine.assertMemory(0x02, 2)
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}
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test("real time clock") {
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val src = $$"""
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%option no_sysinit
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%launcher none
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%address $1000
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main {
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&ubyte poweroff = $f203
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&word year = $f100
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&ubyte month = $f102
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&ubyte day = $f103
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&word res_year = $02
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&ubyte res_month = $04
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&ubyte res_day = $05
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sub start() {
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res_year = year
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res_month = month
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res_day = day
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poweroff = 1 ; power off the simulator
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}
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}
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""".trimIndent()
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val compileResult = compileText(Cx16Target(), false, src, outputDir)
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val machine = compileResult!!.simulate()
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val now = java.time.LocalDateTime.now()
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machine.assertMemory(0x02, now.year and 0xff)
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machine.assertMemory(0x03, (now.year shr 8) and 0xff)
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machine.assertMemory(0x04, now.monthValue)
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machine.assertMemory(0x05, now.dayOfMonth)
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}
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test("timer") {
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val src = $$"""
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%option no_sysinit
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%launcher none
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%address $1000
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main {
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&ubyte poweroff = $f203
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&ubyte timer_ctrl = $f000
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&ubyte timer_interval_hi = $f003
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&ubyte timer_cnt_lo = $f001
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&ubyte res_lo = $02
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sub start() {
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timer_interval_hi = $ff
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timer_ctrl = 1 ; enable
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repeat 100 {
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cx16.r0L++ ; some delay
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}
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res_lo = timer_cnt_lo
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poweroff = 1 ; power off the simulator
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}
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}
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""".trimIndent()
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val compileResult = compileText(Cx16Target(), false, src, outputDir)
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val machine = compileResult!!.simulate()
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machine.assertMemory(0x02, 28)
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}
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test("serial input") {
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val src = $$"""
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%option no_sysinit
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%launcher none
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%address $1000
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main {
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&ubyte poweroff = $f203
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&ubyte serial_in = $f200
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&ubyte res1 = $02
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&ubyte res2 = $03
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sub start() {
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res1 = serial_in
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res2 = serial_in
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poweroff = 1 ; power off the simulator
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}
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}
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""".trimIndent()
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val compileResult = compileText(Cx16Target(), false, src, outputDir)
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compileResult shouldNotBe null
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val serialIO = CapturingSerialIO()
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serialIO.provideInput("AB")
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val machine = compileResult!!.simulate(serialAndPower = serialIO)
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machine.assertMemory(0x02, 'A'.code)
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machine.assertMemory(0x03, 'B'.code)
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}
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test("disassembler") {
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val src = $$"""
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%option no_sysinit
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%launcher none
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%address $1000
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main {
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&ubyte poweroff = $f203
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sub start() {
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ubyte @shared a = 10
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ubyte @shared b = 20
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ubyte c = a + b
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poweroff = 1
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}
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}
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""".trimIndent()
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val compileResult = compileText(Cx16Target(), false, src, outputDir)
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val machine = compileResult!!.simulate(execute = false)
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val disassembler = Disassembler(machine.cpu)
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val (lines, _) = disassembler.disassemble(machine.ram.data, 0x1000..0x1040, 0x0000)
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lines.shouldNotBeEmpty()
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// we check if some expected instructions are there
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lines.any { it.contains("lda", ignoreCase = true) } shouldBe true
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lines.any { it.contains("sta", ignoreCase = true) } shouldBe true
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lines.any { it.contains("adc", ignoreCase = true) } shouldBe true
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}
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test("timeout throws exception") {
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val src = """
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%option no_sysinit
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%launcher none
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%address $1000
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main {
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sub start() {
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repeat {
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; infinite loop that isn't just jmp *
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cx16.r0L = 1
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}
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}
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}
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""".trimIndent()
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val compileResult = compileText(Cx16Target(), true, src, outputDir)
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compileResult shouldNotBe null
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shouldThrow<AssertionError> {
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compileResult!!.simulate(maxCycles = 100)
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}
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}
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test("div_longs positive 1234567890 / 88888 = 13889") {
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val src = $$"""
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%option no_sysinit
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%launcher none
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%address $1000
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main {
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&ubyte poweroff = $f203
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sub start() {
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long @shared v = 1234567890
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v /= 88888
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%asm {{
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lda p8v_v
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sta $2000
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lda p8v_v+1
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sta $2001
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lda p8v_v+2
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sta $2002
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lda p8v_v+3
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sta $2003
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}}
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poweroff = 1
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}
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}
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""".trimIndent()
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val compileResult = compileText(Cx16Target(), false, src, outputDir)
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val machine = compileResult!!.simulate(maxCycles = 30000)
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val b0 = machine.ram[0x2000].toInt() and 0xff
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val b1 = machine.ram[0x2001].toInt() and 0xff
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val b2 = machine.ram[0x2002].toInt() and 0xff
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val b3 = machine.ram[0x2003].toInt() and 0xff
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println("div_longs result bytes: $b0 $b1 $b2 $b3 (hex: ${b0.toString(16)} ${b1.toString(16)} ${b2.toString(16)} ${b3.toString(16)})")
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machine.assertMemory(0x2000, 0x41)
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machine.assertMemory(0x2001, 0x36)
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machine.assertMemory(0x2002, 0x00)
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machine.assertMemory(0x2003, 0x00)
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}
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test("struct with inlined array memory layout (6502)") {
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val src = $$"""
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%option no_sysinit
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%launcher none
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%address $1000
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main {
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&ubyte poweroff = $f203
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struct Node {
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ubyte a
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bool flag
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ubyte[5] array
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word number
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}
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sub start() {
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^^Node k2 = [1, false, [65,66,67,68,0], 9999]
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^^Node k3 = $4000
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k3^^=k2^^
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poweroff = 1
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}
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}
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""".trimIndent()
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val compileResult = compileText(Cx16Target(), false, src, outputDir)
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val machine = compileResult!!.simulate()
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machine.assertMemory(0x4000, 1)
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machine.assertMemory(0x4001, 0)
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machine.assertMemory(0x4002, 65)
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machine.assertMemory(0x4003, 66)
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machine.assertMemory(0x4004, 67)
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machine.assertMemory(0x4005, 68)
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machine.assertMemory(0x4006, 0)
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machine.assertMemory(0x4007, 9999 and 0xff)
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machine.assertMemory(0x4008, (9999 shr 8) and 0xff)
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}
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})
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