diff --git a/ciderpress/linux/getfile b/ciderpress/linux/getfile deleted file mode 100755 index bf6bfae..0000000 Binary files a/ciderpress/linux/getfile and /dev/null differ diff --git a/ciderpress/linux/iconv b/ciderpress/linux/iconv deleted file mode 100755 index add6d53..0000000 Binary files a/ciderpress/linux/iconv and /dev/null differ diff --git a/ciderpress/linux/mdc b/ciderpress/linux/mdc deleted file mode 100755 index 790e338..0000000 Binary files a/ciderpress/linux/mdc and /dev/null differ diff --git a/ciderpress/linux/packddd b/ciderpress/linux/packddd deleted file mode 100755 index 8cba06a..0000000 Binary files a/ciderpress/linux/packddd and /dev/null differ diff --git a/ciderpress/linux/sstasm b/ciderpress/linux/sstasm deleted file mode 100755 index 4862f3d..0000000 Binary files a/ciderpress/linux/sstasm and /dev/null differ diff --git a/testdata/1000-allops-value-65816.S b/testdata/1000-allops-value-65816.S new file mode 100644 index 0000000..2439293 --- /dev/null +++ b/testdata/1000-allops-value-65816.S @@ -0,0 +1,11 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 +ZP EQU $FF +ABS EQU $FEFF +LONG EQU $FDFEFF +MV0 EQU ZP ;Merlin 32 bug -- must use 8-bit constant, or +MV1 EQU ZP-1 ; '^' modifier is implicitly applied + + PUT allops-common-65816.S diff --git a/testdata/1001-allops-zero-65816.S b/testdata/1001-allops-zero-65816.S new file mode 100644 index 0000000..cd67505 --- /dev/null +++ b/testdata/1001-allops-zero-65816.S @@ -0,0 +1,12 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + +ZP EQU $00 +ABS EQU $0000 +LONG EQU $000000 +MV0 EQU $00 +MV1 EQU $00 + + PUT allops-common-65816.S diff --git a/testdata/1002-embedded-instructions.S b/testdata/1002-embedded-instructions.S new file mode 100644 index 0000000..71c596a --- /dev/null +++ b/testdata/1002-embedded-instructions.S @@ -0,0 +1,110 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + + org $1000 + +; 65816 mode with short regs + clc + xce + sep #$30 + mx %11 + + jsr test1 + jsr test2 + jsr test3 + jsr test4 + jsr test5 + rts + +; TEST #1: simple example +test1 lda #$00 + dfb $2c ;BIT abs +:inner lda #$01 + beq :inner + rts + +; TEST #2: embedded with break path +; +; Example inspired by incorrect analysis... +; +; The code analyzer sees: +; beq {+03} ;jumps to the $8f +; lda #$00 +; brk $8f +; and stops, then pursues the branch. If we try to walk from top +; to bottom, skipping forward by the full length of an instruction, +; we'll appear to find ourselves in the middle of an embedded +; instruction. +; +; This is different from the typical embedded instruction, +; where the inner is contained entirely within the outer. +test2 sep #$30 ;short regs + mx %00 ;pretend they're long + + lda $00 ;load something to scramble flags + beq :store + lda #$0000 +:store stal $012345 + rts + +; TEST #3: embedded with non-instruction byte +; +; The code analyzer sees two paths, involving the three bytes. +; The first is the three-byte JSR, the second is the one-byte +; RTS. The third NOP byte is never "executed" by the analyzer, +; but because of the way we display embedded instructions it +; gets put on its own line. Since it's not an instruction start +; or a data item, things get confused. (This is referred to as +; an "embedded orphan" in the code.) + +test3 dfb $20 ;JSR +:mid dfb $60 ;RTS + dfb $ea ;NOP + bra :mid + + +; TEST #4: overlapping chain +; +; Each BIT instruction is three bytes, and each byte is a branch target, +; so we get a string of embedded instructions. +test4 +:bits hex 2c2c2c2c2c2c2c2c2ceaea + asl + bcc :bits + asl + bcc :bits+1 + asl + bcc :bits+2 + asl + bcc :bits+3 + asl + bcc :bits+4 + asl + bcc :bits+5 + asl + bcc :bits+6 + asl + bcc :bits+7 + asl + bcc :bits+8 + asl + bcc :bits+9 + rts + +; TEST #5: another overlap +; +; Trying to be a little different. +test5 dfb $2c +:mid1 nop + hex ad +:mid2 lda $00 + asl + bcc :mid1 + asl + bcc :mid2 + +; TEST #6: "embedded" off the end of the file + dfb $af ;ldal + diff --git a/testdata/1003-flags-and-branches.S b/testdata/1003-flags-and-branches.S new file mode 100644 index 0000000..059510f --- /dev/null +++ b/testdata/1003-flags-and-branches.S @@ -0,0 +1,258 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + + org $1000 + clc + xce + sep #$ff ;set all flags + mx %11 + +; clear individual flags with instructions +; (this has no effect on the assembled output, but you can see the +; effects on the "status" column in the display list) + clv + cld + cli + clc + lda #$80 ;clear Z + lda #$01 ;clear N + + sed + sei + sec + lda #$ff ;set N + adc #$00 ;set V, Z (actually scrambles NVZC) + +; clear individual flags with REP + sep #$ff + rep #$80 + rep #$40 + rep #$20 + rep #$10 + rep #$08 + rep #$04 + rep #$02 + rep #$01 + +; exercise SEP/REP with #$00 + sep #$00 + sep #$ff + rep #$00 + rep #$ff + +; confirm emulation behavior + mx %00 ;long regs + lda #$feed ;check it + sec + xce ;emulation mode + lda #$ff ;check it + rep #$30 ;should have no effect... + mx %11 ;...but Merlin32 doesn't know that + lda #$ff + clc + xce ;back to native, should set M/X=1 + lda #$ff ;check it + +; try one long, one short + rep #$20 ;long a + sep #$10 ;short x/y + mx %01 + lda #$0000 + ldx #$01 + ldy #$02 + + sep #$20 ;short a + rep #$10 ;long x/y + mx %10 + lda #$01 + ldx #$0000 + ldy #$0000 + +; check branch instructions; NVMXDIZC + sep #$30 + mx %11 + lda #$00 + pha + plp ;without a nearby PHP, flags will be scrambled + + rep #$80 + bpl ok_bpl + brk $00 + +ok_bpl sep #$80 + bpl :bad ;branch never taken + bmi ok_bmi +:bad brk $00 + +ok_bmi rep #$40 + bvc ok_bvc + brk $00 + +ok_bvc sep #$40 + bvs ok_bvs + brk $00 + +ok_bvs rep #$01 + bcc ok_bcc + brk $00 + +ok_bcc sep #$01 + bcs ok_bcs + brk $00 + +ok_bcs rep #$02 + bne ok_bne + brk $00 + +ok_bne sep #$02 + beq ok_beq + brk $00 + +ok_beq + +; check NZ flags set by immediate load + sep #$ff ;set all + mx %11 + lda #$01 + bne ok_nzero + brk $db +ok_nzero + lda #$00 + beq ok_zero + brk $db +ok_zero + bpl ok_pos + brk $db +ok_pos + lda #$80 + bmi ok_neg + brk $db +ok_neg + +; check NZ flags set by immediate AND + lda #$ff + and #$00 + beq ok_andZ1 + brk $db +ok_andZ1 + lda #$00 + and #$ff + beq ok_andZ1A + brk $db +ok_andZ1A + lda #$ff + and #$7f + bne ok_andZ0 + brk $db +ok_andZ0 + bpl ok_andN0 + brk $db +ok_andN0 + lda #$ff + and #$80 + bmi ok_andN1 + brk $db +ok_andN1 + +; check NZ flags set by immediate ORA + lda #$00 + ora #$00 + beq ok_oraZ1 + brk $db +ok_oraZ1 + ora #$01 + bne ok_oraZ0 + brk $db +ok_oraZ0 + lda #$00 + ora #$7f + bpl ok_oraN0 + brk $db +ok_oraN0 + ora #$80 + bmi ok_oraN1 + brk $db +ok_oraN1 + +; check rol/ror +:foo lda :foo ;scramble N/V + sec + ror A ;rotates the carry into the hi bit (N) + bmi ok_ror1 + brk $dc +ok_ror1 + clc + ror A ;now try with carry clear + bpl ok_ror2 + brk $dc +ok_ror2 + lda #$00 ;set Z=1 + sec + rol A ;set Z=0 (could also set C=0) + bne ok_rol1 + brk $dc +ok_rol1 + +; simple php/plp pair test + clc + php + sec + plp ;should restore cleared carry + bcc ok_plp + brk $00 +ok_plp + +; regression test for bug in analyzer + sec ;here carry is clear + bcs flg2 +flg1 clc + +flg2 lda $33 + beq flg1 + bcs flg3 ;this should NOT be branch-always + lda $44 +flg3 nop + +; test tracking across subroutine calls + rep #$20 ;long a + sep #$10 ;short x/y + mx %01 + jsr long_subr ;confirm flag propagation + + rep #$30 + mx %00 + jsr ambig_subr + + sep #$30 + mx %11 + jsr ambig_subr + + rep #$20 ;long a + sep #$10 ;short x/y + mx %01 + jsr long_subr ;call it again + + +; leave the main routine with short flags set + sep #$30 + mx %11 + rts + + +; only called with longm/shortx + mx %01 +long_subr + lda #$1234 + ldx #$ff + rts + +; this is called with different values for M/X, so it defaults to short + mx %11 +ambig_subr + lda #$ff + ldx #$ee + ldy #$dd + rts + diff --git a/testdata/1004-data-recognition.S b/testdata/1004-data-recognition.S new file mode 100644 index 0000000..ec456a4 --- /dev/null +++ b/testdata/1004-data-recognition.S @@ -0,0 +1,49 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + + org $1000 + + lda zsplit + ora esplit + rts + +asc3 asc '333' ;no match + dfb $80 +asc4 asc '4444' ;run of 4, as ASCII + dfb $80 +asc5 asc '55555' ;run of 5, as ASCII + dfb $80 +ascM asc 'MMMMMMMMMM' ;run of 62, as ASCII + asc 'MMMMMMMMMM' + asc 'MMMMMMMMMM' + asc 'MMMMMMMMMM' + asc 'MMMMMMMMMM' + asc 'MMMMMMMMMM' + asc 'MM' + dfb $80 +ascL asc 'LLLLLLLLLL' ;run of 63, as fill + asc 'LLLLLLLLLL' + asc 'LLLLLLLLLL' + asc 'LLLLLLLLLL' + asc 'LLLLLLLLLL' + asc 'LLLLLLLLLL' + asc 'LLL' + + dfb $81 + +zero ds 3 ;no match + dfb $81 + ds 4 ;no match + dfb $81 + ds 5 ;fill of 5 + dfb $81 + +; The auto-label should split these in half. + ds 8 +zsplit ds 8 + + hex 8282828282828282 +esplit hex 8282828282828282 + diff --git a/testdata/2000-allops-value-6502.S b/testdata/2000-allops-value-6502.S new file mode 100644 index 0000000..3fd0a81 --- /dev/null +++ b/testdata/2000-allops-value-6502.S @@ -0,0 +1,9 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + +ZP EQU $FF +ABS EQU $FEFF + + PUT allops-common-6502.S diff --git a/testdata/2001-allops-zero-6502.S b/testdata/2001-allops-zero-6502.S new file mode 100644 index 0000000..d35e34a --- /dev/null +++ b/testdata/2001-allops-zero-6502.S @@ -0,0 +1,9 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + +ZP EQU $00 +ABS EQU $0000 + + PUT allops-common-6502.S diff --git a/testdata/2002-allops-value-65C02.S b/testdata/2002-allops-value-65C02.S new file mode 100644 index 0000000..563694c --- /dev/null +++ b/testdata/2002-allops-value-65C02.S @@ -0,0 +1,9 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + +ZP EQU $FF +ABS EQU $FEFF + + PUT allops-common-65C02.S diff --git a/testdata/2003-allops-zero-65C02.S b/testdata/2003-allops-zero-65C02.S new file mode 100644 index 0000000..c4b330a --- /dev/null +++ b/testdata/2003-allops-zero-65C02.S @@ -0,0 +1,9 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + +ZP EQU $00 +ABS EQU $0000 + + PUT allops-common-65C02.S diff --git a/testdata/2004-numeric-types.S b/testdata/2004-numeric-types.S new file mode 100644 index 0000000..f990582 --- /dev/null +++ b/testdata/2004-numeric-types.S @@ -0,0 +1,52 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + + rts + + dfb $11 ;.dd1 + dw $1122 ;.dd2 + adr $112233 ;.dd3 + adrl $11223344 ;.dd4 + + dfb $11 ;.dbd1 + ddb $1122 ;.dbd2 + dfb $11,$22,$33 ;.dbd3 + dfb $11,$22,$33,$44 ;.dbd4 + + ds 2 ;.fill + dfb $80 + ds 3 ;.fill + dfb $80 + ds 4 ;.fill + dfb $80 + ds 5 ;.fill + dfb $80 + ds 256 ;.fill + dfb $80 + + ds 257,$cc ;.fill + + hex 11 ;.bulk + dfb $80 + hex 11223344556677889900 ;.bulk + dfb $80 + hex 00112233445566778899aabbccddeeff ;4 lines .bulk + hex 00112233445566778899aabbccddeeff ;add a comment + hex 00112233445566778899aabbccddeeff + hex ffeeddccbbaa99887766554433221100 + dfb $80 + +; align to 256-byte boundary + ds \,$aa ;.junk, align 256 + dfb $81 + ds 63,$00 ;.junk, align 64 + dfb $81 + ds 31,$ab ;.junk, align 32 + hex 0000000000000001 ;.junk (should become .dense) + dfb $81 + hex 1000000000000000 ;.junk (should become .dense) + dfb $81 + hex dddd ;EDIT FILE: give this a bogus alignment + ds \,$00 ;.junk, align 256 diff --git a/testdata/2005-string-types.S b/testdata/2005-string-types.S new file mode 100644 index 0000000..e88fd06 --- /dev/null +++ b/testdata/2005-string-types.S @@ -0,0 +1,147 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + + rts + +* simple strings +* High-ASCII quoted text uses embedded high-ascii double-quotes, mostly to +* test Merlin's behavior. Note that a mix of high- and low-ASCII won't be +* handled as a single string. + asc 'low ASCII str' + dfb $80 + asc "high ASCII str" + dfb $80 + asc 27,'low',27,'quoted',222727,'text' + dfb $80 + asc A2,"high",A2,"quoted",A7A2A2,"text" + dfb $80 + asc '01234567890123456789012345678901234567890123456789012345678901234567890123456789' ; 80 chars + dfb $80 + +* edge cases for 64-char operand, single-quote delimiter (primarily for Merlin 32) + asc '0123456789012345678901234567890123456789012345678901234567',272727 + dfb $80 + asc '01234567890123456789012345678901234567890123456789012345678',272727 + dfb $80 + asc '012345678901234567890123456789012345678901234567890123456789',272727 + dfb $80 + asc '0123456789012345678901234567890123456789012345678901234567890',272727 + dfb $80 + asc '01234567890123456789012345678901234567890123456789012345678901',272727 + dfb $80 + +* edge cases for 64-char operand, double-quote delimiter (primarily for cc65) + asc '012345678901234567890123456789012345678901234567890167',222222 + dfb $80 + asc '0123456789012345678901234567890123456789012345678901678',222222 + dfb $80 + asc '01234567890123456789012345678901234567890123456789016789',222222 + dfb $80 + asc '012345678901234567890123456789012345678901234567890167890',222222 + dfb $80 + asc '0123456789012345678901234567890123456789012345678901678901',222222 + + dfb $81 + +* 62 high-ASCII underscores. Should be one line. + asc "********************************" + asc "******************************" + + dfb $80 + +* 96 high-ASCII underscores. Might be converted to "fill". + asc "********************************" + asc "********************************" + asc "********************************" + + dfb $81 + +* reverse strings; cannot intersperse hex + rev 'low ASCII rev' + dfb $80 + rev "high ASCII rev" + dfb $80 + rev 'No man is an island, entire of itself; every man is a piece of the continent, a part of the main. If a clod be washed away by the sea, Europe is the less. As well as if a promontory were. As well as if a manor of thy friends or of thine own were. Any mans death diminishes me, because I am involved in mankind, and therefore never send to know for whom the bell tolls; it tolls for thee.' ; 389 chars + + dfb $81 + +* null-terminated strings + dfb $00 ;empty string, requires project edit + dfb $80 + asc 'low ASCII strz',00 + dfb $80 + asc "high ASCII strz",00 + dfb $80 + asc 27,'low',27,'quoted',222727,'text',00 + dfb $80 + asc A2,"high",A2,"quoted",A7A2A2,"text",00 + dfb $80 + asc '012345678901234567890123456789012345678901234567890123456789',27272700 + dfb $80 + asc '01234567890123456789012345678901234567890123456789012345678901234567890123456789',00 + + dfb $81 + +* string with leading length byte + str '' ;requires project edit + dfb $80 + str 'low ASCII str1' + dfb $80 + str "high ASCII str1" + dfb $80 + str 27,'low',27,'quoted',222727,'text' + dfb $80 + str A2,"high",A2,"quoted",A7A2A2,"text" + dfb $80 + str '012345678901234567890123456789012345678901234567890123456789',272727 + dfb $80 + str '01234567890123456789012345678901234567890123456789012345678901234567890123456789' + + dfb $81 + +* string with leading length word + strl '' ;requires project edit + dfb $80 + strl 'low ASCII str2' + dfb $80 + strl "high ASCII str2" + dfb $80 + strl 27,'low',27,'quoted',222727,'text' + dfb $80 + strl A2,"high",A2,"quoted",A7A2A2,"text" + dfb $80 + strl '012345678901234567890123456789012345678901234567890123456789',272727 + dfb $80 + strl '01234567890123456789012345678901234567890123456789012345678901234567890123456789' + dfb $80 + strl 'No man is an island, entire of itself; every man is a piece of the continent, a part of the main. If a clod be washed away by the sea, Europe is the less. As well as if a promontory were. As well as if a manor of thy friends or of thine own were. Any mans death diminishes me, because I am involved in mankind, and therefore never send to know for whom the bell tolls; it tolls for thee.' ; 389 chars + + dfb $81 + +* DCI (dextral character inverted) + dci 'low ASCII dci' + dfb $80 + dci "high ASCII dci" + dfb $80 + dci 27,'low',27,'quoted',222727,'text' + dfb $80 + dci A2,"high",A2,"quoted",A7A2A2,"text" + dfb $80 + dci '012345678901234567890123456789012345678901234567890123456789',272727 + dfb $80 + dci '01234567890123456789012345678901234567890123456789012345678901234567890123456789' + + dfb $81 + +* reverse DCI (deprecated, requires project edit) + asc F2,'icd IICSA wol' + dfb $80 + asc 72,"icd IICSA hgih" + dfb $80 + asc B9,'8765432109876543210987654321098765432109876543210987654321098765432109876543210' ; 80 chars + dfb $80 + asc AE,'eeht rof sllot ti ;sllot lleb eht mohw rof wonk ot dnes reven erofereht dna ,dniknam ni devlovni ma I esuaceb ,em sehsinimid htaed snam ynA .erew nwo eniht fo ro sdneirf yht fo ronam a fi sa llew sA .erew yrotnomorp a fi sa llew sA .ssel eht si eporuE ,aes eht yb yawa dehsaw eb dolc a fI .niam eht fo trap a ,tnenitnoc eht fo eceip a si nam yreve ;flesti fo eritne ,dnalsi na si nam oN' + + dfb $81 diff --git a/testdata/2006-operand-formats.S b/testdata/2006-operand-formats.S new file mode 100644 index 0000000..9a027bd --- /dev/null +++ b/testdata/2006-operand-formats.S @@ -0,0 +1,86 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + + org $1000 + +; 65816 with short regs + clc + xce + sep #$30 + mx %11 + +; Basic operand formats. Show first set as hex, second as decimal, +; third as binary. + lda $01 + lda $0102 + ldal $010203 + + lda $01 + lda $0102 + ldal $010203 + + lda $01 + lda $0102 + ldal $010203 + + bra :skipdata + +; Now hex/decimal/binary, 1-2-3-4 bytes, in data area. + hex 01010201020301020304 + hex 01010201020301020304 + hex 01010201020301020304 + +:skipdata + +; Convert these to ASCII; requires editing file. The code generator +; should display some of these as hex. + lda #$68 + lda $68 + lda: $0068 + ldal $000068 + + lda #$1f + lda #$20 + lda #$22 + lda #$27 + lda #$7e + lda #$7f + lda #$80 + lda #$9f + lda #$a0 + lda #$a2 + lda #$a7 + lda #$fe + lda #$ff + +; Switch to long regs, continue with ASCII. + rep #$30 + mx %00 + + lda #$0068 + lda #$00c8 + lda #$6868 + + rts + +; Continuing with ASCII +:ascii + dfb $68 + dfb $80 + dw $6868 + dfb $80 + + +; Format first set as address, second set as symbol. + dw :skipdata + adr :skipdata + dfb >:skipdata,:skipdata ;format as big-endian address + + dfb :ascii + dfb >:ascii + dw :ascii + adr :ascii + dfb >:ascii,:ascii ;format as big-endian symbol + diff --git a/testdata/2007-labels-and-symbols.S b/testdata/2007-labels-and-symbols.S new file mode 100644 index 0000000..2c3b071 --- /dev/null +++ b/testdata/2007-labels-and-symbols.S @@ -0,0 +1,232 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + +absl equ $1029 +absh equ $feed +zip equ $cd +biggie equ $123456 +thirty2 equ $12345678 + + org $012345 + +start ;set this label + clc + xce + +; load 8/16/24-bit symbols in different ways + sep #$30 + mx %11 + lda #zip + lda #zip+16 + lda #zip+64 + + lda #absh + lda #absh+64 + + lda #absl + lda #absl-64 + + lda #start + lda #^start + + pea absh ;leave as default + pea start + pea ^start + pea biggie + pea ^biggie + pea absh ;convert to symbol + pea start + pea ^start + pea biggie + pea ^biggie + + lda zip+1 + lda: zip+1 + ldal zip+1 + lda absh-1 + ldal absh-1 + lda absh+1 + ldal absh+1 + lda start+1 + ldal start+1 + lda start-1 + ldal start-1 + lda biggie+1 + ldal biggie+1 + lda biggie-1 + ldal biggie-1 + + rep #$30 + mx %00 + lda #zip + lda #zip+16 + lda #zip+64 + + lda #absl + lda #absl-$1000 + lda #^absl-$1000 + + lda #absh + lda #absh+$1000 + lda #^absh+$1000 + + lda #start + lda #^start + + lda #biggie + lda #^biggie + + bra :skipdata + +; reference 16/24-bit symbol in data statements + dfb zip + dfb absh + dfb start + dfb ^start + + dw zip + dw absl + dw absl-$1000 + dw absh + dw absh+$1000 + dw start + dw ^start + dw start+1 + dw ^start+1 + + dfb >absh ;format as 16-bit big-endian + dfb absh + adr start + adr ^start + + adrl zip + adrl absh + adrl start-1 + adrl ^start-1 + +:skipdata + lda #$11 ;format as biggie + mvn biggie,start ;format w/symbols + mvp start,biggie + mvn biggie,start ;format as decimal + mvp start,biggie ;format as binary + per :skipdata + brl :forward +:forward jml nextchunk + + org $1000 +nextchunk + nop ;leave this as auto-label + nop ;label this L1000 + nop ;label this L1000_0 + sep #$30 + mx %11 + +plataddr equ $3000 ;address only in platform file +projover equ $3100 ;replaced by proj symbol w/same name, diff addr (no match) +projalso equ $3200 ;also in project, twice w/different name +/- alpha; low should win +nosym equ $3300 ;should not match anything + + lda plataddr + lda projover + lda projalso + lda nosym + + bra :next + +target0 nop +target1 nop ;point everything here +target2 nop + + +t0 per target0 + per target1 + per target2 + jsr target0 + jsr target1 + jsr target2 +t1a bra target0 +t1b bra target1 +t1c bra target2 +t2a brl target0 +t2b brl target1 +t2c brl target2 +t3a jmp target0 +t3b jmp target1 +t3c jmp target2 +t4a jml target0 +t4b jml target1 +t4c jml target2 + +:next + jsr t0 + jsr t1a + jsr t1b + jsr t1c + jsr t2a + jsr t2b + jsr t2c + jsr t3a + jsr t3b + jsr t3c + jsr t4a + jsr t4b + jsr t4c + + brl :skiphex + + hex 808182838485868788898a8b8c8d8e8f ;add label and comment + hex 808182838485868788898a8b8c8d8e8f + hex 808182838485868788898a8b8c8d8e8f + hex 808182838485868788898a8b8c8d8e8f + hex 808182838485868788898a8b8c8d8e8f + hex 808182838485868788898a8b8c8d8e8f + hex 808182838485868788898a8b8c8d8e8f + + asc 'This is a long string. Put a label and comment ' + asc 'on it to confirm that the label and comment only ' + asc 'appear on the first line. The quick brown fox ' + asc 'jumps over the lazy dogs.' + +:skiphex + +; extract bytes from 32-bit value with short regs + lda #thirty2 + 768 + lda #^thirty2 + rep #$30 + mx %00 + lda #thirty2 + 1024 + lda #^thirty2 + + rts + diff --git a/testdata/2008-address-changes.S b/testdata/2008-address-changes.S new file mode 100644 index 0000000..1285068 --- /dev/null +++ b/testdata/2008-address-changes.S @@ -0,0 +1,116 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + + org $1000 + clc + xce + sep #$ff ;set all flags + mx %11 + jsr one + jsr three_p ;should land inside one + jmp nextthing + + org $1100 +one bit one +one_p lda #$11 + ldx #$11 + ldy #$11 + per one_p + bra one_p + + org $1100 +two bit two + lda #$22 +two_p ldx #$22 + ldy #$22 + per two_p + jmp two_p + + org $1100 +three bit three + lda #$33 + ldx #$33 +three_p ldy #$33 + per three_p + bra three_p + + + org $2000 +nextthing + bit nextthing + beq :fwd-8 ;should just appear as hex since it's outside + bra :fwd ;BRA across org segments + + org $2020 +:fwd bit :fwd + beq offend ;branch off the end of the address area into dead space + brl endcheck ; (which wouldn't be dead without the org) + nop +offend + + org $2080 +endcheck + bit endcheck + lda offend-1 ;touch bytes at the ends, and one byte before/after + jsr offend-1 + lda offend + jsr offend + lda endcheck-1 + jsr endcheck-1 + lda endcheck + jsr endcheck + + lda $00 + beq :midinst + dfb $ad ;LDA abs + org $2100 +:midinst dfb $ea,$ea + + jmp pastdata + + org $2800 + dw * + ds 16 ;EDIT: put an org change in the middle + org $2820 + ds 16 + + org $3000 +pastdata + bit pastdata + lda #$44 + ldx #$44 + ldy #$44 + brl :fwd + dfb $00 ;put user label here or next inst +:datend dfb $01 + + org $3100 + dfb $02 ;data target should NOT get merged with previous user label +:fwd + bit :fwd + lda :datend-1 + lda :datend + lda :datend+1 + lda :datend+2 + lda :fwd-1 + beq :more + + dfb $ea,$ea ;EDIT: mark as inline data + + org $3180 + dfb $00,$01 +:more bit :more + +; xref edge case test: make sure adjustment shown is based on address + lda label1 + lda label2 ;EDIT: set operand to sym=label1 + lda label3 ;EDIT: set operand to sym=label1 + bra label3 +label1 nop +label2 nop + org $3200 +label3 bit label3 + + dfb $00,$01 ;EDIT: mark as inline data to test execution off end diff --git a/testdata/2009-branches-and-banks.S b/testdata/2009-branches-and-banks.S new file mode 100644 index 0000000..a67d610 --- /dev/null +++ b/testdata/2009-branches-and-banks.S @@ -0,0 +1,81 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: cc65 +; +; Both cc65 (2.17) and Merlin32 (1.0) have problems computing branches that +; wrap around a bank (e.g. from $0010 to $ffd0). cc65 is slightly less +; egregious in that a workaround is possible: if you specify a label that +; is in range, and then an offset, it will generate code. + + .setcpu "65816" + +symlong = $123456 + + + .org $1000 + clc + xce + sep #$30 + .a8 + .i8 + jmp zero + + .org $0000 +zero: bit a:zero +low: lda zero + lda low + bne low-$40 ;reference symbol + bmi low-$40 ;EDIT: format as hex + per low-$40 + bvs more + brl more1 +lodat: .byte $00,$01,$02 ;EDIT: set label +more: lda more-2 + brl zero-$40 ;branch to high + + .org $0080 +more1: bit a:more1 + jml bank44 + + .org $ffc0 +high: + bit high + brl high+$43 ;branch to low + + .org $440000 +bank44: cmp f:bank44 +low44: lda bank44 + lda a:bank44 & $ffff + lda z:bank44 & $ffff ;DP ref, should resolve to "zero" + bmi low44 + per low44-$40 + bne low44-$40 ;branch to high44 + brl bank44-$40 ;branch to late44 + +dat44: ;EDIT: set label + .addr dat44 ;EDIT: format as 16-bit Address + .faraddr dat44 ;EDIT: format as 24-bit Address + + .org $44ffc0 +late44: cmp f:late44 +high44: beq cont44 ;EDIT: set label + bmi late44+$44 ;branch to low44 + brl late44+$44 ;branch to low44 + +cont44: jml twok + + .org $2000 +twok: bit twok + pea dat44 & $ffff ;EDIT: set symbol=dat44 + pea dat44 >> 16 ;EDIT: set symbol=dat44 + bne skip + jmp [lodat] + +skip: nop +j1: jsr j2 ;EDIT: set symbol=j2 for all, confirm auto-labels vanish +j2: jsr j3 ;EDIT: set label +j3: jsr j1 + + jsl symlong + rts diff --git a/testdata/2009-branches-and-banks.cfg b/testdata/2009-branches-and-banks.cfg new file mode 100644 index 0000000..8db331e --- /dev/null +++ b/testdata/2009-branches-and-banks.cfg @@ -0,0 +1,8 @@ +MEMORY { + MAIN: file=%O, start=%S, size=65536; +} +SEGMENTS { + CODE: load=MAIN, type=rw; +} +FEATURES {} +SYMBOLS {} diff --git a/testdata/2010-target-adjustment.S b/testdata/2010-target-adjustment.S new file mode 100644 index 0000000..0fd0fef --- /dev/null +++ b/testdata/2010-target-adjustment.S @@ -0,0 +1,105 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + + org $1000 + +load11 lda #$11 ;EDIT: set label=load11 +load22 ldx #$22 +load33 ldy #$33 ;EDIT: set label=load33 +load44 lda #$44 +predat bra skipdat ;EDIT: set label=predat + +dat0 dw $0123 +dat1 dw $4567 ;EDIT: set label=dat1 +dat2 dw $89ab +dat3 dw $cdef +dat4 dw $0011 +dat5 dw $2233 + dfb $80 + asc 'The quick brown fox' + dfb $80 + dw skipdat ;EDIT: format these as addresses + dw skipdat-1 + dw skipdat+1 +fill0 ds 4 ;EDIT: set label=fill0 +fill1 ds 4 +fill2 ds 4 +fill3 ds 4 +postfill dfb $80 + +skipdat ;EDIT: set label=skipdat + lda dat0 ;this should get mapped to predat+2 + lda postfill + + asl dat1 ;these should coalesce to dat1 + rol dat2 + ror dat3 ;these should be auto-labeled + and dat4 + ora dat5 + + lda fill0 ;EDIT: set all labels to fill0 + sta fill1 ; and confirm that auto-labels vanish + lda fill2 ; and we get a single 16-byte .fill + sta fill3 + + jsr load22 ;should get auto label + lda load44 ;should get auto label + +; PEA/PER may want to push addr-1; make sure that works +caddr + pea caddr-1 ;should base off caddr + per caddr-1 ;should base off caddr + lda caddr+1 ;should base off caddr + lda caddr+2 ;should base off caddr + +; self-referential, self-modifying code (edge case for xrefs) + lda #$ea +srop1 sta srop1 +srop2 sta srop2+1 +srop3 sta srop3+2 ;EDIT: set operand to non-existent symbol + brl skipdat1 + + dfb $80 +dat81 dfb $81 ;EDIT: set label dat81 + + org $2000 +dat82 dfb $82 + dfb $83 + +skipdat1 + bit skipdat1 + lda dat81 + lda dat82 ;this should NOT use dat81 + +; +; Test the precise extent to which we associate a label with nearby elements. +; + bra skipmore + + dfb $7c + dfb $7d + dfb $7e + dfb $7f +nearby dfb $80 ;EDIT: label this + dfb $81 + dfb $82 + dfb $83 + dfb $84 + dfb $85 + dfb $86 + +skipmore + lda nearby-4 + lda nearby-3 + lda nearby-2 + lda nearby-1 + lda nearby + lda nearby+1 + lda nearby+2 + lda nearby+3 + lda nearby+4 + lda nearby+5 + lda nearby+6 + rts diff --git a/testdata/2011-hinting.S b/testdata/2011-hinting.S new file mode 100644 index 0000000..6f5dd0a --- /dev/null +++ b/testdata/2011-hinting.S @@ -0,0 +1,68 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + +; NOTE: set assembler to 6502, undocumented instructions disabled +; NOTE: add 2011-hinting.cs to extension scripts + +; It may be necessary to review the analyzer output to verify certain things. + +MAGIC equ $2456 ;recognized by extension script + + org $1000 + + dfb $03 ;undocumented (SLO), will halt analyzer + dfb $02 + +entry bit entry ;EDIT: add code hint to first byte + bit $11a9 ;EDIT: add code hint to middle byte (a9); creates embedded instr + + nop +embed dfb $2c +innerd ldx #$ff ;EDIT: add data hint to middle byte (a2); will be ignored + nop + jsr innerd ;analyzer should follow this path + + nop + dfb $2c +inneri ldx #$ff ;EDIT: add inline data hint to middle byte (a2); will be ignored + nop + jsr inneri ;analyzer should follow this path + + jsr MAGIC ;next 4 bytes are inline data tagged by the +magic11 lda #$11 ; extension script -- if they show up as + ldx #$22 ; LDA/LDX, the script isn't working + + jsr magic11 ;analyzer should ignore this path + + jsr magic33 ;analyzer will add this path, but the target will be inline + jsr MAGIC ; data before it gets to it +magic33 lda #$33 + ldx #$44 + +; We want to call into part2 before part1 to establish that part2 is code before the +; extension script tries to change it to inline data. The code analyzer currently uses +; a stack, so we call part 1 first, which means it will be called last. + jsr part1 + jsr part2 + + nop + + lda MAGIC ;EDIT: hint as data, format as dense hex, remove hint + + jsr dataolap + + rts + + +part1 jsr MAGIC +part2 lda #$55 + ldx #$66 + rts + +; Make sure that data descriptors that overlap with code are ignored. + hex 818283 ;EDIT: format as 4-byte int, so it overlaps with dataolap +dataolap lda #$99 + rts + diff --git a/testdata/2012-label-localizer.S b/testdata/2012-label-localizer.S new file mode 100644 index 0000000..c8d1ec7 --- /dev/null +++ b/testdata/2012-label-localizer.S @@ -0,0 +1,83 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + +; NOTE: select CPU=65C02 + +EXTSYM equ $8888 ;EDIT: give this a long label + + org $1000 + + nop +start lda :local1 + lda nextglob + lda pastglob + lda :local2 + +:local1 nop +:local2 nop +nextglob nop ;EDIT: mark label as global +pastglob nop + + lda nlocal +nlocal lda #$11 ;EDIT: mark label as global + +reach1G nop ;EDIT: mark label as global +:local lda :local ;EDIT: edit operand to symbol=reach1G + + lda reach4 ;EDIT: set operand to symbol=reach2; should stay local +reach2 nop +reach3G nop ;EDIT: mark label as global +reach4 nop + lda reach2 ;EDIT: edit operand to symbol=reach4; should stay local + + lda $00 + beq :local ;should be local + jsr reach4 ;should be local + jsr start ;should be global +:local lda #$22 + + lda gtest2 +gtest1 nop ;EDIT: mark label as global + lda gtest3 +gtest2 nop ;...which forces this to be global +gtest3 nop ;...and then this is forced to be global + + lda #$33 + + lda midlocal ;EDIT: reformat as hex +topglob nop ;EDIT: mark label as global + lda farlocal ;should be local label ref +midlocal nop ;auto-label here should vanish + nop +farlocal nop + + lda #$44 +globalnm jsr :local2 ;EDIT: mark label as global +:local1 nop +:local2 nop +:local3 nop +nglobal nop ;should get marked as global +globlat jsr nglobal ;EDIT: mark label as global + + bra cont +cont nop ;EDIT: mark label as global + lda EXTSYM + +; test localizer uniquification +; only relevant for 64tass, which uses a leading '_' to indicate local labels +_uname nop +X_uname11 nop +X_uname1 nop +X_uname nop + +; test labels with opcode names (not really a localization thing) +; EDIT: set these names, mark as global to prevent localization + lda #$00 +ANDl bne ANDl ;leave label local +JMPg bne JMPg ;make label global +jmpg bne jmpg ;lower case name +TSBg bne TSBg +XCEg bne XCEg ;should be allowed + rts diff --git a/testdata/2013-notes-and-comments.S b/testdata/2013-notes-and-comments.S new file mode 100644 index 0000000..4e1a105 --- /dev/null +++ b/testdata/2013-notes-and-comments.S @@ -0,0 +1,35 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + +; Everything of interest is in the notes and comments. We're just +; providing some anchor points. + +plataddr equ $3000 ;defined in TestSyms + + org $1000 + + lda #$01 + lda #$02 + lda #$03 + lda #$04 + lda #$05 + lda #$06 + lda #$07 + lda #$08 + lda #$09 + lda #$0a + lda #$0b + lda #$0c + lda #$0d + lda #$0e + lda #$0f + + bit plataddr + rts + + hex 000102030405060708090a0b0c0d0e0f + hex 000102030405060708090a0b0c0d0e0f + hex 000102030405060708090a0b0c0d0e0f + hex 000102030405060708090a0b0c0d0e0f diff --git a/testdata/2014-label-dp.S b/testdata/2014-label-dp.S new file mode 100644 index 0000000..e7763f5 --- /dev/null +++ b/testdata/2014-label-dp.S @@ -0,0 +1,19 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + +ZP equ $80 ;must NOT be "$0080" + +MV0 EQU $83 +MV1 EQU $84 + + PUT allops-common-65816.S + + org $0080 + bit _ZP +_ZP bit _ZP + bit _ZP +ABS bit: ABS +LONG ldal LONG + diff --git a/testdata/2016-char-encoding.S b/testdata/2016-char-encoding.S new file mode 100644 index 0000000..dccdb91 --- /dev/null +++ b/testdata/2016-char-encoding.S @@ -0,0 +1,153 @@ +; Copyright 2019 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: ACME (for the PETSCII/screen code support) + + !cpu 65816 +* = $1000 + + clc + xce + sep #$30 + !as + !rs + +; Single-byte operand + lda #'A' ;format as low ASCII + lda #'A' | $80 ;format as high ASCII + lda #'A' | $80 ;format as PETSCII + lda #'A' ;format as screen code + + ldx #'a' ;format as low ASCII + ldx #'a' | $80 ;format as high ASCII + ldx #'a' - $20 ;format as PETSCII + ldx #$01 ;format as screen code + + lda #$7f ;EDIT: force to low ASCII + lda #$7f ;EDIT: force to high ASCII + lda #$7f ;EDIT: force to PETSCII + lda #$7f ;EDIT: force to screen code + + lda #$0d ;verify the instruction operand editor only allows C64SC + +; Single letter in a 16-bit immediate + rep #$30 + !al + !rl + lda #'B' + lda #'B' | $80 + lda #'B' | $80 + lda #'B' + + sep #$30 + !as + !rs + rts + +; Single-byte data items + !byte 'C' + !byte 'C' | $80 + !byte 'C' | $80 + !byte 'C' + +; Double-byte data items + !byte 'd', 0 + !byte 'd' | $80, 0 + !byte 'd' - $20, 0 + !byte $04, 0 + +; Double-byte big-endian data items + !byte 0, 'E' + !byte 0, 'E' | $80 + !byte 0, 'E' | $80 + !byte 0, 'E' + +; Start with the basics + !byte $80 + !text "low ASCII str" +; !byte $80 ; let them run together to test scan / dialog behavior + !xor $80 { + !text "high ASCII str" + } + !byte $80 + !pet "PETSCII str" + !byte $80 + !scr "Screen Code str" + +; Get a bit fancy + !byte $82 + !text $07,"Low ASCII CRLF",$0d,$0a + !byte $82 + !xor $80 { + !text $07,"High ASCII CRLF",$0d,$0a + } + !byte $82 + !pet $93,"PETSCII with ",$96,"control",$05," codes",$0d + ; no control chars in screen code + +; Test the ASCII $20-7e range. + !byte $83 + !text " !",$22,"#$%&'()*+,-./0123456789:;<=>?" + !text "@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_" + !text "`abcdefghijklmnopqrstuvwxyz{|}~" + !byte $83 + !xor $80 { + !text " !",$22,"#$%&'()*+,-./0123456789:;<=>?" + !text "@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_" + !text "`abcdefghijklmnopqrstuvwxyz{|}~" + } + !byte $83 + !pet " !",$22,"#$%&'()*+,-./0123456789:;<=>?" + !pet "@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_" + !pet "`abcdefghijklmnopqrstuvwxyz{|}~" + !byte $83 + !scr " !",$22,"#$%&'()*+,-./0123456789:;<=>?" + !scr "@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_" + !scr "`abcdefghijklmnopqrstuvwxyz{|}~" + +; The 2005 test exercises low/high ASCII strings, so no need to do that here. +; Do a quick test with C64 characters. Note Screen Code can't be null-terminated +; by definition. + !byte $84 + !pet "IICSTEP esrever" ;format as StringReverse + !byte $84 + !pet "null term PETSCII",0 ;format as StringNullTerm + !byte $84 + !pet "This null-terminated string is too long to fit on a single line, and will be split.",0 + !byte $84 + !pet 19,"PETSCII with length" ;format as StringL8 + !byte $84 + !pet 20,0,"PETSCII with length2" ;format as StringL16 + !byte $84 + !pet "pet dcI" ;format as StringDCI + + !byte $84 + !scr "edoC neercS esrever" ;format as StringReverse + !byte $84 + !scr 23,"Screen Code with length" ;format as StringL8 + !byte $84 + !scr 24,0,"Screen Code with length2" ;format as StringL16 + !byte $84 + !scr "Screen Code DC",$c9 ;format as StringDCI + !byte $84 + + !byte $85 + +; All bytes, from 00-ff. Handy for seeing what the auto-scanner picks up. +allbytes + !hex 000102030405060708090a0b0c0d0e0f + !hex 101112131415161718191a1b1c1d1e1f + !hex 202122232425262728292a2b2c2d2e2f + !hex 303132333435363738393a3b3c3d3e3f + !hex 404142434445464748494a4b4c4d4e4f + !hex 505152535455565758595a5b5c5d5e5f + !hex 606162636465666768696a6b6c6d6e6f + !hex 707172737475767778797a7b7c7d7e7f + !hex 808182838485868788898a8b8c8d8e8f + !hex 909192939495969798999a9b9c9d9e9f + !hex a0a1a2a3a4a5a6a7a8a9aaabacadaeaf + !hex b0b1b2b3b4b5b6b7b8b9babbbcbdbebf + !hex c0c1c2c3c4c5c6c7c8c9cacbcccdcecf + !hex d0d1d2d3d4d5d6d7d8d9dadbdcdddedf + !hex e0e1e2e3e4e5e6e7e8e9eaebecedeeef + !hex f0f1f2f3f4f5f6f7f8f9fafbfcfdfeff diff --git a/testdata/2019-local-variables.S b/testdata/2019-local-variables.S new file mode 100644 index 0000000..db1922b --- /dev/null +++ b/testdata/2019-local-variables.S @@ -0,0 +1,159 @@ +; Copyright 2019 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + +; EDIT: add __ENABLE_LABEL_LOCALIZATION to project symbols + + org $1000 + +; Define these as project symbols. +PROJ_ZERO equ $00 +PROJ_ONE equ $01 +CONST_ZERO equ $f0 +CONST_ONE equ $f1 +PTR_2 equ $f8 ;used to test uniqifier later on + + ldy PROJ_ZERO + lda (PROJ_ONE),y + sta $03 ;undefined yet + ldx $04 ;undefined yet + lda CONST_ZERO,S ;explicitly set symbol + sta CONST_ONE,S ;leave as default (hex) + +; TABLE - test redefinition of project symbol values +]VAR_ZERO equ $00 ;2b +]VAR_TWO equ $02 ;1b +]VAR_THREE equ $03 ;1b +]CONST_ZERO equ $f0 ;1b const + + ldy PROJ_ZERO ;should become ]VAR_ZERO + lda (PROJ_ONE),y ;should become ]VAR_ZERO+1 + sta $03 ;should become ]VAR_THREE + ldx $04 ;undefined yet + lda CONST_ZERO,S ;should become ]CONST_ZERO + sta CONST_ONE,S ;leave as default (hex) + + eor $00 ;explicitly format as decimal + ora $f0,S ;explicitly format as decimal + +; TABLE - test redefinition of symbol labels +]PROJ_ZERO equ $10 ;EDIT: rename to PROJ_ZERO +]DPCODE equ $80 ;EDIT: rename to DPCODE + + lda $00 + lda $01 + lda $02 + lda $03 + lda $04 + lda $10 + lda $11 + lda $80 + +; TABLE/CLEAR - empty table + ldx $00 + ldx $01 + ldx $02 + +; confirm that hidden tables are skipped over + dfb $2c +; TABLE (hidden) +]HIDDEN0 equ $00 +]HIDDEN1 equ $01 + lda #$ff + ldy $00 + ldy $01 + ldy $02 + + dfb $2c +; TABLE (not hidden) +]NH0 equ $00 +]NH1 equ $01 +:label lda #$fe + beq :label + ldy $00 + ldy $01 + ldy $02 + + nop + +; TABLE +]PTR0 equ $10 ;2b +]CONST0 equ $10 ;4b + lda ]PTR0 + ldx ]PTR0+1 + ldy ]PTR0+2 ;should be hex + lda (]CONST0,S),y + sta (]CONST0+3,S),y + +; test redefinition of name + +; TABLE +]PTR equ $20 ;2b + ldx ]PTR +; TABLE +]PTR equ $22 ;2b + ldx ]PTR +; TABLE +]PTR equ $24 ;2b + ldx ]PTR + +; define user label to try to trip up the uniqifier +PTR_1 nop + + +; test redefinition of value +; TABLE/CLEAR +]PTR_A equ $20 ;2b + ldy ]PTR_A ;PTR_A +]PTR_B equ $1f ;2b + ldy ]PTR_A ;PTR_B+1 +]PTR_C equ $1d ;4b + ldy ]PTR_A ;PTR_C+3 +]PTR_D equ $21 ;1b + ldy ]PTR_A ;should come up as hex + +; TABLE +]VAL0 equ $30 ;1b +]VAL1 equ $31 ;1b +]VAL2 equ $32 ;1b +]VAL3 equ $33 ;1b +]VAL4 equ $34 ;1b +]VAL5 equ $35 ;1b + and ]VAL0 + and ]VAL1 + and ]VAL2 + and ]VAL3 + and ]VAL4 + and ]VAL5 +; TABLE +]VAL14 equ $31 ;4b + and ]VAL0 + and ]VAL1 ;these four become ]VAL14 + and ]VAL2 + and ]VAL3 + and ]VAL4 + and ]VAL5 + + +; TABLE - test direct page label vs. variable +]DPNOP equ $80 + lda ]DPNOP + jsr DPCODE + rts + + org $0080 +DPCODE nop + lda DPCODE ;should be DPNOP + lda |DPCODE ;should be DPCODE + lda >DPCODE ;should be DPCODE + +; Local label test. ca65 v2.18 erases cheap local label scope when it +; encounters a constant or .set. +LOCAL1 lda #$2c ;EDIT: format as ASCII + ldx $1234 ;put variable table here with one arbitrary entry + beq LOCAL1 +LOCAL2 lda $2c ;EDIT: format as ASCII + ldx $5678 ;put empty variable table here + beq LOCAL2 + rts diff --git a/testdata/2020-cycle-counts-65816.S b/testdata/2020-cycle-counts-65816.S new file mode 100644 index 0000000..f7691db --- /dev/null +++ b/testdata/2020-cycle-counts-65816.S @@ -0,0 +1,80 @@ +; Copyright 2019 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + +; Exercise cycle counting. We use 65816 to test the behavior with variable- +; width registers. This means we're not testing the 65C02 D-flag behavior +; or some other non-65816 quirks. If that becomes an issue we'll need to +; create additional tests. +; +; Very little editing required. Just set the initial ORG and add +; "__ENABLE_CYCLE_COUNTS" to the list of project symbols. + + org $10f0 +start sec + xce + mx %11 + bra cont ;crosses page boundary + ds 20 + +cont bra near +near + + lda #$00 + beq next ;always (3 cycles) + brk $00 +next bne next ;never (2 cycles) + lda $1234 + beq maybe ;sometimes (2+ cycles) + brk $01 ;(7 cycles) +maybe lda $22,S + trb $02 + asl $03,x + + clc + xce + rep #$30 + mx %00 + + lda #$11 + ldy #$22 + trb $04 ;should be +2 cycles + asl $05,x ;should be +2 cycles + ldx $1235 + beq maybe2 + brk $02 ;(8 cycles) +maybe2 lda $33,S + beq maybe3 + bra start ;crosses page boundary, no + when E=0 +maybe3 + + rep #$20 + sep #$10 + sta $10 + stx $11 + sty $12 + rep #$10 + sep #$20 + sta $11 + stx $12 + sty $13 + rep #$30 + +; On the 65816, the setting of the decimal flag should NOT have any effect. + lda $1234 + adc #$66 + adc $1235 + sed + adc #$77 + adc $1236 + + sec + xce + sbc #$88 + sbc $1237 + cld + sbc #$99 + sbc $1238 + rts + diff --git a/testdata/2021-external-symbols.S b/testdata/2021-external-symbols.S new file mode 100644 index 0000000..5e45e3d --- /dev/null +++ b/testdata/2021-external-symbols.S @@ -0,0 +1,169 @@ +; Copyright 2019 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + +; EDIT: the project must include the three platform symbol files. + + org $1000 + +; make sure platform symbols don't get set for file data +; DO NOT set a user label here +Start lda Start-1 ;CodeWrap+255 + ldx Start ;(auto) + ldy Start+1 ;(auto+1) + lda END ;(auto) + lda END+1 ;CodeWrap+X + lda END+8 ;CodeWrap+Y + + nop + +; test overlapping labels (multiple sym files) + lda $1ffe ;(no sym) + lda $1fff ;should be SameName1-1 + lda $2000 ;should be SameName1 + + lda $200f ;(no sym) + lda $2010 ;should be SameName2-1 + lda $2011 ;should be SameName2 + lda $2012 ;(no sym) + + lda $201f ;(no sym) + lda $2020 ;(no sym) + lda $2021 ;should be sym-1 + lda $2022 ;should be SameName3 + + nop + +; test overlapping values (multiple sym files) + lda $2100 ;should be SameValA_A + lda $2110 ;should be SameValB_A + lda $2120 ;should be SameValC_C + + nop + +; test overlap with project symbol +; EDIT: define project symbols ProjSym1 at $2202(4b) and ProjSim2 at $220a(1b) + lda $21fe ;(no sym) + lda $21ff ;SYM-1 + lda $2200 ;ChkProj1 + lda $2201 ;ChkProj1+1 + lda $2202 ;ProjSym + lda $2203 ;ProjSym1+1 + lda $2204 ;ProjSym1+2 + lda $2205 ;ProjSym1+3 + lda $2206 ;ChkProj2+2 + lda $2207 ;ChkProj2+3 + lda $2208 ;(no sym) + lda $2209 ;ProjSym2-1 + lda $220a ;ProjSym2 + lda $220b ;(no sym) + + nop + +; test overlapping regions, single file + lda $2ffe ;(no sym) + lda $2fff ;Over1-1 + lda $3000 ;Over1 + lda $3001 ;Over1+1 + lda $3002 ;Over2 + lda $3003 ;Over2+1 + lda $3004 ;Over2+2 + lda $3005 ;Over2+3 + lda $3006 ;Over2a + lda $3007 ;Over3+1 + lda $3008 ;Over3+2 + lda $3009 ;Over3+3 + lda $300a ;Over3+4 + lda $300b ;Over3+5 + lda $300c ;Over3+6 + lda $300d ;Over1+13 + lda $300e ;Over1+14 + lda $300f ;Over1+15 + lda $3010 ;(no sym) + + nop + +; test overlapping regions, multiple platform files + lda $30fe ;(no sym) + lda $30ff ;SepOver1-1 + lda $3100 ;SepOver1 + lda $3101 ;SepOver1+1 + lda $3102 ;SepOver1+2 + lda $3103 ;SepOver1+3 + lda $3104 ;SepOver2+2 + lda $3105 ;SepOver2+3 + lda $3106 ;(no sym) + + nop + +; test overlap with local variable +; EDIT: create variable LocalVar at $41(2b) + ldx $3e ;(no sym) + ldx $3f ;should be OverVar-1 + ldx $40 ;should be OverVar + ldx $41 ;should be LocalVar + ldx $42 ;should be LocalVar+1 + ldx $43 ;should be OverVar+3 + ldx $44 ;(no sym) + + nop + + lda $3fff ;EDIT: change to "FatConst" + lda $4000 ;(no sym) + lda $4001 ;(no sym) + +; test bank wrap + lda $fff8 ;should be BankWrap+8 + lda $08 ;should be BankWrap+24 or + dfb $85 ;2: STA imm + dfb $ff ;1: address $eaff + nop ;2: + + rts + +PrintInline8String rts ;EDIT: set label +PrintInlineRev8String rts ;EDIT: set label +PrintInlineNullString rts ;EDIT: set label + +data01 ;EDIT: set label + dw $1122 ;should be little-endian + dw $4433 ;should be big-endian + hex 55667788 ;32-bit + hex 99887766 ;32-bit big-endian + dfb 'f' ;ASCII + dfb "F" ;high ASCII + hex 40C142C344C546C7 ;bad DCI string + hex 002001 ;24-bit addr + dw data02 ;by symbol + + dfb $80 + +data02 ;EDIT: set label, must be "data02" + dw data03 + dfb $80 + +data03 ;EDIT: set label + asc "AllEight" + + +; check address split across string +broken jsr PrintInlineNullString + asc 'broken ',01 + org $1100 ;EDIT: split address + asc 'string',00 + rts + +too_long jsl PrintInlineL2String + dw END-*+1 ;should be 1 byte over; want it to be rejected by + rts ; function in .cs (otherwise code overlap race) + +; MUST be last +off_end jsr PrintInlineNullString +nonterm asc 'end' + +END equ * diff --git a/testdata/allops-common-6502.S b/testdata/allops-common-6502.S new file mode 100644 index 0000000..888a9ae --- /dev/null +++ b/testdata/allops-common-6502.S @@ -0,0 +1,283 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + + ORG $1000 + + JSR PostBRK + JSR PostH02 + JSR PostH12 + JSR PostH22 + JSR PostH32 + JSR PostRTI + JSR PostH42 + JSR PostH52 + JSR PostRTS + JSR PostH62 + JSR PostJMPI + JSR PostH72 + JSR PostH92 + JSR PostHB2 + JSR PostHD2 + JSR PostHF2 + NOP + NOP + NOP + BRK ZP ;$00 +PostBRK ORA (ZP,X) + DFB $02 +PostH02 DFB $03,ZP + DFB $04,ZP + ORA ZP + ASL ZP + DFB $07,ZP + PHP + ORA #ZP + ASL + DFB $0B,ZP + DFB $0C,#ABS + ORA: ABS + ASL: ABS + DFB $0F,#ABS + BPL PostBPL ;$10 +PostBPL ORA (ZP),Y + DFB $12 +PostH12 DFB $13,ZP + DFB $14,ZP + ORA ZP,X + ASL ZP,X + DFB $17,ZP + CLC + ORA: ABS,Y + DFB $1A + DFB $1B,#ABS + DFB $1C,#ABS + ORA: ABS,X + ASL: ABS,X + DFB $1F,#ABS + JSR ABS ;$20 + AND (ZP,X) + DFB $22 +PostH22 DFB $23,ZP + BIT ZP + AND ZP + ROL ZP + DFB $27,ZP + PLP + AND #ZP + ROL + DFB $2B,ZP + BIT: ABS + AND: ABS + ROL: ABS + DFB $2F,#ABS + BMI PostBMI ;$30 +PostBMI AND (ZP),Y + DFB $32 +PostH32 DFB $33,ZP + DFB $34,ZP + AND ZP,X + ROL ZP,X + DFB $37,ZP + SEC + AND: ABS,Y + DFB $3A + DFB $3B,#ABS + BIT: ABS,X + AND: ABS,X + ROL: ABS,X + DFB $3F,#ABS + RTI ;$40 +PostRTI EOR (ZP,X) + DFB $42 +PostH42 DFB $43,ZP + DFB $44,ZP + EOR ZP + LSR ZP + DFB $47,ZP + PHA + EOR #ZP + LSR + DFB $4B,ZP + JMP PostJMP +PostJMP EOR: ABS + LSR: ABS + DFB $4f,#ABS + BVC PostBVC ;$50 +PostBVC EOR (ZP),Y + DFB $52 +PostH52 DFB $53,ZP + DFB $54,ZP + EOR ZP,X + LSR ZP,X + DFB $57,ZP + CLI + EOR: ABS,Y + DFB $5A + DFB $5B,#ABS + DFB $5C,#ABS + EOR: ABS,X + LSR: ABS,X + DFB $5F,#ABS + RTS ;$60 +PostRTS ADC (ZP,X) + DFB $62 +PostH62 DFB $63,ZP + DFB $64,ZP + ADC ZP + ROR ZP + DFB $67,ZP + PLA + ADC #ZP + ROR + DFB $6B,ZP + JMP (ABS) +PostJMPI ADC: ABS + ROR: ABS + DFB $6F,#ABS + BVS PostBVS ;$70 +PostBVS ADC (ZP),Y + DFB $72 +PostH72 DFB $73,ZP + DFB $74,ZP + ADC ZP,X + ROR ZP,X + DFB $77,ZP + SEI + ADC: ABS,Y + DFB $7A + DFB $7B,#ABS + DFB $7C,#ABS + ADC: ABS,X + ROR: ABS,X + DFB $7F,#ABS + DFB $80,ZP ;$80 + STA (ZP,X) + DFB $82,ZP + DFB $83,ZP + STY ZP + STA ZP + STX ZP + DFB $87,ZP + DEY + DFB $89,ZP + TXA + DFB $8B,ZP + STY: ABS + STA: ABS + STX: ABS + DFB $8F,#ABS + BCC PostBCC ;$90 +PostBCC STA (ZP),Y + DFB $92 +PostH92 DFB $93,ZP + STY ZP,X + STA ZP,X + STX ZP,Y + DFB $97,ZP + TYA + STA: ABS,Y + TXS + DFB $9B,#ABS + DFB $9C,#ABS + STA: ABS,X + DFB $9E,#ABS + DFB $9F,#ABS + LDY #ZP ;$A0 + LDA (ZP,X) + LDX #ZP + DFB $A3,ZP + LDY ZP + LDA ZP + LDX ZP + DFB $A7,ZP + TAY + LDA #ZP + TAX + DFB $AB,ZP + LDY: ABS + LDA: ABS + LDX: ABS + DFB $AF,#ABS + BCS PostBCS ;$B0 +PostBCS LDA (ZP),Y + DFB $B2 +PostHB2 DFB $B3,ZP + LDY ZP,X + LDA ZP,X + LDX ZP,Y + DFB $B7,ZP + CLV + LDA: ABS,Y + TSX + DFB $BB,#ABS + LDY: ABS,X + LDA: ABS,X + LDX: ABS,Y + DFB $BF,#ABS + CPY #ZP ;$C0 + CMP (ZP,X) + DFB $C2,ZP + DFB $C3,ZP + CPY ZP + CMP ZP + DEC ZP + DFB $C7,ZP + INY + CMP #ZP + DEX + DFB $CB,ZP + CPY: ABS + CMP: ABS + DEC: ABS + DFB $CF,#ABS + BNE PostBNE ;$D0 +PostBNE CMP (ZP),Y + DFB $D2 +PostHD2 DFB $D3,ZP + DFB $D4,ZP + CMP ZP,X + DEC ZP,X + DFB $D7,ZP + CLD + CMP: ABS,Y + DFB $DA + DFB $DB,#ABS + DFB $DC,#ABS +L11FC CMP: ABS,X + DEC: ABS,X + DFB $DF,#ABS + CPX #ZP ;$E0 + SBC (ZP,X) + DFB $E2,ZP + DFB $E3,ZP + CPX ZP + SBC ZP + INC ZP + DFB $E7,ZP + INX + SBC #ZP + NOP + DFB $EB,ZP + CPX: ABS + SBC: ABS + INC: ABS + DFB $EF,#ABS + BEQ PostBEQ ;$F0 +PostBEQ SBC (ZP),Y + DFB $F2 +PostHF2 DFB $F3,ZP + DFB $F4,ZP + SBC ZP,X + INC ZP,X + DFB $F7,ZP + SED + SBC: ABS,Y + DFB $FA + DFB $FB,#ABS + DFB $FC,#ABS + SBC: ABS,X + INC: ABS,X + DFB $FF,#ABS + diff --git a/testdata/allops-common-65816.S b/testdata/allops-common-65816.S new file mode 100644 index 0000000..1b895f8 --- /dev/null +++ b/testdata/allops-common-65816.S @@ -0,0 +1,276 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + + ORG $1000 + + SEC + XCE + JSR L101F + JSR L10AB + JSR L10F2 + JSR L1106 + JSR L1109 + JSR L112C + JSR L11F9 + JSR L11FC + NOP + NOP + NOP + BRK ZP +L101F ORA (ZP,X) + COP ZP + ORA ZP,S + TSB ZP + ORA ZP + ASL ZP + ORA [ZP] + PHP + ORA #ZP + ASL + PHD + TSB: ABS + ORA: ABS + ASL: ABS + ORAL LONG + BPL L1041 +L1041 ORA (ZP),Y + ORA (ZP) + ORA (ZP,S),Y + TRB ZP + ORA ZP,X + ASL ZP,X + ORA [ZP],Y + CLC + ORA: ABS,Y + INC + TCS + TRB: ABS + ORA: ABS,X + ASL: ABS,X + ORAL LONG,X + JSR ABS + AND (ZP,X) + JSL LONG + AND ZP,S + BIT ZP + AND ZP + ROL ZP + AND [ZP] + PLP + AND #ZP + ROL + PLD + BIT: ABS + AND: ABS + ROL: ABS + ANDL LONG + BMI L1089 +L1089 AND (ZP),Y + AND (ZP) + AND (ZP,S),Y + BIT ZP,X + AND ZP,X + ROL ZP,X + AND [ZP],Y + SEC + AND: ABS,Y + DEC + TSC + BIT: ABS,X + AND: ABS,X + ROL: ABS,X + ANDL LONG,X + RTI +L10AB EOR (ZP,X) + WDM ZP + EOR ZP,S + MVP MV1,MV0 + EOR ZP + LSR ZP + EOR [ZP] + PHA + EOR #ZP + LSR + PHK + JMP L10C2 +L10C2 EOR: ABS + LSR: ABS + EORL LONG + BVC L10CE +L10CE EOR (ZP),Y + EOR (ZP) + EOR (ZP,S),Y + MVN MV1,MV0 + EOR ZP,X + LSR ZP,X + EOR [ZP],Y + CLI + EOR: ABS,Y + PHY + TCD + JML L10E7 +L10E7 EOR: ABS,X + LSR: ABS,X + EORL LONG,X + RTS +L10F2 ADC (ZP,X) + PER $0FF6 ;TODO: change + ADC ZP,S + STZ ZP + ADC ZP + ROR ZP + ADC [ZP] + PLA + ADC #ZP + ROR + RTL +L1106 JMP (ABS) +L1109 ADC: ABS + ROR: ABS + ADCL LONG + BVS L1115 +L1115 ADC (ZP),Y + ADC (ZP) + ADC (ZP,S),Y + STZ ZP,X + ADC ZP,X + ROR ZP,X + ADC [ZP],Y + SEI + ADC: ABS,Y + PLY + TDC + JMP (ABS,X) +L112C ADC: ABS,X + ROR: ABS,X + ADCL LONG,X + BRA L1138 +L1138 STA (ZP,X) + BRL L113D +L113D STA ZP,S + STY ZP + STA ZP + STX ZP + STA [ZP] + DEY + BIT #ZP + TXA + PHB + STY: ABS + STA: ABS + STX: ABS + STAL LONG + BCC L115B +L115B STA (ZP),Y + STA (ZP) + STA (ZP,S),Y + STY ZP,X + STA ZP,X + STX ZP,Y + STA [ZP],Y + TYA + STA: ABS,Y + TXS + TXY + STZ: ABS + STA: ABS,X + STZ: ABS,X + STAL LONG,X + LDY #ZP + LDA (ZP,X) + LDX #ZP + LDA ZP,S + LDY ZP + LDA ZP + LDX ZP + LDA [ZP] + TAY + LDA #ZP + TAX + PLB + LDY: ABS + LDA: ABS + LDX: ABS + LDAL LONG + BCS L11A0 +L11A0 LDA (ZP),Y + LDA (ZP) + LDA (ZP,S),Y + LDY ZP,X + LDA ZP,X + LDX ZP,Y + LDA [ZP],Y + CLV + LDA: ABS,Y + TSX + TYX + LDY: ABS,X + LDA: ABS,X + LDX: ABS,Y + LDAL LONG,X + CPY #ZP + CMP (ZP,X) + REP #$00 + CMP ZP,S + CPY ZP + CMP ZP + DEC ZP + CMP [ZP] + INY + CMP #ZP + DEX + WAI + CPY: ABS + CMP: ABS + DEC: ABS + CMPL LONG + BNE L11E5 +L11E5 CMP (ZP),Y + CMP (ZP) + CMP (ZP,S),Y + PEI ZP + CMP ZP,X + DEC ZP,X + CMP [ZP],Y + CLD + CMP: ABS,Y + PHX + STP +L11F9 JML [ABS] +L11FC CMP: ABS,X + DEC: ABS,X + CMPL LONG,X + CPX #ZP + SBC (ZP,X) + SEP #$00 + SBC ZP,S + CPX ZP + SBC ZP + INC ZP + SBC [ZP] + INX + SBC #ZP + NOP + XBA + CPX: ABS + SBC: ABS + INC: ABS + SBCL LONG + BEQ L122A +L122A SBC (ZP),Y + SBC (ZP) + SBC (ZP,S),Y + PEA ABS + SBC ZP,X + INC ZP,X + SBC [ZP],Y + SED + SBC: ABS,Y + PLX + XCE + JSR (ABS,X) + SBC: ABS,X + INC: ABS,X + SBCL LONG,X diff --git a/testdata/allops-common-65C02.S b/testdata/allops-common-65C02.S new file mode 100644 index 0000000..40f014e --- /dev/null +++ b/testdata/allops-common-65C02.S @@ -0,0 +1,271 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). +; +; Assembler: Merlin 32 + + ORG $1000 + + JSR PostBRK + JSR PostRTI + JSR PostRTS + JSR PostJMPI + JSR PostJMPX + NOP + NOP + NOP + BRK ZP ;$00 +PostBRK ORA (ZP,X) + DFB $02,ZP + DFB $03 + TSB ZP + ORA ZP + ASL ZP + DFB $07 + PHP + ORA #ZP + ASL + DFB $0B + TSB: ABS + ORA: ABS + ASL: ABS + DFB $0F + BPL PostBPL ;$10 +PostBPL ORA (ZP),Y + ORA (ZP) + DFB $13 + TRB ZP + ORA ZP,X + ASL ZP,X + DFB $17 + CLC + ORA: ABS,Y + INC + DFB $1B + TRB: ABS + ORA: ABS,X + ASL: ABS,X + DFB $1F + JSR ABS ;$20 + AND (ZP,X) + DFB $22,ZP + DFB $23 + BIT ZP + AND ZP + ROL ZP + DFB $27 + PLP + AND #ZP + ROL + DFB $2B + BIT: ABS + AND: ABS + ROL: ABS + DFB $2F + BMI PostBMI ;$30 +PostBMI AND (ZP),Y + AND (ZP) + DFB $33 + BIT ZP,X + AND ZP,X + ROL ZP,X + DFB $37 + SEC + AND: ABS,Y + DEC + DFB $3B + BIT: ABS,X + AND: ABS,X + ROL: ABS,X + DFB $3F + RTI ;$40 +PostRTI EOR (ZP,X) + DFB $42,ZP + DFB $43 + DFB $44,ZP + EOR ZP + LSR ZP + DFB $47 + PHA + EOR #ZP + LSR + DFB $4B + JMP PostJMP +PostJMP EOR: ABS + LSR: ABS + DFB $4F + BVC PostBVC ;$50 +PostBVC EOR (ZP),Y + EOR (ZP) + DFB $53 + DFB $54,ZP + EOR ZP,X + LSR ZP,X + DFB $57 + CLI + EOR: ABS,Y + PHY + DFB $5B + DFB $5C,ABS + EOR: ABS,X + LSR: ABS,X + DFB $5F + RTS ;$60 +PostRTS ADC (ZP,X) + DFB $62,ZP + DFB $63 + STZ ZP + ADC ZP + ROR ZP + DFB $67 + PLA + ADC #ZP + ROR + DFB $6B + JMP (ABS) +PostJMPI ADC: ABS + ROR: ABS + DFB $6F + BVS PostBVS ;$70 +PostBVS ADC (ZP),Y + ADC (ZP) + DFB $73 + STZ ZP,X + ADC ZP,X + ROR ZP,X + DFB $77 + SEI + ADC: ABS,Y + PLY + DFB $7B + JMP (ABS,X) +PostJMPX ADC: ABS,X + ROR: ABS,X + DFB $7F + BRA PostBRA ;$80 +PostBRA STA (ZP,X) + DFB $82,ZP + DFB $83 + STY ZP + STA ZP + STX ZP + DFB $87 + DEY + BIT #ZP + TXA + DFB $8B + STY: ABS + STA: ABS + STX: ABS + DFB $8F + BCC PostBCC ;$90 +PostBCC STA (ZP),Y + STA (ZP) + DFB $93 + STY ZP,X + STA ZP,X + STX ZP,Y + DFB $97 + TYA + STA: ABS,Y + TXS + DFB $9B + STZ: ABS + STA: ABS,X + STZ: ABS,X + DFB $9F + LDY #ZP ;$A0 + LDA (ZP,X) + LDX #ZP + DFB $A3 + LDY ZP + LDA ZP + LDX ZP + DFB $A7 + TAY + LDA #ZP + TAX + DFB $AB + LDY: ABS + LDA: ABS + LDX: ABS + DFB $AF + BCS PostBCS ;$B0 +PostBCS LDA (ZP),Y + LDA (ZP) + DFB $B3 + LDY ZP,X + LDA ZP,X + LDX ZP,Y + DFB $B7 + CLV + LDA: ABS,Y + TSX + DFB $BB + LDY: ABS,X + LDA: ABS,X + LDX: ABS,Y + DFB $BF + CPY #ZP ;$C0 + CMP (ZP,X) + DFB $C2,ZP + DFB $C3 + CPY ZP + CMP ZP + DEC ZP + DFB $C7 + INY + CMP #ZP + DEX + DFB $CB + CPY: ABS + CMP: ABS + DEC: ABS + DFB $CF + BNE PostBNE ;$D0 +PostBNE CMP (ZP),Y + CMP (ZP) + DFB $D3 + DFB $D4,ZP + CMP ZP,X + DEC ZP,X + DFB $D7 + CLD + CMP: ABS,Y + PHX + DFB $DB + DFB $DC,ABS + CMP: ABS,X + DEC: ABS,X + DFB $DF + CPX #ZP ;$E0 + SBC (ZP,X) + DFB $E2,ZP + DFB $E3 + CPX ZP + SBC ZP + INC ZP + DFB $E7 + INX + SBC #ZP + NOP + DFB $EB + CPX: ABS + SBC: ABS + INC: ABS + DFB $EF + BEQ PostBEQ ;$F0 +PostBEQ SBC (ZP),Y + SBC (ZP) + DFB $F3 + DFB $F4,ZP + SBC ZP,X + INC ZP,X + DFB $F7 + SED + SBC: ABS,Y + PLX + DFB $FB + DFB $FC,ABS + SBC: ABS,X + INC: ABS,X + DFB $FF diff --git a/testdata/qasm b/testdata/qasm new file mode 120000 index 0000000..e0d05e0 --- /dev/null +++ b/testdata/qasm @@ -0,0 +1 @@ +../qasm \ No newline at end of file