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2195 lines
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HTML
2195 lines
73 KiB
HTML
<html xmlns="http://www.w3.org/1999/xhtml"><head>
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<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
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<title>As65 Assembler</title>
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</script><ins id="aswift_0_expand" style="display:inline-table;border:none;height:90px;margin:0;padding:0;position:relative;visibility:visible;width:728px;background-color:transparent;" data-ad-slot="0606506508"><ins id="aswift_0_anchor" style="display:block;border:none;height:90px;margin:0;padding:0;position:relative;visibility:visible;width:728px;background-color:transparent;"><iframe id="aswift_0" name="aswift_0" style="left:0;position:absolute;top:0;border:0;width:728px;height:90px;" src="As65%20Assembler_files/ads.html" marginwidth="0" marginheight="0" vspace="0" hspace="0" allowtransparency="true" scrolling="no" allowfullscreen="true" data-google-container-id="a!1" data-load-complete="true" data-google-query-id="CICeqsz1mOkCFRYG-QAdOgIIuA" width="728" height="90" frameborder="0"></iframe></ins></ins>
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<hr>
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<p>
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</p>
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<p>
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</p>
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<h1>
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Assembler (As65)</h1>
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<p>
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The assembler (As65) produces a relocatable object modules by compiling lines of
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source code held in local files. The format of each source line must follow the
|
||
pattern shown below. The 'square' brackets enclose optional components within the
|
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line (like the label) whilst the '(X|Y)' pattern indicates a choice between
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||
types delimited by '|' characters. </p>
|
||
<pre>[[label[:]] [(opcode|directive|macro) [arguments]]] [; comment]</pre>
|
||
<p>
|
||
Opcodes and directives names are case insensitive in source code but labels and
|
||
macro names are case sensitive. Given this syntax all of the following examples
|
||
are valid.</p>
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||
<pre>; A comment line
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||
a_label_by_itself
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NOP ; Opcode with no argument followed by a comment
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nop ; Same as above
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LDA #1
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.6502 ; Generate code for 6502 processor
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MYMACRO 1,2,3 ; Generate a parameterised macro</pre>
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<h3>
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Labels</h3>
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<p>
|
||
Labels can be placed before all opcodes or on lines by themselves. A global
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||
label is comprised of a letter or underscore ('_') followed by a series of alphanumeric
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and/or underscore characters. A label may optionally be followed by a colon (':').</p>
|
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<p>
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||
A local label has the same grammatical construction as a global label but begins
|
||
with a period ('.'). Whilst a global label may only be used once with a module a
|
||
local label may be defined several times provided it appears each time within the
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scope of a different global label.</p>
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||
<pre>SomeGlobalLabel:
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.ALocalLabel:</pre>
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<p>
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Most directives do not allow labels. Those that do give them special meaning (e.g.
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macro name, symbol name in .EQU and .SET, etc.)</p>
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<h2>
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Expressions</h2>
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<p>
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The arguments provided to most opcodes and directives are expression comprised of
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absolute (e.g. constant literals), relative (e.g. the address of some relocatable
|
||
instruction or piece of data) and external values (e.g. values defined in other
|
||
source modules).</p>
|
||
<p>
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The expression parser evaluates operations on absolute values during processing
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to produce constant values but expressions involving relative and external terms
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are left for the linker to resolve. The following table shows all the supported
|
||
operators in decreasing order or precedence. </p>
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<p>
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<table width="60%" height="170" cellspacing="0" border="1">
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<tbody><tr>
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<td width="20%" height="16">
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<b>Operator</b></td>
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<td width="50%" height="16">
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<b>Description</b></td>
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</tr>
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<tr>
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<td width="20%" height="16">
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$<br>
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*<br>
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.
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<br>
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@</td>
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||
<td width="50%" height="16">
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The current instruction origin</td>
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</tr>
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<tr>
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<td width="20%" height="16">
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( sub-expression )<br>
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number<br>
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symbol<br>
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'character literal'</td>
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<td width="50%" height="16">
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Unary values</td>
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</tr>
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<tr>
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||
<td width="20%" height="16">
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+<br>
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-<br>
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~<br>
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||
!<br>
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LO<br>
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||
HI<br>
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BANK</td>
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||
<td width="50%" height="16">
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Unary plus (ignored)<br>
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Negation<br>
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Complement<br>
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Logical Not<br>
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Bits 7 to 0<br>
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Bits 15 to 8<br>
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Bits 31 to 16</td>
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</tr>
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||
<tr>
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||
<td width="20%" height="16">
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*<br>
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/<br>
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%</td>
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<td width="50%" height="16">
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Multiply<br>
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Divide<br>
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Remainder</td>
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||
</tr>
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||
<tr>
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||
<td width="20%" height="16">
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+<br>
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-</td>
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<td width="50%" height="16">
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Addition<br>
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Subtraction</td>
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</tr>
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<tr>
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<td width="20%" height="16">
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<<<br>
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>></td>
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<td width="50%" height="16">
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Right Shift<br>
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Left Shift</td>
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</tr>
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<tr>
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||
<td width="20%" height="16">
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<<br>
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<=<br>
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><br>
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>=</td>
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<td width="50%" height="16">
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Less Than<br>
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Less Than Or Equal<br>
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Greater Than<br>
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Greater Than Or Equal</td>
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</tr>
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<tr>
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<td width="20%" height="16">
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==<br>
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!=</td>
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<td width="50%" height="16">
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Equal<br>
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Not Equal</td>
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</tr>
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<tr>
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<td width="20%" height="16">
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&<br>
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|<br>
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^</td>
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<td width="50%" height="16">
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Binary AND<br>
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Binary OR<br>
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Binary XOR</td>
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</tr>
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<tr>
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<td width="20%" height="32">
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&&<br>
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||</td>
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<td width="50%" height="32">
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Logical AND<br>
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Logical OR</td>
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</tr>
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</tbody></table>
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||
</p>
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<p>
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Expressions may only contain numeric values. There are no string functions.</p>
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<h3>
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Literals</h3>
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<p>
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Literal numeric values can be expressed in binary, decimal, octal, decimal and as
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character values. Literal values may be up to 32-bits in size and all expressions
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are evaluated at this precision. Values are masked to 8- and 16- bits when generating
|
||
code.</p>
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<pre> LDA #%10101100 ; Load a binary constant
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LDX #@177 ; Load an octal constant
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LDA 127 ; Load from a location specified in decimal
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STA $FFC1 ; Store at a location specified in hexadecimal
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lda #'X' ; Load ASCII for 'X' into the accumlator
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.LONG 'ABCD' ; A 32-bit character constant</pre>
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<h2>
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Directives</h2>
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<p>
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This section descibes commands which control the assembler and the generation of code.</p>
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<h3>
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.6501</h3>
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<p>
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This directive places the assembler in 6501 processor mode. The 6501 processor supports
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all normal 6502 instructions as well as the extended BBR, BBS, SMB and RMB instructions.</p>
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<h3>
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.6502</h3>
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<p>
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This directive places the assembler in 6502 processor mode. Only the traditional
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6502 instructions and addressing modes are supported.</p>
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<h3>
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.65C02</h3>
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<p>
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This directive places the assembler in 65C02 processor mode. The 65C02 processor
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supports all normal 6502 instructions plus new addressing modes and extra some instructions
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including the BBR, BBS, SMB and RMB instructions, </p>
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<h3>
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.65SC02</h3>
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<p>
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This directive places the assembler in 65SC02 processor mode. The 65SC02 processor
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supports the same instructions as the 65C02 BUT does not have then extended BBR,
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BBS, SMB and RMB instructions, </p>
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<h3>
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.65816</h3>
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<p>
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This directive places the assembler into 65816 processor mode.</p>
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<h3>
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.65832</h3>
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<p>
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This directive places the assembler into 65832 processor mode.
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</p>
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<p>
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(The 65832 was designed by WDC but never actually made it into production. It is
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very similar to the 65816 but supports 32-bit accumulator and index registers. This
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feature is experimental).</p>
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<h3>
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.EQU <expr></h3>
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<p>
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Creates a symbol having the value indicated by the expression, for example the following
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creates a symbol for the ASII carriage return character. An error will be generated
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if the symbol is already defined.</p>
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<pre>CR .EQU $0D</pre>
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<p>
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As65 accepts '= <expr>' as an alternative syntax when defining equates for
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compatibility with other assemblers.</p>
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<h3>
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.SET <expr></h3>
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<p>
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Creates a symbol having the value indicated by the expression. Unlink .EQU the .SET
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directive will not complain if the same symbol is assigned a value multiple times.
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This can be useful when defining counters or calculating intermediate results within
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macros.</p>
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<pre>COUNT .SET COUNT+1</pre>
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<h3>
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.CODE</h3>
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<p>
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The .CODE directive tells the assembler to place any code generated by instructution
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or data directives into the object files code section.</p>
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<h3>
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.DATA</h3>
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<p>
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The .DATA directive tells the assembler to place any code generated by instructution
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or data directives into the object files initialised data section.</p>
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<h3>
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.BSS</h3>
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<p>
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The .BSS directive tells the assembler to place any code generated by instructution
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or data directives into the object files uninitialised data section.</p>
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<h3>
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.PAGE0</h3>
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<p>
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The .PAGE0 directive tells the assembler to place any code generated by instructution
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or data directives into a specially marked section that will be located on page
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0 ($0000-$00FF on 8-bit CPUs or $000000-$00FFFF on 16-bit CPUs) .</p>
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<h3>
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.ORG <constant expr></h3>
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<p>
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The .ORG directive sets the absolute target address for the current section. For
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compatibility with other assemblers As65 will also accept '*= <expr>'.</p>
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<h3>
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.DPAGE <constant expr> (65816/65832 only)</h3>
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<p>
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The .DPAGE directive informs the assembler of the assumed value of the direct page
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register for the following sequence of instructions so that direct-page addressing
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can be used instead of absolute where possible.</p>
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<h3>
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.DBREG <constant expr> (65816/65832 only)</h3>
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<p>
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The .DBREG directive informs the assembler of the assumed value of the data bank
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register for the following sequence of instructions so that absolute address can
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be used instead of long absolute where possible.</p>
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<h3>
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.LONGA (ON|OFF) (65816/65832 only)</h3>
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<p>
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When compiling for the 65816 processor this directive controls the size of immediate
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values loaded into the accumulator. If a .LONGA ON directive has been processed
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then 16 bit literals will be generated otherwise they will be 8 bits.</p>
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<h3>
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.LONGI (ON|OFF) (65816/65832 only)</h3>
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<p>
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When compiling for the 65816 processor this directive controls the size of immediate
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values loaded into the X and Y registers. If a .LONGI ON directive has been processed
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then 16 bit literals will be generated otherwise they will be 8 bits.</p>
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<h3>
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.WIDEA (ON|OFF) (65832 only)</h3>
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<p>
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When compiling for the 65832 processor this directive controls the size of immediate
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values loaded into the accumulator. If a .WIDEA ON directive has been processed
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then 32 bit literals will be generated otherwise they will be 8 bits.</p>
|
||
<h3>
|
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.WIDEI (ON|OFF) (65832 only)</h3>
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<p>
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When compiling for the 65832 processor this directive controls the size of immediate
|
||
values loaded into the X and Y registers. If a .WIDEI ON directive has been processed
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then 32 bit literals will be generated otherwise they will be 8 bits.</p>
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<h3>
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.IF <constant expr></h3>
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<p>
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Assembles the following source code up to the matching .ELSE or .ENDIF if the constant
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expression evaluates to a non-zero value.</p>
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<pre> JSR DoSomething
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.IF DEBUGGING
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JSR DumpRegisters
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.ENDIF
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JSR DoTheNextBit</pre>
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<h3>
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.IFABS <expr></h3>
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<p>
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Assembles the following source code up to the matching .ELSE or .ENDIF if the expression
|
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evaluates to a absolute (i.e. constant) value.</p>
|
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<p>
|
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This directive is useful in macros to test the type of the parameter value.</p>
|
||
<h3>
|
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.IFNABS <expr></h3>
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<p>
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Assembles the following source code up to the matching .ELSE or .ENDIF if the expression
|
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does not evaluate to a absolute (i.e. constant) value.</p>
|
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<p>
|
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This directive is useful in macros to test the type of the parameter value.</p>
|
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<h3>
|
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.IFREL <expr></h3>
|
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<p>
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Assembles the following source code up to the matching .ELSE or .ENDIF if the expression
|
||
evaluates to a relocatable value.</p>
|
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<p>
|
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This directive is useful in macros to test the type of the parameter value.</p>
|
||
<h3>
|
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.IFNREL <expr></h3>
|
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<p>
|
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Assembles the following source code up to the matching .ELSE or .ENDIF if the expression
|
||
does not evaluate to a relocatable value.</p>
|
||
<p>
|
||
This directive is useful in macros to test the type of the parameter value.</p>
|
||
<h3>
|
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.ELSE</h3>
|
||
<p>
|
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Assembles the folloing source code up the matching .ENDIF if the condition for the
|
||
preceding matching .IF, .IFABS, .IFNABS, .IFREL, .IFNREL directive was not met. </p>
|
||
<h3>
|
||
.ENDIF</h3>
|
||
<p>
|
||
The .ENDIF directive marks the end of condition code section.</p>
|
||
<h3>
|
||
.INCLUDE "filename"</h3>
|
||
<p>
|
||
Causes the contents of the indicated file to be read and processed before the remainder
|
||
of the current file.</p>
|
||
<h3>
|
||
.APPEND "filename"</h3>
|
||
<p>
|
||
The current source file is close and processing continues at the first line of the
|
||
indicated file.</p>
|
||
<pre> NOP
|
||
|
||
.APPEND "AnotherFile.asm"
|
||
|
||
NOP ; This line will not be processed.</pre>
|
||
<h3>
|
||
.END</h3>
|
||
<p>
|
||
The .END directive marks the end of the source code.</p>
|
||
<pre> NOP
|
||
|
||
.END
|
||
|
||
NOP ; This line will not be processed.</pre>
|
||
<h3>
|
||
.INSERT "filename"</h3>
|
||
<p>
|
||
The .INSERT directive reads the binary contents of the indicated file and inserts
|
||
it directly into the generated object code.</p>
|
||
<p>
|
||
A typically use is to insert pre-compiled data such as graphics images, encryption
|
||
keys or lookup tables into the code.</p>
|
||
<h3>
|
||
.REPEAT <constant expr></h3>
|
||
<p>
|
||
Causes the source lines up to the matching .ENDR directive to repeated the number
|
||
of times indicated by the constant expression</p>
|
||
<pre> .REPEAT 8 ; Generate 8 NOPs
|
||
NOP
|
||
.ENDR</pre>
|
||
<h3>
|
||
.ENDR</h3>
|
||
<p>
|
||
Marks the end of .REPEAT section.</p>
|
||
<h3>
|
||
.MACRO [<arg>[,<arg>]*]</h3>
|
||
<p>
|
||
The .MACRO directive indicates that the following source lines upto the matching
|
||
.ENDM should be used to define a macro. The name of the macro is taken from the
|
||
label preceding the .MACRO command.</p>
|
||
<pre>_NOT16 .MACRO VLA,RES
|
||
LDA VLA+0
|
||
EOR #$FF
|
||
STA RES+0
|
||
LDA VLA+1
|
||
EOR #$FF
|
||
STA RES+1
|
||
.ENDM</pre>
|
||
<p>
|
||
Macro arguments can be accessed by defining symbolic names for them or by positional
|
||
references (using \0 thru \9). The sequence \? can be used with a macro to obtain
|
||
the macro expansion count, for example to generate unique labels for branches within
|
||
the macro.</p>
|
||
<h3>
|
||
.ENDM</h3>
|
||
<p>
|
||
Marks the end of a .MACRO definition</p>
|
||
<h3>
|
||
.EXITM</h3>
|
||
<p>
|
||
When used within a macro it causes an immediate termination of the expansion process.</p>
|
||
<h3>
|
||
.GLOBAL <symbol>[,<symbol>]*</h3>
|
||
<p>
|
||
The .GLOBAL directive lists one or more symbols defined in the current module that
|
||
can be referenced by code in other modules.</p>
|
||
<h3>
|
||
.EXTERN <symbol>[,<symbol>]*</h3>
|
||
<p>
|
||
The .EXTERN directive lists one or more symbols defined in other modules so that
|
||
they can be used in expressions within the current module (e.g. subroutine addresses,
|
||
key data areas, etc.).</p>
|
||
<h3>
|
||
.BYTE (<expr>|<string>)[,(<expr>|<string>)]*</h3>
|
||
<p>
|
||
The .BYTE directive deposits a series of 8-bit values into the object code for the
|
||
current module. The values can be defined as the result of an expression (this includes
|
||
simple numeric values) or as strings delimited by quotes.</p>
|
||
<pre> .BYTE "Hello World",$0D,$0A,0</pre>
|
||
<h3>.DBYTE <expr>[,<expr>]*</h3>
|
||
<p>The .DBYTE directive deposits a series of 16-bit values defined by a series of expressions
|
||
into the object code for the current module. The values are defined most significant byte
|
||
first.</p>
|
||
<pre> .DBYTE 1,$2,3+5</pre>
|
||
<h3>
|
||
.WORD <expr>[,<expr>]*</h3>
|
||
<p>
|
||
The .WORD directive deposits a series of 16-bit values defined by a series of expressions
|
||
into the object code for the current module. The values are defined least significant byte
|
||
first.</p>
|
||
<pre> .WORD 1,$2,3+5</pre>
|
||
<h3>
|
||
.ADDR <expr>,[<expr>]*</h3>
|
||
<p>
|
||
The .ADDR directive deposits a series of 24-bit values defined by a series of expressions
|
||
into the object code for the current module.</p>
|
||
<pre> .ADDR Function1,Function2</pre>
|
||
<p>
|
||
The .ADDR directive is primarily intended for creating function jump tables for
|
||
the 65816 processor.</p>
|
||
<h3>
|
||
.LONG <expr>[,<expr>]*</h3>
|
||
<p>
|
||
The .LONG directive deposits a series of 32-bit values defined by a series of expressions
|
||
into the object code for the current module.</p>
|
||
<pre> .LONG 1,$2,3+5</pre>
|
||
<h3>
|
||
.SPACE <constant expr></h3>
|
||
<p>
|
||
The .SPACE directive reserves the specified number of zero valued bytes in the object
|
||
code.</p>
|
||
<pre>PTRA .SPACE 2</pre>
|
||
<h3>
|
||
.LIST</h3>
|
||
<p>
|
||
The .LIST directive enables the output of lines to the listing file.</p>
|
||
<h3>
|
||
.NOLIST</h3>
|
||
<p>
|
||
The .NOLIST directive suspends the generation of a listing.</p>
|
||
<h3>
|
||
.TITLE</h3>
|
||
<p>
|
||
The .TITLE directive sets the string shown as the title at the top of the listing
|
||
page.</p>
|
||
<h3>
|
||
.PAGE</h3>
|
||
<p>
|
||
The .PAGE directive forces the listing to restart at the top of the next page.</p>
|
||
<h2>
|
||
Opcodes</h2>
|
||
<p>
|
||
The assembler recognizes all the opcodes for the 6501, 6502, 65C02, 65SC02 and 65816
|
||
processors but will only generate code for currently selected processor type. Using
|
||
an inappropriate opcode will generate an error.</p>
|
||
<p>
|
||
<table width="70%" height="0" cellspacing="0" border="1">
|
||
<tbody><tr>
|
||
<td width="16%">
|
||
<b>Opcode</b></td>
|
||
<td width="16%">
|
||
<b>6501</b></td>
|
||
<td width="17%">
|
||
<b>6502</b></td>
|
||
<td width="17%">
|
||
<b>65C02</b></td>
|
||
<td width="17%">
|
||
<b>65SC02</b></td>
|
||
<td width="17%">
|
||
<b>65816</b></td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
ADC</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
AND</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
ASL</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
BBR0<br>
|
||
BBR1<br>
|
||
BBR2<br>
|
||
BBR3<br>
|
||
BBR4<br>
|
||
BBR5<br>
|
||
BBR6<br>
|
||
BBR7</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
BBS0<br>
|
||
BBS1<br>
|
||
BBS2<br>
|
||
BBS3<br>
|
||
BBS4<br>
|
||
BBS5<br>
|
||
BBS6<br>
|
||
BBS7</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
BCC</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
BCS</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
BEQ</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
BIT</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
BMI</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
BNE</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
BPL</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
BRA</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
BRK</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
BRL</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
BVC</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
BVS</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
CLC</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
CLD</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
CLI</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
CLV</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
CMP</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
COP</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
CPX</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
CPY</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
DEC</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
DEX</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
DEY</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
EOR</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
INC</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
INX</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
INY</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
JML</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
JSL</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
LDA</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
LDX</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
LDY</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
LSR</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
MVN</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
MVP</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
NOP</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
ORA</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
PEA</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
PEI</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
PER</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
PHA</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
PHB</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
PHD</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
PHK</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
PHX</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
PHY</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
PLA</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
PLB</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
PLD</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
PLP</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
PLX</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
PLY</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
REP</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
RMB0<br>
|
||
RMB1<br>
|
||
RMB2<br>
|
||
RMB3<br>
|
||
RMB4<br>
|
||
RMB5<br>
|
||
RMB6<br>
|
||
RMB7</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
ROL</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
ROR</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
RTI</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
RTL</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
RTS</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
SBC</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
SEC</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
SED</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
SEI</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
SEP</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
SMB0<br>
|
||
SMB1<br>
|
||
SMB2<br>
|
||
SMB3<br>
|
||
SMB4<br>
|
||
SMB5<br>
|
||
SMB6<br>
|
||
SMB7</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
STA</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
STP</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
STX</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
STY</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
STZ</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
TAX</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
TAY</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
TCD</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
TCS</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
TDC</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
TRB</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
TSB</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
TSX</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
TXA</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
TXS</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
TXY</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
TYA</td>
|
||
<td width="16%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
TYX</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
WAI</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
WDM</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
XBA</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td width="16%">
|
||
XCE</td>
|
||
<td width="16%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
</td>
|
||
<td width="17%">
|
||
Y</td>
|
||
</tr>
|
||
</tbody></table>
|
||
</p>
|
||
<p>
|
||
</p>
|
||
<h2>
|
||
Addressing Modes</h2>
|
||
<p>
|
||
The 65xx family of processors support a number of different addressing modes which
|
||
can be used with each instruction.</p>
|
||
<p>
|
||
<table width="70%" border="1">
|
||
<tbody><tr>
|
||
<td height="22">
|
||
<strong>Syntax</strong></td>
|
||
<td height="22">
|
||
<strong>Description</strong></td>
|
||
</tr>
|
||
<tr>
|
||
<td height="20">
|
||
</td>
|
||
<td height="20">
|
||
Implied</td>
|
||
</tr>
|
||
<tr>
|
||
<td height="20">
|
||
A</td>
|
||
<td height="20">
|
||
Accumulator</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
#expr</td>
|
||
<td>
|
||
Immediate</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
#<expr</td>
|
||
<td>
|
||
Immediate (lo byte)</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
#>expr</td>
|
||
<td>
|
||
Immediate (hi byte)</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
#^expr</td>
|
||
<td>
|
||
Immediate (bank byte)</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
<expr</td>
|
||
<td>
|
||
Direct</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
<expr,X</td>
|
||
<td>
|
||
Direct Indexed by X </td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
<expr,Y</td>
|
||
<td>
|
||
Direct Indexed by Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
>expr</td>
|
||
<td>
|
||
Absolute Long (65816 only)</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
>expr,X</td>
|
||
<td>
|
||
Absolute Long Indexed by X (65816 only)</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
[expr]</td>
|
||
<td>
|
||
Long Indirect (65816 only)</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
[expr],Y</td>
|
||
<td>
|
||
Long Indirect Indexed (65816 only)</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
(expr,X)</td>
|
||
<td>
|
||
Indexed Indirect</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
(expr),Y</td>
|
||
<td>
|
||
Indirect Indexed</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
(expr,S),Y
|
||
</td>
|
||
<td>
|
||
Stack Relative Indirect Indexed (65816 only)</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
(expr)</td>
|
||
<td>
|
||
Indirect</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
|expr</td>
|
||
<td>
|
||
Absolute</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
|expr,X</td>
|
||
<td>
|
||
Absolute Indexed by X</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
|expr,Y</td>
|
||
<td>
|
||
Absolute Indexed by Y</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
expr</td>
|
||
<td>
|
||
Absolute or Direct</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
expr,X</td>
|
||
<td>
|
||
Absolute or Direct Indexed by X</td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
expr,Y</td>
|
||
<td>
|
||
Absolute or Direct Indexed by Y </td>
|
||
</tr>
|
||
<tr>
|
||
<td>
|
||
expr,S</td>
|
||
<td>
|
||
Stack Relative (65816 only)</td>
|
||
</tr>
|
||
</tbody></table>
|
||
</p>
|
||
<p>
|
||
If the absolute address of the target memory location is known the assembler will
|
||
attempt to generate the smallest instruction (e.g. direct page instead of absolute).
|
||
The explicit direct (< expr) and absolute (| expr or !expr) allow the programmer
|
||
to specify an exact addressing mode for expressions which are not absolute, for
|
||
example those referencing external symbols.</p>
|
||
<p>
|
||
The assembler allows the implied addressing mode to be used with shift and
|
||
rotate instructions and treats it as if the accumulator mode had been specified.</p>
|
||
<h3>
|
||
BRK & COP</h3>
|
||
<p>
|
||
The BRK and COP instructions are usually documented as implied although they both
|
||
expect the opcode to be followed by a data byte and the PC is incremented by two.</p>
|
||
<p>
|
||
The assembler allows these instructions to be used either in the normal implied
|
||
way or with the immediate addressing mode to specify the data byte. For example
|
||
the following results in the same code.</p>
|
||
<pre> BRK ; Normal usage
|
||
.BYTE $7E
|
||
|
||
BRK #$7E ; Generate opcode and data byte together</pre>
|
||
<h2>
|
||
Code Sections</h2>
|
||
<p>
|
||
The assembler can generate code into four different sections (e.g. CODE, DATA, BSS
|
||
and PAGE0). At the start of each pass the sections are defined as relative. Using
|
||
the .ORG directive any section can be forced to place code or data at a specific
|
||
absolute memory address.</p>
|
||
<pre> .CODE
|
||
NOP ; A relocatable NOP
|
||
|
||
.ORG $F000 ; Make the section absolute
|
||
NOP ; Place a NOP at $F000
|
||
|
||
.DATA ; Switch to the (relative) DATA section
|
||
.BYTE 1,2,3
|
||
|
||
|
||
.CODE ; Switch back to the absolute code section
|
||
NOP ; Place a NOP at $F001
|
||
</pre>
|
||
<p>
|
||
You can switch between the sections throughout your code. Any code or data generated
|
||
will be added where the section was left when it was previously used.</p>
|
||
<p>
|
||
Once a section has been made absolute it can not be made relative again. The .ORG
|
||
directive can be used multiple times within the same section, for example to reserve
|
||
memory in different RAM areas.</p>
|
||
<h2>
|
||
Structured Assembly</h2>
|
||
<p>
|
||
The assembler supports a simple from of structured programming (e.g. IF..ELSE..ENDIF,
|
||
REPEAT..UNTIL, etc.) based on the flag bits in the condition register. The assembler
|
||
will generate the branches needed to implement these control structures without
|
||
you having to define any labels. It also tries to generate the smallest amount of
|
||
code using relative branches (e.g. BRA, BEQ, BPL, etc.) when it can, only resorting
|
||
to JMP when it has to.</p>
|
||
<p>
|
||
Structured code may not be as efficient as normal hand coded routines (due to the
|
||
extra branches) but this is often outweighed by the enhanced readability and reduction
|
||
in labels.</p>
|
||
<h3>
|
||
IF..ELSE..ENDIF</h3>
|
||
<p>
|
||
An IF command starts a block of code that will only be executed if the indicated
|
||
condition (e.g. EQ, NE, CC, CS, PL, MI, VC or VS) exists . For example a simple
|
||
16-bit increment can be coded as follows</p>
|
||
<pre> INC VAL+0
|
||
IF EQ
|
||
INC VAL+1
|
||
ENDIF</pre>
|
||
<p>
|
||
The ELSE command can be used to defined an alternate block of code to be executed
|
||
if the condition was not true.</p>
|
||
<pre> AND #$01
|
||
IF EQ
|
||
; A contained an even number
|
||
ELSE
|
||
; A contained an odd number
|
||
ENDIF</pre>
|
||
<h3>
|
||
REPEAT..UNTIL|FOREVER</h3>
|
||
<p>
|
||
The REPEAT and UNTIL commands can be used to defined a piece of code that repeats
|
||
(at least once) until some condition is true. For example the following code counts
|
||
the bits in A by arithmetically shifting it left until result of the shift is zero.</p>
|
||
<pre> LDX #0
|
||
REPEAT
|
||
ASL A
|
||
PHP
|
||
IF CS
|
||
INX
|
||
ENDIF
|
||
PLP
|
||
UNTIL EQ</pre>
|
||
<p>
|
||
If you want a loop that repeats endlessly then use the FOREVER keyword at the end
|
||
instead of UNTIL.</p>
|
||
<h3>
|
||
WHILE..ENDW</h3>
|
||
<p>
|
||
The WHILE and ENDW commands produce a block of code that will repeat while some
|
||
condition is true.</p>
|
||
<pre> WHILE EQ
|
||
ENDW </pre>
|
||
<h3>
|
||
BREAK & CONTINUE</h3>
|
||
<p>
|
||
Both the REPEAT and WHILE loops can contain the loop modifiers BREAK and CONTINUE.</p>
|
||
<p>
|
||
The BREAK command generates a branch to the next instruction immediately after the
|
||
matching UNTIL, FOREVER or ENDW.</p>
|
||
<pre> LDX #0
|
||
REPEAT
|
||
CPX #7
|
||
IF EQ
|
||
BREAK
|
||
ENDIF
|
||
INX
|
||
FOREVER</pre>
|
||
<p>
|
||
Similarly the CONTINUE generates a branch back to the start of REPEAT or WHILE loop
|
||
to force the start of the next iteration.</p>
|
||
<p>
|
||
Both BREAK and CONTINUE allow an optional condition code argument that makes the
|
||
branch conditional. For example the last example could be written more
|
||
efficiently as follows.</p>
|
||
<pre> LDX #0
|
||
REPEAT
|
||
CPX #7
|
||
BREAK EQ
|
||
INX
|
||
FOREVER</pre>
|
||
<p>
|
||
</p>
|
||
<table width="100%" height="30" cellspacing="0" cellpadding="0" border="0">
|
||
<tbody><tr>
|
||
<td width="25%" bgcolor="#aaaaff">
|
||
<a href="http://www.obelisk.me.uk/dev65/index.html"><< Back</a></td>
|
||
<td width="25%" bgcolor="#aaaaff">
|
||
<center>
|
||
<a href="http://www.obelisk.me.uk/index.html" target="_parent">Home</a></center>
|
||
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|
||
<td style="text-align: center" width="25%" bgcolor="#aaaaff">
|
||
Contents<a href="http://www.obelisk.me.uk/dev65/index.html"></a></td>
|
||
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|
||
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<p class="timestamp">
|
||
This page was last updated on 9th March 2018</p>
|
||
<p class="copyright">
|
||
<20> Copyright 2009-2018 Andrew John Jacobs. All rights reserved.<br>
|
||
All trademarks and service marks are the properties of their respective owners.</p>
|
||
|
||
|
||
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