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5X: the Merlin fix
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@ -2,16 +2,15 @@ Inventory of zeros of 5 bytes or more in the IIc Plus ROM
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Main Bank
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Main Bank
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C1FB - 5 bytes
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C1FB - 5 bytes
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C4EE - 12 bytes
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C4EE - 12 bytes - delete key fix
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C5F3 - 5 bytes
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C5F3 - 5 bytes
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C6FB - 5 bytes
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C6FB - 5 bytes - but Disk II ID here at C6FF
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C9A1 - 9 bytes
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C9A1 - 9 bytes - beep merlin fix part 2
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CFF9 - 7 bytes - ROM 5X switcher
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CFF9 - 7 bytes - ROM 5X switcher
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Aux Bank
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Aux Bank
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C572 - 8 bytes
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C572 - 8 bytes
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C7FB - 8 bytes
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C7FC - 7 bytes - ROM 5X dispatch jump at $C7FF
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C7FC - 7 bytes
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CE00 - 512 bytes not usable (MIG space)
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CE00 - 512 bytes not usable (MIG space)
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D3B5 - 75 bytes - Accelerator menu text
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D3B5 - 75 bytes - Accelerator menu text
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D516 - 234 bytes - ROM 5X boot
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D516 - 234 bytes - ROM 5X boot
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8
rom5x/B0_C2FC_fix_merlin_1.s
Normal file
8
rom5x/B0_C2FC_fix_merlin_1.s
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@ -0,0 +1,8 @@
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; Code to fix merlin incompatibility with the beep patch
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; this arises because switching to the aux firmware messes up the
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; memory map slightly. The IIc Plus WAIT routine has a fix, we adopt it here.
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.code
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.pc02
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.org $c2fc
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phx
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jmp $c9a1 ; next step
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10
rom5x/B0_C7FC_5x_switch.s
Normal file
10
rom5x/B0_C7FC_5x_switch.s
Normal file
@ -0,0 +1,10 @@
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; There's a bit of luck in the IIc Plus firmware
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; there are 4 $00 bytes at $C7FC in the main bank, of which the last
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; is "AppleTalk version" according to the ROM $03 source code
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; in the tech ref, and should be left at $00.
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; There are also 7 $00 bytes at $C7FC in the aux bank. So if we switch at
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; $C7FC, then we get a 4 bytes in the aux bank, just enough for a jump.
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.code
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.org $c7fc
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sta $c028
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7
rom5x/B0_C9A1_fix_merlin_2.s
Normal file
7
rom5x/B0_C9A1_fix_merlin_2.s
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@ -0,0 +1,7 @@
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; see B0 C2FC patch for commentary
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.code
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.pc02
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.org $c9a1
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jsr $cfe5 ; get memory config we need to fix
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jsr $c7fc ; call ROM 5X dispatch
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jmp $c2f5 ; fix memory, restore x, a=$00
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@ -10,6 +10,6 @@
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.org $cff9 ; 7 bytes available here, but don't count on $CFFF
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.org $cff9 ; 7 bytes available here, but don't count on $CFFF
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lda #$a9 ; lda opcode
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lda #$a9 ; lda opcode
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nop ; jmp/jsr $cffa does lda #$ea
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nop ; jmp/jsr $cffa does lda #$ea
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jmp $fbdf ; jump to bell1 hijack
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jmp $c7fc ; jump to 5X dispatcher
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; total 6 bytes.
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; total 6 bytes.
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@ -1,21 +0,0 @@
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; Hijack the BELL1 monitor routine to do our bidding.
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; BELL1 implements the beep sound heard on reset or
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; Ctrl-G, etc. It starts with
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; LDA #$40
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; JSR WAIT ; delay .1 sec
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; followed by code to actually beep the speaker
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; In our case, BELL1 always loads the accumulator with
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; a fixed number, and executes a 3-byte instruction
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; Well, it turns out that to switch banks we need
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; 3 bytes, and as luck would have it the other bank
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; is empty here.
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; So the routine on the other side is the ROM 5X
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; dispatcher. It will take what is in the accumulator
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; and use that to determine the next action.
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; Obviously, $40 should beep the speaker, anything
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; else can do whatever we want.
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.code
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.org $fbdf
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sta $c028
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13
rom5x/B0_FBE6_beep_fix.s
Normal file
13
rom5x/B0_FBE6_beep_fix.s
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@ -0,0 +1,13 @@
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; Fix the beep
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; inspired by http://quinndunki.com/blondihacks/?p=2471
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; see commentary in B1 FB3C patch
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.code
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.pc02
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.org $fbe6
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jmp $c2fc ; to 5X beep with merlin fix
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.res $fbef-*,$ea ; fill up the rest with NOPs
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.assert * = $fbef, error, "ROM 5X beep fix alignment problem"
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; the rts at $fbef is sacred
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5
rom5x/B1_C7FF_5x_jump.s
Normal file
5
rom5x/B1_C7FF_5x_jump.s
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@ -0,0 +1,5 @@
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; See B0 C7FC patch for description
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.code
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.org $c7ff
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jmp $fb3c ; to 5X dispatch
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@ -81,7 +81,7 @@ msg1 = *
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.byte $04,$2e,"6 Boot 5.25"
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.byte $04,$2e,"6 Boot 5.25"
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.byte $04,$ae,"7 Accelerator"
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.byte $04,$ae,"7 Accelerator"
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.byte $07,$5f,"By M.G."
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.byte $07,$5f,"By M.G."
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msg2: .byte $07,$db,"ROM 5X 04/08/17"
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msg2: .byte $07,$db,"ROM 5X 11/09/17"
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.byte $05,$ae,$00 ; cursor pos in menu
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.byte $05,$ae,$00 ; cursor pos in menu
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msg3: .byte $05,$b0,"SURE? ",$00
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msg3: .byte $05,$b0,"SURE? ",$00
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; metadata to identify build conditions
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; metadata to identify build conditions
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@ -1,47 +1,44 @@
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.code
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.code
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.psc02
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.psc02
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.include "iic+.defs"
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.include "iic+.defs"
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.org reset5x ; max 157 bytes
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.org reset5x ; max 157 bytes
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stz power2 + rx_mslot ; action = normal reset
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stz power2 + rx_mslot ; action = normal reset
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lda #>(rst5xrtn-1) ; common case
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lda #>(rst5xrtn-1) ; common case
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pha
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pha
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lda #<(rst5xrtn-1)
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lda #<(rst5xrtn-1)
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pha ; note that this stays on stack
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pha ; note that this stays on stack
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asl butn1 ; option (closed apple)
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asl butn1 ; option (closed apple)
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bcs ckdiag
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bcs ckdiag
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exitrst: jmp swrts2
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exitrst: jmp swrts2
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; check to see if cmd_option (both apples) are down
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; check to see if cmd_option (both apples) are down
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ckdiag: bit butn0 ; command (open apple)
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ckdiag: bit butn0 ; command (open apple)
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bmi exitrst ; return to RESET.X
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bmi exitrst ; return to RESET.X
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; present menu because only closed apple is down
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; present menu because only closed apple is down
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menu: jsr menu5x ; display menu
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menu: jsr menu5x ; display menu
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jsr gkey5x
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jsr gkey5x
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cmp #$b0 ; "0"
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cmp #$b0 ; "0"
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bne ckkey1
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bne ckkey1
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ldx #$ff ; reset stack
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ldx #$ff ; reset stack
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txs
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txs
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lda #>(monitor-1) ; monitor entry on stack
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txa
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pha
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jmp $fb3c ; now has crash-to-monitor function
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lda #<(monitor-1)
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ckkey1: cmp #$b2 ; "2"
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pha
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beq doconf
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jmp swrts2 ; rts to enter monitor
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cmp #$b4 ; "4"
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ckkey1: cmp #$b2 ; "2"
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bne ckkey2
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beq doconf
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doconf: jsr conf5x
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cmp #$b4 ; "4"
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bne menu ; go back to menu4x
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bne ckkey2
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ckkey2: cmp #$b7 ; "7"
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doconf: jsr conf5x
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bne ckkey3
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bne menu ; go back to menu4x
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jsr $fd02 ; accelerator menu
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ckkey2: cmp #$b7 ; "7"
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bra menu
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bne ckkey3
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ckkey3: sec
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jsr $fd02 ; accelerator menu
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sbc #$b0 ; ascii->number
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bra menu
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bmi menu ; < 0 not valid
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ckkey3: sec
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cmp #$07 ; we will use 7 for accelerator later
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sbc #$b0 ; ascii->number
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bpl menu ; > 7 not valid
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bmi menu ; < 0 not valid
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sta power2 + rx_mslot ; for boot5x
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cmp #$07 ; we will use 7 for accelerator later
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stz softev + 1 ; deinit coldstart
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bpl menu ; > 7 not valid
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stz pwerdup ; ditto
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sta power2 + rx_mslot ; for boot5x
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bra exitrst
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stz softev + 1 ; deinit coldstart
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stz pwerdup ; ditto
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bra exitrst
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@ -1,45 +1,51 @@
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.code
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.code
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.psc02
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.psc02
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.include "iic+.defs"
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.include "iic+.defs"
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.org $fb3c ; ~165 bytes free here
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.org $fb3c ; ~165 bytes free here
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cmp #$a9 ; reset patch
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.proc dispatch
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bne chk2
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cmp #$a9 ; reset patch
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jmp reset5x
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bne :+
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chk2: cmp #$ea ; boot patch
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jmp reset5x
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bne chk3
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: cmp #$ea ; boot patch
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jmp boot5x
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bne :+
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.if newbeep
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jmp boot5x
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chk3:
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: cmp #$0c
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.else
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beq oldbelle1
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chk3: cmp #$40 ; beep
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; jump to monitor
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bne dowait
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lda #>(monitor-1) ; monitor entry on stack as return address
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pha
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lda #<(monitor-1)
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pha
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jmp swrts2 ; switch bank and rts to monitor
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.endproc
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; "classic air raid beep"
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; "classic air raid beep"
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; inspired by http://quinndunki.com/blondihacks/?p=2471
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.proc oldbell
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; jsr $fcb5 ; (new) WAIT for .1 sec delay
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ldy #$c0
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jsr owait
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obell2: lda #$0c
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ldy #$c0
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dowait: jsr oldwait ; old wait for correct sound, we also enter here
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obell2: lda #$0c
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lda $c030
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jsr owait ; old wait for correct sound
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dey
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lda $c030
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bne obell2
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dey
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jmp swrts2
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bne obell2
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.endproc
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bra dexit ; back to caller
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; We jump into the old bell routine mid-way because it's possible for
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.endif
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; someone to want to call the bell routine with a different duration
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dowait: jsr $fcb5 ; do delay if anything else
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; by putting a custom value in Y and calling fbe4 (BELL2)
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lda #>($fbe2-1) ; return to other bank here (in BELL1)
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oldbelle1 := oldbell::dowait
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pha ; by pushing address onto
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lda #<($fbe2-1) ; the stack
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pha
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lda #$00 ; in case someone assumes this
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dexit: jmp swrts2 ; back to other bank
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; old wait - no ACIA access to enforce delay at
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; old wait - no ACIA access to enforce delay at
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; accelerated speeds, speaker delay tkes care of it
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; accelerated speeds, speaker delay takes care of it
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; when we do the old beep
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; when we do the old beep
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owait: sec
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.proc oldwait
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owait2: pha
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sec
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owait3: sbc #$01
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owait2: pha
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bne owait3
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owait3: sbc #$01
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pla
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bne owait3
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sbc #$01
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pla
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bne owait2
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sbc #$01
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rts
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bne owait2
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rts
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.endproc
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.assert * <= $fc00, error, "ROM 5X dispatch overruns $fc00"
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