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https://github.com/peterferrie/standard-delivery.git
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shink seek, add banked read option
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parent
2608588ea7
commit
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57
fstbt.s
57
fstbt.s
@ -6,6 +6,13 @@
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!to "fstbt",plain
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*=$800
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enable_stack = 0 ;set to 1 to enable reading into stack (mutually exclusive with enable_banked)
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enable_banked = 0 ;set to bank number (1 or 2) to enable reading into banked RAM
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!if (enable_stack+enable_banked)=2 {
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!error can't enable both options
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}
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!byte 1
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tay ;A is last read sector+1 on entry
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@ -37,14 +44,27 @@ incindex
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sty $3d ;set sector
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iny ;prepare to be next sector in case of unallocated sector
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inc adrindex + 1 ;select next address
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!if enable_banked=1 {
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lda $C08B
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lda $C08B
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} else {
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!if enable_banked=2 {
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lda $C083
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lda $C083
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}
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}
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adrindex
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lda adrtable - 1 ;15 entries in first row, 16 entries thereafter
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beq incsector ;skip empty slots to allow sparse tracks
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sta $27 ;set high part of address
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tay
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iny
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beq jmpoep ;#$FF means end of data
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!if enable_banked=0 {
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iny ;detect #$FF (end of data)
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} else {
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dey ;detect #$01 (end of data)
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}
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beq jmpoep ;end of data
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;convert slot to PROM address
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@ -53,37 +73,36 @@ adrindex
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lsr
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lsr
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lsr
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ora #$c0
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ora #$C0
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pha
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lda #$5B ;read-1
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pha
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rts ;return to PROM
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;requires carry set on entry
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;carry is set by cpy above
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;and by wait below
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seek
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inc $41 ;next track
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asl $40 ;carry clear, phase off
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jsr seek1
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clc ;carry clear, phase off
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seek1 ;phase on
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inc phase + 1
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phase
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ldy #0 ;self-modified
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jsr delay
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clc ;phase off
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ldy phase + 1
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dey
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seek1
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jsr delay ;returns with carry set, phase on
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inc $40
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delay
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tya
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lda $40
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and #3
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rol
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ora $2B ;merge in slot
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tay
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lda $C080, y
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!if enable_banked = 1 {
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lda $C089
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} else {
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!if enable_banked = 2 {
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lda $C081
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}
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}
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lda #$30
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jmp $FCA8 ;common delay for all phases
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@ -93,5 +112,5 @@ jmpoep
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adrtable
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;15 slots for track 0 (track 0 sector 0 is not addressable)
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;16 slots for all other tracks
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!byte $FF ;end of list
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;16 slots for all other tracks, fill with addresses, 0 to skip any sector
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!byte 1 ;end of list, can't load to stack
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